公开(公告)号：US07653805B2

公开(公告)日：2010-01-26

申请号：US11727134

申请日：2007-03-23

申请人： Takashi Yoshikawa ,  Shigehiro Asano ,  Yutaka Yamada

发明人： Takashi Yoshikawa ,  Shigehiro Asano ,  Yutaka Yamada

IPC分类号： G06F15/76

CPC分类号： G06F15/7867

摘要： A semiconductor device for performing data processing by performing a plurality of computations in cycles includes a pipeline formed by connecting a plurality of computing units in series, each of the computing units including: a data line for receiving data; a control line for receiving a rule signal; a circuit information control unit configured to store, before data processing, several circuit information items, and to output a first one of the several circuit information items according to the rule signal received via the control line in a first cycle of the data processing; a processing element configured to construct an execution circuit according to the first circuit information item, to perform a computation using data from the data line, and to output a computation result; a data register for storing the computation result, and for outputting the computation result in a second cycle; and a control register for storing the rule signal and for outputting the rule signal in the second cycle. The semiconductor further includes a controller configured to control output timing of the rule signal to the control line of a first-stage one of the computing units in the pipeline and to control output timing of the data to the data line of the first-stage computing unit in the first cycle, so that the plurality of computing units are operated as a pipeline.

摘要翻译： 用于通过循环执行多个计算来执行数据处理的半导体装置包括通过串联连接多个计算单元而形成的流水线，每个计算单元包括：用于接收数据的数据线; 用于接收规则信号的控制线; 电路信息控制单元，被配置为在数据处理之前存储几个电路信息项，并且在数据处理的第一周期中根据经由控制线接收的规则信号来输出多个电路信息项中的第一个; 处理元件，被配置为构成根据第一电路信息项的执行电路，以使用来自数据线的数据执行计算，并输出计算结果; 数据寄存器，用于存储所述计算结果，并用于在第二周期中输出所述计算结果; 以及用于存储规则信号并在第二周期中输出规则信号的控制寄存器。 半导体还包括控制器，被配置为控制规则信号的输出定时到流水线中的计算单元的第一级的控制线，并且控制数据到第一级计算的数据线的输出定时 单元，使得多个计算单元作为流水线操作。

公开(公告)号：US20090327655A1

公开(公告)日：2009-12-31

申请号：US12372011

申请日：2009-02-17

申请人： Takashi Yoshikawa ,  Shigehiro Asano

发明人： Takashi Yoshikawa ,  Shigehiro Asano

IPC分类号： G06F15/76 ,  G06F15/00 ,  G06F9/44 ,  G06F9/30

CPC分类号： G06F9/3879 ,  G06F9/3897 ,  G06F15/7867 ,  Y02D10/12 ,  Y02D10/13

摘要： The semiconductor device includes a controller and a plurality of dynamically reconfigurable circuits connected to one another in series below the controller to perform operations in the manner of a pipeline. The controller inputs data and reconfiguration information to the first one of the dynamically reconfigurable circuits. Each of the dynamically reconfigurable circuits includes a processing unit that performs a data computation, an updating unit that updates the reconfiguration information, and a repetition controlling unit that determines whether to repeat the computation and controls the data and the reconfiguration information.

摘要翻译： 半导体器件包括控制器和多个在控制器下串联连接的可动态可重构电路，以以管道的方式执行操作。 控制器将数据和重配置信息输入到动态可重配置电路中的第一个。 每个动态可重配置电路包括执行数据计算的处理单元，更新重新配置信息的更新单元以及确定是否重复计算并控制数据和重新配置信息的重复控制单元。

公开(公告)号：US20090310914A1

公开(公告)日：2009-12-17

申请号：US11918948

申请日：2006-04-21

申请人： Junichi Sasaki ,  Kazuhiko Kurata ,  Takashi Yoshikawa ,  Shigeyuki Yanagimachi

发明人： Junichi Sasaki ,  Kazuhiko Kurata ,  Takashi Yoshikawa ,  Shigeyuki Yanagimachi

IPC分类号： G02B6/42 ,  G02B6/36

CPC分类号： G02B6/3897 ,  G02B6/4284 ,  G02B6/4292

摘要： An optical backplane connector with a board removable (being possible to insert and remove) therein in the direction perpendicular to the backplane plate surface is arranged on a backplane having optical transmission paths. The optical backplane connector accommodates a photoelectric conversion module in such a manner the incident and exit light are perpendicular to the backplane and a transparent board with a photoelectric conversion element mounted thereon is perpendicular to the board and parallel to the backplane. The conduction between the electric contacts of the photoelectric conversion module and the inner electric contacts of the optical backplane connector is held by mechanical contact. At the end portion of the optical transmission path on the backplane, an optical connector having a 45′ mirror and guide pins is mounted. The positioning operation is achieved by fitting the guide pins of the optical connector with the guide holes of the photoelectric conversion module.

摘要翻译： 在具有光传输路径的背板上布置有具有在垂直于背板表面的方向上可拆卸（可插入和移除）板的光背板连接器。 光背板连接器以这样的方式容纳光电转换模块，入射光和出射光垂直于背板，并且其上安装有光电转换元件的透明板垂直于板并平行于背板。 光电转换模块的电触点与光背板连接器的内部电触点之间的导通由机械接触保持。 在底板上的光传输路径的端部安装有具有45'反射镜和引导销的光学连接器。 通过将光连接器的引导针与光电转换模块的引导孔嵌合来实现定位操作。

公开(公告)号：US20090245737A1

公开(公告)日：2009-10-01

申请号：US12481032

申请日：2009-06-09

申请人： Kunihiko Fujiwara ,  Akito Nishimura ,  Kenji Sasaki ,  Yukio Hayashi ,  Kazuhiko Kurata ,  Takashi Yoshikawa ,  Junichi Sasaki

发明人： Kunihiko Fujiwara ,  Akito Nishimura ,  Kenji Sasaki ,  Yukio Hayashi ,  Kazuhiko Kurata ,  Takashi Yoshikawa ,  Junichi Sasaki

IPC分类号： G02B6/36 ,  G02B6/00

CPC分类号： G02B6/4292 ,  G02B6/3845 ,  G02B6/3897 ,  G02B6/3898 ,  G02B6/4214 ,  G02B6/4249 ,  Y10T29/49204

摘要： A connector holder fixes an optical connector assembled at a leading end of an optical fiber to an optical module having a light input/output end so that the optical fiber and the light input/output end is optically connected. The connector holder is provided with a holding section for storing at least a part of the optical connector, and a cover section attached to the holding section to be freely opened and closed. The cover section is provided with a cover section main body, and a pressing section which presses the optical connector toward the optical module.

摘要翻译： 连接器保持器将组装在光纤前端的光学连接器固定到具有光输入/输出端的光学模块，使得光纤和光输入/输出端光学连接。 连接器保持器设置有用于存储光连接器的至少一部分的保持部分和附接到保持部分以自由打开和关闭的盖部分。 盖部设置有盖部主体和将光连接器朝向光模块按压的按压部。

公开(公告)号：US20090139260A1

公开(公告)日：2009-06-04

申请号：US11666155

申请日：2005-09-07

申请人： Takashi Yoshikawa ,  Wataru Nakahama ,  Toru Hasegawa

发明人： Takashi Yoshikawa ,  Wataru Nakahama ,  Toru Hasegawa

IPC分类号： F25D23/02

CPC分类号： E05B17/0033 ,  E05B7/00 ,  E05B65/0042 ,  E05D15/505 ,  E05F11/54 ,  E05F13/02 ,  E05Y2900/31 ,  F25D23/028 ,  Y10T292/57

摘要： A door opening and closing mechanism in which a door to be attached to a body having an opening is separated from, and made in contact with the periphery of the opening so that the opening is opened and closed, is provided with: a handle that is shaft-supported on the door and allowed to pivot with an operation portion being held; and a lever member that has a supporting portion that is attached to the door so as to freely pivot thereon, a connecting portion that is connected to the handle so as to freely pivot thereon on the same side as the operation portion with respect to the rotation axis of the handle, and a contact portion that is placed on the side opposite to the connecting portion with respect to the supporting portion, and arranged face to face with the periphery of the opening, and in this structure when the operation portion is pulled, the contact portion is allowed to press the body so that the door is separated from the periphery of the opening with a predetermined distance.

摘要翻译： 一种门打开和关闭机构，其中附接到具有开口的主体的门与开口的周边分开并与开口的周边接触以使得开口打开和关闭，其具有：手柄，其是 轴支撑在门上并允许与保持的操作部分枢转; 以及杠杆构件，其具有安装到门上以便自由枢转的支撑部分，连接部分，其连接到手柄，以便在与旋转相同的操作部分的相同侧上自由枢转 并且与所述连接部相对于所述支撑部配置在与所述连接部相对的一侧的接触部，并且与所述开口的周围面对面配置，在所述结构中，当所述操作部被拉动时， 允许接触部分按压身体，使得门以预定距离与开口的周边分离。

公开(公告)号：US20080244240A1

公开(公告)日：2008-10-02

申请号：US12050899

申请日：2008-03-18

申请人： Takashi Yoshikawa ,  Shigehiro Asano

发明人： Takashi Yoshikawa ,  Shigehiro Asano

IPC分类号： G06F9/302

CPC分类号： G06F9/3001 ,  G06F9/3867 ,  G06F9/3879 ,  G06F15/7832 ,  Y02D10/12 ,  Y02D10/13

摘要： A semiconductor device includes a first arithmetic engine which executes a first arithmetic process in every cycle and outputs first data representing the result of the first arithmetic process and a first valid signal representing a first or second value in every cycle, and a second arithmetic engine which executes a second arithmetic process in every cycle and outputs second data representing the result of the second arithmetic process and a second valid signal representing the first or second value in every cycle. The device also includes an inter-arithmetic-engine buffer which is used to exchange the first data and the second data between the first and second arithmetic engines, enables write of the first or second data if the first or second valid signal indicates the first value, and inhibits write of the first or second data if the first or second valid signal indicates the second value.

摘要翻译： 半导体器件包括：第一运算引擎，其在每个周期中执行第一运算处理，并且输出表示第一运算处理结果的第一数据和表示每个周期中的第一或第二值的第一有效信号;以及第二运算引擎， 在每个周期中执行第二运算处理，并且在每个周期中输出表示第二运算处理结果的第二数据和表示第一或第二值的第二有效信号。 该装置还包括一个算术引擎缓冲器，用于在第一和第二算术引擎之间交换第一数据和第二数据，如果第一或第二有效信号指示第一值，则能够写入第一或第二数据 并且如果第一或第二有效信号指示第二值，则禁止写入第一或第二数据。

公开(公告)号：US20080155269A1

公开(公告)日：2008-06-26

申请号：US11984583

申请日：2007-11-20

申请人： Takashi Yoshikawa

发明人： Takashi Yoshikawa

IPC分类号： H04L9/32 ,  H04L9/30

CPC分类号： H04L9/3231 ,  H04L2209/56 ,  H04L2209/80

摘要： The biometric authentication system of this invention includes user identification information product and authentication side system. The user identification information product acquires biometric information of user, encrypts the biometric information acquired using encryption key information provided by the authentication side system and provides encrypted biometric information to the authentication side system. Just after, the acquired biometric information is cleared up. The authentication side system stores reference encrypted biometric information and inherent encryption key when this reference encrypted biometric information is acquired, corresponding to the user identification information. At the time of authentication, encryption key information is created using at least the stored inherent encryption key and provided to the user identification information product, and then, an authentication result is formed by using the received encrypted biometric information and reference encrypted biometric information.

摘要翻译： 本发明的生物体认证系统包括用户识别信息产品和认证侧系统。 用户识别信息产品获取用户的生物特征信息，对由认证侧系统提供的加密密钥信息获取的生物特征信息进行加密，并向认证侧系统提供加密的生物信息。 刚刚以后，获取的生物识别信息就被清除了。 当与该用户识别信息相对应地获取该参考加密生物体信息时，认证侧系统存储参考加密生物信息和固有加密密钥。 在认证时，使用至少存储的固有加密密钥创建加密密钥信息，并将其提供给用户识别信息产品，然后通过使用接收到的加密生物体信息和参考加密生物信息形成认证结果。

公开(公告)号：US20060285269A1

公开(公告)日：2006-12-21

申请号：US10569457

申请日：2004-07-13

申请人： Masaki Ohtsuka ,  Yoshikazu Inoue ,  Takashi Yoshikawa

发明人： Masaki Ohtsuka ,  Yoshikazu Inoue ,  Takashi Yoshikawa

IPC分类号： A61L9/22

CPC分类号： F25D17/042 ,  F25D23/003 ,  F25D23/12

摘要： It is an object of the invention to provide an ion diffusing apparatus having higher ability by suppressing the disturbance or turbulent flow generated in the vicinity of an ion generating apparatus and by enhancing the ion generating efficiency and the ion transfer efficiency. To achieve this object, the ion diffusing apparatus includes an ion generating apparatus which generates ions from an electrical discharging surface, a wind-blowing path which transmits the ions generated from the ion generating apparatus, and a blowout opening which is formed in an end of the wind-blowing path and which discharges the ions, and the wind-blowing path upstream from the ion generating apparatus is provided with a rectifier which rectifies flow of ions.

摘要翻译： 本发明的目的是通过抑制在离子发生装置附近产生的扰动或湍流并提高离子发生效率和离子传递效率，来提供具有较高能力的离子扩散装置。 为了达到这个目的，离子扩散装置包括从放电表面产生离子的离子产生装置，将从离子产生装置产生的离子透过的吹风路径和形成在离子发生装置的端部的吹出口 吹风路径和离子的排出，以及离子生成装置上游的吹风路径设置有整流器，其对离子的流动进行整流。

公开(公告)号：US20060224831A1

公开(公告)日：2006-10-05

申请号：US11098109

申请日：2005-04-04

申请人： Takashi Yoshikawa

发明人： Takashi Yoshikawa

IPC分类号： G06F12/00

CPC分类号： G06F12/0862 ,  G06F12/0806 ,  G06F12/0831 ,  G06F2212/507

摘要： Systems and methods for improving the performance of a multiprocessor system by enabling a first processor to initiate the retrieval of data and the storage of the data in the cache memory of a second processor. One embodiment comprises a system having a plurality of processors coupled to a bus, where each processor has a corresponding cache memory. The processors are configured so that a first one of the processors can issue a preload command directing a target processor to load data into the target processor's cache memory. The preload command may be issued in response to a preload instruction in program code, or in response to an event. The first processor may include an explicit identifier of the target processor in the preload command, or the selection of the target processor may be left to another agent, such as an arbitrator coupled to the bus.

公开(公告)号：US20050275886A1

公开(公告)日：2005-12-15

申请号：US11150340

申请日：2005-06-13

申请人： Sachiko Takeuchi ,  Takashi Yoshikawa

发明人： Sachiko Takeuchi ,  Takashi Yoshikawa

IPC分类号： H04N1/32 ,  H04N1/327 ,  G06F13/00

CPC分类号： H04N1/32771 ,  H04N1/32358 ,  H04N1/32416

摘要： In an image forming apparatus, a delivery instruction receiving part receives a delivery instruction for instructing a delivery form a request originator, and a delivering part delivers data indicated by a delivery instruction description in accordance with the delivery instruction indicated by the delivery instruction by a deliver type indicated by the deliver instruction description, so that delivery processes corresponding to a plurality of different delivery types can be conducted. The delivery instruction description is written in a form which can be shared and used for the plurality of different delivery types.

摘要翻译： 在图像形成装置中，传送指示接收部件接收用于指示发送请求发送者的发送指令的发送指示，并且传送部件根据由传递指令指示的传送指令通过传送来传送由传送指令描述指示的数据 由递送指令描述指示的类型，从而可以进行对应于多个不同传送类型的传送过程。 递送指令描述以可以共享并用于多种不同传递类型的形式来写入。