公开(公告)号：US07893415B2

公开(公告)日：2011-02-22

申请号：US12264423

申请日：2008-11-04

申请人： Tomohiro Minagawa

发明人： Tomohiro Minagawa

IPC分类号： G02B27/00 ,  H03K3/42 ,  H03K17/687

CPC分类号： H03K17/785 ,  H03K17/04206

摘要： A transient voltage occurring between output terminals during ON/OFF operation is reduced. There are provided a pair of input terminals IN1 and IN2, a pair of output terminals OUT1 and OUT2, MOSFETs N1 and N2 connected between the output terminals, and a drive circuit 10 connected between the input terminals IN1 and IN2 and the MOSFETs N1 and N2. A light-emitting diode D1 is connected between the input terminals IN1 and IN2. The MOSFETs N1 and N2 have their source electrodes electrically connected to each other and their drains connected to the output terminals OUT1 and OUT2 respectively. The drive circuit 10 includes a photodiode array FD1 that supplies a drive voltage to the gates of the MOSFETs N1 and N2, and a discharge circuit 11, connected between the gate electrodes and the source electrodes of the MOSFETs N1 and N2, that discharges electric charges accumulated on each gate electrode.

摘要翻译： 在ON / OFF操作期间在输出端子之间产生的瞬态电压降低。 提供一对输入端子IN1和IN2，一对输出端子OUT1和OUT2，连接在输出端子之间的MOSFET N1和N2以及连接在输入端子IN1和IN2之间的驱动电路10以及MOSFET N1和N2 。 发光二极管D1连接在输入端IN1和IN2之间。 MOSFET N1和N2的源电极彼此电连接，其漏极分别连接到输出端OUT1和OUT2。 驱动电路10包括向MOSFET N1和N2的栅极提供驱动电压的光电二极管阵列FD1和连接在MOSFET N1和N2的栅电极和源电极之间的放电电路11，其放电电荷 累积在每个栅电极上。

公开(公告)号：US20090261798A1

公开(公告)日：2009-10-22

申请号：US12425015

申请日：2009-04-16

申请人： Pinkesh Sachdev ,  Christopher Umminger

发明人： Pinkesh Sachdev ,  Christopher Umminger

IPC分类号： G05F1/10

CPC分类号： H03K17/04206 ,  H03K17/302

摘要： A switching circuit approximating the fast switching characteristics and small forward voltage drop of an ideal diode is provided. The switching circuit may include a voltage multiplier circuit, a reservoir capacitor and a pull up switch configured to be coupled to the control terminal of a semiconductor switch.

摘要翻译： 提供了近似理想二极管的快速开关特性和小正向压降的开关电路。 开关电路可以包括电压倍增器电路，储存电容器和被配置为耦合到半导体开关的控制端子的上拉开关。

公开(公告)号：US20090184744A1

公开(公告)日：2009-07-23

申请号：US12347525

申请日：2008-12-31

申请人： Giulio Ricotti ,  Riccardo Depetro

发明人： Giulio Ricotti ,  Riccardo Depetro

IPC分类号： H03K3/00 ,  H03K17/56 ,  H03K17/687

CPC分类号： H03K17/04206 ,  H03K17/6874

摘要： A driving circuit of a switch includes first and second transistors connected in series to each other and to relative intrinsic diodes in antiseries and driven by a driving device that includes at least one first and one second output terminal connected to the switch to supply it with a first control signal for driving the switch in a first working state and a second control signal for driving the switch in a second working state. At least one latch circuit coupled between respective common gate and source terminals of the first and second transistors supplies the common gate terminal with the first and second control signals, respectively, according to the working state to turn off and turn on the first and second transistors. The latch circuit comprises at least one flip-flop coupled to the common source terminal and having a reset terminal coupled to the first output terminal of the driving device and to the common source terminal by means of a reset resistance, a set terminal coupled to the second output terminal of the driving device and to the common source terminal by means of a set resistance and an output terminal coupled to the common gate terminal. The latch circuit further includes an activation circuit connected to the set and reset terminals of the flip-flop and to the common source terminal in order to dynamically short-circuit the set and reset resistances during the falling edges of the signal applied to the switch.

摘要翻译： 开关的驱动电路包括彼此串联连接的第一和第二晶体管以及反电容器中的相对本征二极管，并且由驱动装置驱动，所述驱动装置包括连接到开关的至少一个第一和第二输出端，以将其提供给 用于在第一工作状态下驱动开关的第一控制信号和用于在第二工作状态下驱动开关的第二控制信号。 耦合在第一和第二晶体管的相应公共栅极和源极端子之间的至少一个锁存电路分别根据工作状态向共用栅极端子分别提供第一和第二控制信号，以关断和接通第一和第二晶体管 。 锁存电路包括耦合到公共源极端子的至少一个触发器，并具有通过复位电阻耦合到驱动装置的第一输出端子的复位端子，以及耦合到 驱动装置的第二输出端子和通过设定电阻和公共源极端子耦合到公共端子的输出端子。 锁存电路还包括连接到触发器的设置和复位端子和公共源极端子的激活电路，以便在施加到开关的信号的下降沿期间动态地使设定和复位电阻短路。

公开(公告)号：US20080296685A1

公开(公告)日：2008-12-04

申请号：US12128637

申请日：2008-05-29

申请人： Masahito Sonehara ,  Yoichiro Kobayashi

发明人： Masahito Sonehara ,  Yoichiro Kobayashi

IPC分类号： H01L23/62

CPC分类号： H03K17/04163 ,  H01L2924/0002 ,  H03K17/04206 ,  H01L2924/00

摘要： An analog switch having a low capacitance is achieved. Potentials of input/output terminals of the analog switch and a well potential and a gate potential of an NMOS switching device are operated in synchronization via level shift buffers, thereby cancelling parasitic capacitances present between these elements.

摘要翻译： 实现了具有低电容的模拟开关。 模拟开关的输入/输出端子的电位和NMOS开关器件的阱电位和栅极电位通过电平移位缓冲器同步操作，从而消除这些元件之间存在的寄生电容。

公开(公告)号：US20080116955A1

公开(公告)日：2008-05-22

申请号：US11603073

申请日：2006-11-22

申请人： Cheng-Sung Chen ,  Wei-Hsuan Huang

发明人： Cheng-Sung Chen ,  Wei-Hsuan Huang

IPC分类号： H03K17/687

CPC分类号： H03K17/18 ,  H03K17/04206 ,  H03K17/26 ,  H03K17/284 ,  H03K17/687 ,  H03K17/6871 ,  H03K17/691 ,  H03K17/78 ,  H03K2217/0036

摘要： The present invention provides a driving circuit. It includes a plurality of current mirrors to generate a first charge current and a second charge current in response to a reference current. A switch circuit generates a driving signal in response to an input signal. A driving switch is coupled between the first charge current and the switch circuit. Once the driving switch is turned on and the level of the input signal is in high level, the switch circuit generates the driving signal, the level of the driving signal-being in high level, in response to the first charge current and the second charge current. A detection circuit generates a control signal to turn on/off the driving switch. The detection circuit turns off the driving switch to disable the first charge current after a period of delay time when the level of the driving signal is in high level.

摘要翻译： 本发明提供一种驱动电路。 它包括多个电流镜，以响应于参考电流产生第一充电电流和第二充电电流。 开关电路响应于输入信号产生驱动信号。 驱动开关耦合在第一充电电流和开关电路之间。 一旦驱动开关导通并且输入信号的电平处于高电平，则开关电路响应于第一充电电流和第二充电而产生驱动信号的电平，高电平的电平 当前。 检测电路产生控制信号以打开/关闭驱动开关。 当驱动信号的电平处于高电平时，检测电路关闭驱动开关以在延迟时间段之后禁用第一充电电流。

公开(公告)号：US20070262808A1

公开(公告)日：2007-11-15

申请号：US11383392

申请日：2006-05-15

申请人： Riccardo Lavorerio

发明人： Riccardo Lavorerio

IPC分类号： H03K17/16

CPC分类号： H03K17/04123 ,  H03K17/04206

摘要： A speedup circuit includes a control current source, a current limiter, and a driver for driving a target signal related to a reference signal. The control current source is controllable according to the reference signal and the current limiter receives a feedback signal from the driver.

摘要翻译： 加速电路包括控制电流源，限流器和用于驱动与参考信号相关的目标信号的驱动器。 控制电流源根据参考信号可控，电流限制器从驱动器接收反馈信号。

公开(公告)号：US07205818B2

公开(公告)日：2007-04-17

申请号：US10955814

申请日：2004-09-30

申请人： Edward C. Hopsecger

发明人： Edward C. Hopsecger

IPC分类号： H03K5/08 ,  H03L5/00

CPC分类号： H03K17/063 ,  H03K17/04206 ,  H03K17/0822

摘要： A current loop drive module includes a drive circuit and a compliance voltage controller. The drive circuit is configured to receive a compliance voltage and operable to generate a current loop signal based on the compliance voltage for receipt by an associated load coupled to the drive circuit. The compliance voltage controller is operable to adjust the compliance voltage based on the associated load. A method for generating a current loop signal includes generating a current loop signal based on a compliance voltage for receipt by an associated load and adjusting the compliance voltage based on the associated load.

摘要翻译： 电流回路驱动模块包括驱动电路和顺从电压控制器。 驱动电路被配置为接收顺应性电压并且可操作以基于顺应性电压产生电流环路信号，以便由耦合到驱动电路的相关负载进行接收。 柔性电压控制器可操作以基于相关联的负载来调节顺应性电压。 一种用于产生电流环路信号的方法包括基于用于由相关联的负载接收的顺应性电压产生电流回路信号，并且基于相关联的负载来调整顺应性电压。

公开(公告)号：US20060244498A1

公开(公告)日：2006-11-02

申请号：US11116835

申请日：2005-04-28

申请人： James Kohout ,  David Baldwin

发明人： James Kohout ,  David Baldwin

IPC分类号： H03K4/06

CPC分类号： H03K17/166 ,  H03K17/04206

摘要： A system and method is provided for driving a power field-effect transistor (FET). In one embodiment, a system comprises a control circuit that generates a control signal to provide a gate voltage of the power FET. The system further comprises a slope control circuit coupled between the control circuit and the power FET that is operative to dynamically control the rate-of-change of a gate voltage of the power FET to reduce electromagnetic interference (EMI) emissions and power loss resulting from switching the power FET.

公开(公告)号：US20060087348A1

公开(公告)日：2006-04-27

申请号：US11220529

申请日：2005-09-08

申请人： Kingo Ota ,  Shoichi Okuda ,  Hirofumi Abe

发明人： Kingo Ota ,  Shoichi Okuda ,  Hirofumi Abe

IPC分类号： H03B1/00

CPC分类号： H03K17/04206 ,  H03K17/0822

摘要： A semiconductor device for driving a load includes a first semiconductor switching element interposed between a power supply terminal and a load, a second semiconductor switching element interposed between the load and a ground terminal, a high-side driver, a low-side driver, and a voltage regulator. The voltage regulator reduces a voltage applied to a control terminal of the second switching element, when a voltage of a load terminal of the second switching element is lower than a predetermined voltage. Then, a voltage applied between the load terminal and the ground terminal of the second switching element increases, and accordingly a voltage applied between the power supply terminal and the load terminal of the first switching element decreases.

摘要翻译： 用于驱动负载的半导体装置包括插入在电源端子和负载之间的第一半导体开关元件，插入在负载和接地端子之间的第二半导体开关元件，高侧驱动器，低侧驱动器和 电压调节器。 当第二开关元件的负载端子的电压低于预定电压时，电压调节器减小施加到第二开关元件的控制端子的电压。 然后，施加在第二开关元件的负载端子和接地端子之间的电压增加，因此施加在第一开关元件的电源端子和负载端子之间的电压降低。

公开(公告)号：US20060001480A1

公开(公告)日：2006-01-05

申请号：US10883361

申请日：2004-06-30

申请人： Gerald Barkley ,  Daniel Chu

发明人： Gerald Barkley ,  Daniel Chu

IPC分类号： G05F1/10

CPC分类号： H03K19/00315 ,  H03K17/04206 ,  H03K17/102 ,  H03K19/09441

摘要： Methods and apparatuses associated with stepping down a high voltage in a high voltage switch. An additional transistor may be coupled to a switching transistor, and the additional transistor biased to a voltage level in between the high voltage to be switched and a switch reference voltage. When the switch is off, the high voltage may thus be spread across multiple devices to prevent a voltage from the gate to the drain to exceed a threshold associated with gate-aided breakdown of the drain-to-substrate channel-side pn-junction.