公开(公告)号：US20150222419A1

公开(公告)日：2015-08-06

申请号：US14610150

申请日：2015-01-30

申请人： Stichting IMEC Nederland

发明人： Christian Bachmann ,  Yan Zhang

IPC分类号： H04L7/00 ,  H03L7/08

CPC分类号： H03L7/08 ,  H03L7/091 ,  H04L7/0004 ,  H04L7/0008 ,  H04L7/0029 ,  H04L7/0054 ,  H04L7/0062 ,  H04L7/007 ,  H04L7/02 ,  H04L7/033 ,  H04L7/0331 ,  H04L7/0335 ,  H04L27/156 ,  H04L27/2331 ,  H04L27/3854

摘要： The present disclosure relates to a timing synchronization circuit for a digital receiver structure that includes a timing error detection module comprising a phase difference calculation unit arranged for calculating a phase difference between incoming samples of a digital data stream, and a timing error estimator arranged for determining a timing error estimate based on the calculated phase difference, and for generating, based on the determined timing error estimate, a signal indicative of timing error detection. The circuit also includes a timing error control module arranged for receiving the signal indicative of timing error detection, for evaluating the number of received signals indicative of timing error detection and for outputting, after comparison with a threshold value, a sampling adjustment command for adjusting the sampling instants applied for obtaining the digital data stream.

摘要翻译： 本发明涉及一种用于数字接收机结构的定时同步电路，其包括定时误差检测模块，该定时误差检测模块包括相位差计算单元，该相位差计算单元被布置用于计算数字数据流的输入采样之间的相位差，以及定时误差估计器， 基于所计算的相位差的定时误差估计，以及用于基于所确定的定时误差估计生成表示定时误差检测的信号。 该电路还包括定时误差控制模块，该定时误差控制模块用于接收指示定时误差检测的信号，用于评估指示定时误差检测的接收信号的数量，并且在与阈值进行比较之后，输出用于调整 应用采样时刻获取数字数据流。

公开(公告)号：US09077425B2

公开(公告)日：2015-07-07

申请号：US14155211

申请日：2014-01-14

申请人： Aviat U.S., Inc.

发明人： Emerick Vann ,  Yen-Fang Chao ,  Youming Qin ,  Roland Matian

IPC分类号： H04B17/00 ,  H04B1/16 ,  H03C3/40 ,  H03D3/00 ,  H03D7/16 ,  H04B1/30 ,  H04L27/38 ,  H04B1/10

CPC分类号： H04L1/206 ,  H03C3/406 ,  H03D3/009 ,  H03D7/168 ,  H04B1/0014 ,  H04B1/10 ,  H04B1/16 ,  H04B1/28 ,  H04B1/30 ,  H04L1/0036 ,  H04L1/203 ,  H04L1/208 ,  H04L27/38 ,  H04L27/3854

摘要： Various embodiments provide for systems and methods for signal conversion of one modulated signal to another modulated signal using demodulation and then re-modulation. According to some embodiments, a signal receiving system may comprise an I/Q demodulator that demodulates a first modulated signal to an in-phase (“I”) signal and a quadrature (“Q”) signal, an I/Q signal adjustor that adaptively adjusts the Q signal to increase the signal-to-noise ratio (SNR) of a transitory signal that is based on a second modulated signal, and an I/Q modulator that modulates the I signal and the adjusted Q signal to the second modulated signal. To increase the SNR, the Q signal may be adjusted based on a calculated error determined for the transitory signal during demodulation by a demodulator downstream from the I/Q modulator.

摘要翻译： 各种实施例提供了用于使用解调然后再调制将一个调制信号信号转换成另一调制信号的系统和方法。 根据一些实施例，信号接收系统可以包括将第一调制信号解调为同相（“I”）信号和正交（“Q”）信号的I / Q解调器，I / Q信号调节器， 自适应地调整Q信号以增加基于第二调制信号的瞬态信号的信噪比（SNR），以及I / Q调制器，其将I信号和经调整的Q信号调制为第二调制信号 信号。 为了增加SNR，可以基于在由I / Q调制器下游的解调器解调期间为瞬态信号确定的计算误差来调整Q信号。

公开(公告)号：US08897346B2

公开(公告)日：2014-11-25

申请号：US13806596

申请日：2011-05-30

申请人： Taro Teramoto

发明人： Taro Teramoto

IPC分类号： H04L27/08 ,  H04L27/36 ,  H04L27/38

CPC分类号： H04L27/08 ,  H04L27/362 ,  H04L27/364 ,  H04L27/368 ,  H04L27/3854

摘要： A modem device includes a modulation unit 12 that generates a modulated signal, a frequency conversion unit 15 that generates an intermediate frequency signal from an external input signal, and a demodulation unit 14 that demodulates the modulated or intermediate frequency signal and generates a reception signal. In a communication mode, the modulation unit 12 outputs the modulated signal to a external device 50, the frequency conversion unit 15 generates the intermediate frequency signal, and the demodulation unit 14 demodulates the intermediate frequency signal and generates the reception signal. In an adjustment mode, the modulation unit 12 outputs the modulated signal to the demodulation unit 14, and the demodulation unit 14 generates the reception signal from the modulated signal and adjusts an amplitude of the transmission signal based on the reception signal.

摘要翻译： 调制解调器装置包括生成调制信号的调制单元12，从外部输入信号产生中频信号的频率转换单元15以及对调制或中频信号进行解调并产生接收信号的解调单元14。 在通信模式中，调制单元12将调制信号输出到外部设备50，频率转换单元15产生中频信号，并且解调单元14对中频信号进行解调并产生接收信号。 在调整模式中，调制单元12将调制信号输出到解调单元14，并且解调单元14根据调制信号产生接收信号，并根据接收信号调整发送信号的幅度。

公开(公告)号：US20140281832A1

公开(公告)日：2014-09-18

申请号：US13833667

申请日：2013-03-15

申请人： Tyco Electronics Subsea Communications LLC

发明人： Hongbin Zhang ,  Hussam G. Batshon

IPC分类号： G06F11/10

CPC分类号： G06F11/10 ,  H03M13/251 ,  H04B10/5055 ,  H04B10/541 ,  H04B10/5561 ,  H04B10/6165 ,  H04J14/02 ,  H04L1/0041 ,  H04L1/0047 ,  H04L1/0063 ,  H04L27/3427 ,  H04L27/3854

摘要： A system and method including a parity bit encoder for encoding each n bits of data to be transmitted with a parity check bit to produce blocks of n+1 bits (n information bits plus one parity bit associated with the n information bits). Each of the blocks of n+1 bits are Gray mapped to a plurality of associated QAM symbols that are modulated onto an optical wavelength and transmitted to a receiver. A maximum a posteriori (MAP) decoder is used at the receiver to correct for cycle slip. Phase errors of 180 degrees may be detected by independently encoding odd and even bits prior to Gray mapping, and identifying errors in decoding odd numbered bits at the receiver.

摘要翻译： 一种系统和方法，包括奇偶校验位编码器，用于编码要用奇偶校验位发送的每个n位数据，以产生n + 1位（n个信息位加上与n个信息位相关联的一个奇偶校验位）的块。 n + 1位的每个块被灰色映射到被调制到光波长并被发送到接收器的多个相关QAM符号。 在接收器处使用最大后验（MAP）解码器来校正循环滑移。 180度的相位误差可以通过在灰度映射之前独立地编码奇数和偶数位来检测，并且识别在接收器处解码奇数比特中的错误。

公开(公告)号：US08824589B2

公开(公告)日：2014-09-02

申请号：US12984705

申请日：2011-01-05

申请人： Guixue Zhao

发明人： Guixue Zhao

IPC分类号： H04L27/18

CPC分类号： H04L27/223 ,  H04L25/03019 ,  H04L27/2064 ,  H04L27/367 ,  H04L27/3854

摘要： A method, an apparatus, and a system are provided in various embodiments of the present invention. According to embodiments of the present invention, the receiver samples the frequency signal from the transmitter to obtain sampling data and obtain the feedback IQ signal from the sampling data, and performs signal correction by using the feedback IQ signal. Sampling the received radio frequency signal does not need an additional component. The receiving channel installed in the receiver can be used to receive the radio frequency signal, which reduces the cost and power consumption.

摘要翻译： 在本发明的各种实施例中提供了一种方法，装置和系统。 根据本发明的实施例，接收机对来自发射机的频率信号进行采样以获得采样数据，并从采样数据获得反馈IQ信号，并通过使用反馈IQ信号执行信号校正。 对接收到的射频信号进行采样不需要额外的组件。 接收机中安装的接收通道可用于接收射频信号，降低了成本和功耗。

公开(公告)号：US20140241407A1

公开(公告)日：2014-08-28

申请号：US13774565

申请日：2013-02-22

申请人： TEKTRONIX, INC.

发明人： Zoltan Azary

IPC分类号： H04B17/00

CPC分类号： H04B17/104 ,  H03C3/40 ,  H04L27/364 ,  H04L27/3854

摘要： Described are systems and methods of determining DC offset voltages in IQ modulators. First, two different DC test voltages are selected for one of the inputs to the IQ modulator. Then, a first test voltage is applied to one input to the IQ modulator while test data is generated by measuring outputs from a set of signals applied to the other input to the IQ modulator. Then the second test voltage is applied and another set of test data generated. From the first and second sets of test data, second-order polynomial functions may be constructed and compared to one another to yield a ratio of power value outputs. Then the DC offset voltages may be determined from the ratio of power value outputs.

摘要翻译： 描述了在IQ调制器中确定DC偏移电压的系统和方法。 首先，为IQ调制器的输入之一选择两个不同的直流测试电压。 然后，通过测量从施加到IQ调制器的另一个输入的一组信号的输出来产生测试数据，将第一测试电压施加到IQ调制器的一个输入。 然后施加第二个测试电压，并产生另一组测试数据。 从第一组和第二组测试数据中，可以构造二阶多项式函数并将其相互比较以产生功率值输出的比率。 然后可以根据功率值输出的比率来确定DC偏移电压。

公开(公告)号：US20130259173A1

公开(公告)日：2013-10-03

申请号：US13762206

申请日：2013-02-07

申请人： QUALCOMM INCORPORATED

发明人： NICOLA VARANESE ,  CHRISTIAN PIETSCH ,  JUAN MONTOJO

IPC分类号： H04L1/00 ,  H04L25/02

CPC分类号： H04L25/022 ,  H04L1/0001 ,  H04L25/0232 ,  H04L27/2613 ,  H04L27/2647 ,  H04L27/3854 ,  H04L27/3863 ,  H04L27/3872 ,  H04L2027/003 ,  H04L2027/0073 ,  H04L2027/0089 ,  H04L2027/0093 ,  H04L2027/0095

摘要： A receiver receives a repeating or periodic signal and, based on the signal, estimates a carrier frequency offset for the receiver. Based on the signal and the estimated carrier offset, an I/O mismatch for the receiver is estimated and compensation for the estimated I/O mismatch is performed. After compensating for the estimated receiver I/O mismatch, the carrier frequency offset is re-estimated.

摘要翻译： 接收机接收重复或周期性信号，并且基于该信号估计接收机的载波频率偏移。 基于信号和估计的载波偏移，估计接收机的I / O不匹配，并执行估计的I / O失配的补偿。 在补偿估计的接收机I / O不匹配之后，重新估计载波频率偏移。

公开(公告)号：US20130064148A1

公开(公告)日：2013-03-14

申请号：US13608677

申请日：2012-09-10

申请人： Hyun Ho BOO ,  Seon-Ho Han ,  Jang Hong Choi ,  Ik Soo Eo ,  Hyun Kyu Yu

发明人： Hyun Ho BOO ,  Seon-Ho Han ,  Jang Hong Choi ,  Ik Soo Eo ,  Hyun Kyu Yu

IPC分类号： H04J1/02

CPC分类号： H04L27/3836 ,  H04B1/0007 ,  H04L27/206 ,  H04L27/2092 ,  H04L27/2332 ,  H04L27/362 ,  H04L27/3854

摘要： The present invention relates to a single frequency synthesizer based FDD transceiver. A single frequency synthesizer generates and provides a carrier frequency so that frequency up-conversion and frequency down-conversion can be performed at the time of transmission and reception. Accordingly, the area, power consumption, and design complexity of the entire system can be reduced, and the performance of the system can be improved.

摘要翻译： 本发明涉及一种基于单频合成器的FDD收发器。 单个频率合成器产生并提供载波频率，使得可以在发送和接收时执行上变频和下变频。 因此，可以降低整个系统的面积，功耗和设计复杂性，并且可以提高系统的性能。

公开(公告)号：US08351492B2

公开(公告)日：2013-01-08

申请号：US12985201

申请日：2011-01-05

申请人： Yann Ly-Gagnon

发明人： Yann Ly-Gagnon

IPC分类号： H04B1/38 ,  H04L5/16

CPC分类号： H04B1/62 ,  H04L27/364 ,  H04L27/3854 ,  H04L2027/0016 ,  H04L2027/0022

摘要： Embodiments of the present invention provide an apparatus comprising a transceiver having a receiver and a transmitter connected through a segment of a calibration loop back path. The apparatus also comprises a control system configured to communicate with the transceiver. The calibration loop back path has an intentional phase shift that can be toggled between an off state and an on state by the control system. The control system is configured to calculate the intentional phase shift by examining the difference of a first and second phase angle. The first phase angle is obtained from the transmission of a first pair of signals with the intentional phase shift in the off state. The second phase angle is obtained from the transmission of a second pair of signals with the intentional phase shift in the on state.

摘要翻译： 本发明的实施例提供了一种装置，包括具有接收器和通过校准回路路径的段连接的发射器的收发器。 该装置还包括被配置为与收发器进行通信的控制系统。 校准环回路径具有有意的相移，其可以通过控制系统在关闭状态和导通状态之间切换。 控制系统被配置为通过检查第一和第二相位角的差来计算有意的相移。 从关闭状态的有意相移的第一对信号的传输获得第一相位角。 从第二对信号的传输获得第二相位角，其中有意的相移处于导通状态。

公开(公告)号：US20120142300A1

公开(公告)日：2012-06-07

申请号：US12957507

申请日：2010-12-01

申请人： Stefan Herzinger ,  Volker Neubauer

发明人： Stefan Herzinger ,  Volker Neubauer

IPC分类号： H04W88/02

CPC分类号： H04B1/26 ,  H04B1/0064 ,  H04L27/3854 ,  H04L27/3872

摘要： Some embodiments of the present disclosure relate to multiband receivers that include at least one divider unit having a divisor that is other-than-two. For example, in some embodiments the divisor is an odd integer (e.g., three). Such divisors allow oscillators for respective receiver subunits in a multi-band receiver to have frequencies that are sufficiently different from one another so as to limit cross-talk interference there between, even when the receiver subunits are concurrently receiving data on adjacent channels. To facilitate this other-than-two divisor, a phase error compensation block is often used to compensate for the effects of using the other-than-two divisor.

摘要翻译： 本公开的一些实施例涉及多频带接收机，其包括至少一个具有不同于二的除数的除法器单元。 例如，在一些实施例中，除数是奇整数（例如，三个）。 这样的除数允许多频带接收机中的相应接收器子单元的振荡器具有彼此充分不同的频率，以便即使当接收机子单元同时在相邻信道上接收数据时也限制其间的串扰干扰。 为了方便这个除二分之一以外，通常使用相位误差补偿块来补偿使用其他二除数的影响。