公开(公告)号：US11088277B2

公开(公告)日：2021-08-10

申请号：US16878229

申请日：2020-05-19

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Yogendra Yadav ,  Chi-Chih Chen ,  Ruey-Hsin Liu ,  Chih-Wen Yao

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/66 ,  H01L29/08 ,  H01L29/10 ,  H01L29/40 ,  H01L29/51 ,  H01L27/07

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a source region, a drain region, a filed plate and a gate electrode. The source region is of a first conductivity type located at a first side within the substrate. The drain region is of the first conductive type located at a second side within the substrate opposite to the first side. The field plate is located over the substrate and between the source region and the drain region. A portion of the gate electrode is located over the field plate.

公开(公告)号：US11081578B2

公开(公告)日：2021-08-03

申请号：US16405457

申请日：2019-05-07

Applicant: Cambridge GaN Devices Limited

Inventor： Florin Udrea ,  Loizos Efthymiou ,  Giorgia Longobardi ,  Martin Arnold

IPC: H01L29/778 ,  H01L29/20 ,  H01L27/07 ,  H01L29/66 ,  H01L21/02 ,  H01L29/205

Abstract: We disclose herein a depletion mode III-nitride semiconductor based heterojunction device, comprising: a substrate; a III-nitride semiconductor region formed over the substrate, wherein the III-nitride semiconductor region comprises a heterojunction comprising at least one two-dimensional carrier gas of second conductivity type; a first terminal operatively connected to the III-nitride semiconductor region; a second terminal laterally spaced from the first terminal in a first dimension and operatively connected to the III-nitride semiconductor region; at least two highly doped semiconductor regions of a first conductivity type formed over the III-nitride semiconductor region, the at least two highly doped semiconductor regions being formed between the first terminal and the second terminal; and a gate terminal formed over the at least two highly doped semiconductor regions; wherein the at least two highly doped semiconductor regions are spaced from each other in a second dimension.

公开(公告)号：US11081481B2

公开(公告)日：2021-08-03

申请号：US16683383

申请日：2019-11-14

Applicant: Infineon Technologies AG

Inventor： Johannes Georg Laven

IPC: H01L27/06 ,  H01L29/10 ,  H01L29/06 ,  H01L29/417 ,  H01L29/66 ,  H01L29/40 ,  H01L29/423 ,  H01L29/739 ,  H01L29/861 ,  H01L29/08 ,  H01L27/07

Abstract: A semiconductor device includes a semiconductor substrate having a body layer arranged between a front side and a drift layer, and forming a pn-junction with the drift layer. A front metallization is on the front side in Ohmic connection with the body layer, and a back metallization opposite is in Ohmic connection with the drift layer. An IGBT cell region of the device includes a plurality of gate electrodes in Ohmic connection with a gate metallization. Each gate electrode is electrically insulated from the semiconductor substrate by a respective gate dielectric extending through the body layer. A free-wheeling diode region of the device includes a plurality of field electrodes in Ohmic connection with the front metallization. Each field electrode is separated from the semiconductor substrate by a respective field dielectric extending through the body layer. Additional semiconductor device embodiments are described.

公开(公告)号：US20210218394A1

公开(公告)日：2021-07-15

申请号：US17018009

申请日：2020-09-11

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Masahiko KURAGUCHI ,  Yosuke KAJIWARA ,  Kentaro IKEDA

IPC: H03K17/22 ,  H03K17/687 ,  H01L27/07

Abstract: According to one embodiment, a semiconductor device includes a semiconductor member, a gate electrode, a source electrode, a drain electrode, a conductive member, a gate terminal, and a first circuit. The semiconductor member includes a first semiconductor layer including a first partial region and including Alx1Ga1−x1N (0≤x1≤1), and a second semiconductor layer including Alx2Ga1−x2N (0

公开(公告)号：US20210211125A1

公开(公告)日：2021-07-08

申请号：US17059789

申请日：2019-05-29

Applicant: Search For The Next, LTD.

Inventor： David SUMMERLAND ,  Roger LIGHT ,  Luke KNIGHT

IPC: H03K17/567 ,  H01L27/07 ,  H03K19/084

Abstract: An inverter logic circuit includes a bipolar junction transistor and a zener diode. The zener diode is connected between the base of the bipolar junction transistor and ground (or other reference voltage). The zener diode is reverse biased such that a leakage current through the zener diode allows for sufficient current through the emitter-base terminals of the bipolar junction transistor when a voltage is applied across the emitter and base terminals of the bipolar junction transistor to turn the transistor ON in the absence of an external signal to the base. As such the bipolar junction transistor functions as a normally ON bipolar junction transistor.

公开(公告)号：US20210210595A1

公开(公告)日：2021-07-08

申请号：US17209242

申请日：2021-03-23

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Tomoyuki OBATA

IPC: H01L29/06 ,  H01L29/32 ,  H01L27/07 ,  H01L23/14

Abstract: Provided is a semiconductor device comprising a semiconductor substrate containing oxygen. An oxygen concentration distribution in a depth direction of the semiconductor substrate has a high oxygen concentration part where an oxygen concentration is higher on a further upper surface-side than a center in the depth direction of the semiconductor substrate than in a lower surface of the semiconductor substrate. The high oxygen concentration part may have a concentration peak in the oxygen concentration distribution. A crystal defect density distribution in the depth direction of the semiconductor substrate has an upper surface-side density peak on the upper surface-side of the semiconductor substrate, and the upper surface-side density peak may be arranged within a depth range in which the oxygen concentration is equal to or greater than 50% of a peak value of the concentration peak.

公开(公告)号：US20210175231A1

公开(公告)日：2021-06-10

申请号：US17172090

申请日：2021-02-10

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Tatsuya NAITO

IPC: H01L27/06 ,  H01L27/07 ,  H01L29/861 ,  H01L29/36 ,  H01L29/06 ,  H01L29/40 ,  H01L21/765 ,  H01L29/739 ,  H01L29/78 ,  H01L29/10 ,  H01L29/08 ,  H01L21/76 ,  H01L29/423 ,  H01L29/32

Abstract: A semiconductor device that allows easy hole extraction is provided. The semiconductor device includes: a semiconductor substrate having drift and base regions; a transistor portion formed in the semiconductor substrate; and a diode portion formed adjacent to the transistor portion and in the semiconductor substrate. In the transistor portion and the diode portion: a plurality of trench portions each arrayed along a predetermined array direction; and a plurality of mesa portions formed between respective trench portions are formed, among the plurality of mesa portions, at least one boundary mesa portion at a boundary between the transistor portion and the diode portion includes a contact region at an upper surface of the semiconductor substrate and having a concentration higher than that of the base region, and an area of the contact region at the boundary mesa portion is greater than an area of the contact region at another mesa portion.

公开(公告)号：US11011556B2

公开(公告)日：2021-05-18

申请号：US16738887

申请日：2020-01-09

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Victor Chiang Liang ,  Fu-Huan Tsai ,  Fang-Ting Kuo ,  Meng-Chang Ho ,  Yu-Lin Wei ,  Chi-Feng Huang

IPC: H01L27/146 ,  H01L29/66 ,  H01L27/07 ,  H01L29/93

Abstract: A method of making a semiconductor device includes etching a substrate to define a trench in a substrate, wherein the trench is adjacent to an active region in the substrate, and etching the substrate includes patterning a mask. The method further includes partially removing the mask to expose a first portion of the active region, wherein the first portion extends a first distance from the trench. The method further includes depositing a dielectric material to fill the trench and cover the first portion of the active region. The method further includes removing the mask, wherein the removing of the mask includes maintaining the dielectric material covering the first portion of the active region. The method further includes forming a gate structure over the active region and over the dielectric material.

公开(公告)号：US11004929B2

公开(公告)日：2021-05-11

申请号：US16596972

申请日：2019-10-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Dok Won Lee ,  Erika Lynn Mazotti ,  Mark Robert Visokay ,  William David French ,  Ricky Alan Jackson ,  Wai Lee

IPC: H01L49/02 ,  G01K7/22 ,  H01L23/522 ,  H01L27/07 ,  G01K7/16

Abstract: Various examples provide an electronic device that includes first and second resistor segments. Each of the resistor segments has a respective doped resistive region formed in a semiconductor substrate. The resistor segments are connected between first and second terminals. The first resistor segment is configured to conduct a current in a first direction, and the second resistor segment is configured to conduct the current in a second different direction. The directions may be orthogonal crystallographic directions of the semiconductor substrate.

公开(公告)号：US20210125893A1

公开(公告)日：2021-04-29

申请号：US16661272

申请日：2019-10-23

Applicant: Raytheon Company

Inventor： Matthew C. Tyhach ,  Jarrod Vaillancourt

IPC: H01L23/373 ,  H01L27/07 ,  H01L29/66 ,  H01L29/778 ,  H01L23/66

Abstract: A Monolithic Microwave Integrated Circuit (MMIC) structure having a thermally conductive substrate; a semiconductor layer disposed on a first portion of an upper surface of the substrate; an active mesa-shaped semiconductor device layer disposed on the semiconductor layer; and a passive electrical device disposed directly on a second portion of the upper surface of the substrate.