公开(公告)号：US08121627B2

公开(公告)日：2012-02-21

申请号：US11835205

申请日：2007-08-07

Applicant: Ho-Jun Lee ,  Chul-Yong Jeon

Inventor： Ho-Jun Lee ,  Chul-Yong Jeon

IPC: H04W4/00 ,  H04M1/00

CPC classification number: H04M1/645 ,  H04M1/72566

Abstract: Disclosed are a method and a mobile terminal for outputting an automatic response message informing a caller of a user's (i.e. recipient's) current schedule when the user is unable to answer an incoming call. The method includes receiving an incoming call, determining whether an automatic response key is pressed to output an automatic response message with implementation of the schedule management function, detecting any schedule information corresponding to the current time by reference to a schedule management table when the automatic response key is pressed, and sending a schedule informing message including the detected schedule information to a caller's terminal.

Abstract translation: 公开了一种方法和移动终端，用于在用户不能应答呼入时输出通知呼叫者用户（即接收方）当前时间表的自动应答消息。 该方法包括接收来电，确定是否按照自动响应键输出自动响应消息，并执行日程管理功能，当自动响应时参考时间表管理表，检测与当前时间相对应的任何时间表信息 键，并向呼叫者的终端发送包括检测到的日程信息的调度通知消息。

公开(公告)号：US20120032646A1

公开(公告)日：2012-02-09

申请号：US13159310

申请日：2011-06-13

Applicant: Myung-Jun Lee

Inventor： Myung-Jun Lee

IPC: H02J7/00

CPC classification number: H02J7/0031 ,  H02J3/12 ,  H02J7/0026 ,  H02J7/04

Abstract: A battery pack, and a method of controlling the battery pack are disclosed. The battery pack detects consumption current when a load is not turned on, and shuts off power when a load is turned off or in stand-by mode, thereby preventing consumption current of the load from flowing.

Abstract translation: 公开了电池组以及控制电池组的方法。 当负载未接通时，电池组检测消耗电流，并且在负载关闭或待机模式时关闭电源，从而防止负载的消耗电流流动。

公开(公告)号：US20120019961A1

公开(公告)日：2012-01-26

申请号：US12843264

申请日：2010-07-26

Applicant: Dong Jun Lee ,  Chang Ik Kang ,  Bong Jin Lee

Inventor： Dong Jun Lee ,  Chang Ik Kang ,  Bong Jin Lee

IPC: G11B5/56

CPC classification number: G11B5/5547

Abstract: A hard disk drive with a circuit that controls a voice coil motor. The circuit provides a driving current to the voice coil motor to move a head of the drive in a seek routine. The seek routine includes a computation of a driving current that is a function of a feedforward zero phase error tracking algorithm. Utilizing the feedforward zero phase error tracking algorithm can reduce the seek time of the drive.

Abstract translation: 具有控制音圈电机的电路的硬盘驱动器。 电路向音圈电机提供驱动电流，以便在寻道程序中移动驱动器的头部。 搜索程序包括作为前馈零相位误差跟踪算法的函数的驱动电流的计算。 利用前馈零相位误差跟踪算法可以减少驱动器的寻道时间。

公开(公告)号：US08102704B2

公开(公告)日：2012-01-24

申请号：US12662247

申请日：2010-04-07

Applicant: Kwang-Jin Lee ,  Yong-Jun Lee ,  Du-Eung Kim ,  Woo-Yeong Cho ,  Joon-Yong Choi

Inventor： Kwang-Jin Lee ,  Yong-Jun Lee ,  Du-Eung Kim ,  Woo-Yeong Cho ,  Joon-Yong Choi

IPC: G11C16/32

CPC classification number: G11C7/04 ,  G11C7/18 ,  G11C7/22 ,  G11C16/32 ,  G11C2207/002

Abstract: Disclosed is a method of preventing coupling noises for a non-volatile semiconductor memory device. According to the method, if an edge of a write operation signal overlaps an activated period of a read operation signal a check result is generated. The write operation signal is modified based on the check result.

Abstract translation: 公开了一种防止用于非易失性半导体存储器件的耦合噪声的方法。 根据该方法，如果写入操作信号的边缘与读取操作信号的激活时段重叠，则产生检查结果。 基于检查结果修改写操作信号。

公开(公告)号：US08101493B2

公开(公告)日：2012-01-24

申请号：US12648910

申请日：2009-12-29

Applicant: Yong-Jun Lee

Inventor： Yong-Jun Lee

IPC: H01L29/02

CPC classification number: H01L21/0273 ,  H01L21/32139 ,  H01L28/60

Abstract: A capacitor of a semiconductor device and a method for manufacturing the same includes a lower metal layer on and/or over a semiconductor substrate; an insulating layer formed on and/or over the lower metal layer with step difference; and an upper electrode on and/or over the insulating layer pattern, wherein a top corner of the upper electrode is rounded so that a curvature pattern is formed on the top corner of the upper electrode.

Abstract translation: 半导体器件的电容器及其制造方法包括在半导体衬底上和/或之上的下金属层; 在步进差异的下金属层上和/或上方形成绝缘层; 以及在绝缘层图案之上和/或之上的上电极，其中上电极的顶角是圆形的，使得在上电极的顶角上形成曲率图案。

公开(公告)号：US08099658B2

公开(公告)日：2012-01-17

申请号：US11932591

申请日：2007-10-31

Applicant: Seok-Jun Lee ,  Srinivas Lingam ,  Anuj Batra ,  Manish Goel

Inventor： Seok-Jun Lee ,  Srinivas Lingam ,  Anuj Batra ,  Manish Goel

IPC: H03M13/03

CPC classification number: H03M13/4107 ,  H03M13/6502 ,  H03M13/6583

Abstract: A Viterbi decoder includes a branch metric unit, an add-compare select unit coupled to the branch metric unit, and a trace-back unit coupled to the add-compare select unit. The branch metric unit includes a branch metric computation unit coupled to a thresholder unit. The branch metric computation unit is configured to compute a branch metric. The thresholder unit is configured to compare the branch metric with a threshold value. If the branch metric is greater than the threshold value, the thresholder unit is configured to forward the threshold value to the add-compare select and not forward the branch metric to the add-compare select unit. Implementing such a branch metric ceiling allows for a predictable reduction in the significant bits of calculations in the Viterbi decoder, which allows for reduction of complexity via elimination of gates and storage elements.

Abstract translation: 维特比解码器包括分支度量单元，耦合到分支度量单元的加法比较选择单元和耦合到加法比较选择单元的追溯单元。 分支度量单元包括耦合到阈值单元的分支度量计算单元。 分支度量计算单元被配置为计算分支度量。 阈值单元被配置为将分支度量与阈值进行比较。 如果分支度量大于阈值，则阈值单元被配置为将阈值转发到加法比较选择，而不将分支度量转发到加法比较选择单元。 实现这样的分支度量顶点允许在维特比解码器中的有效计算的可预测的减少，这允许通过消除门和存储元件来降低复杂度。

公开(公告)号：US20120008931A1

公开(公告)日：2012-01-12

申请号：US13175734

申请日：2011-07-01

Applicant: Shin-Jun Lee ,  Kwang-Cheol Choi ,  Dae-kyu Shin ,  Seung-Pyo Ryu ,  Hyung-Jin Bae ,  Sung-Joo Ahn ,  Ik-Hwan Cho ,  Jin-He Jung ,  Tae-Hwan Son ,  Sang-Kyung Lee

Inventor： Shin-Jun Lee ,  Kwang-Cheol Choi ,  Dae-kyu Shin ,  Seung-Pyo Ryu ,  Hyung-Jin Bae ,  Sung-Joo Ahn ,  Ik-Hwan Cho ,  Jin-He Jung ,  Tae-Hwan Son ,  Sang-Kyung Lee

IPC: G09G5/00 ,  G03B17/02

CPC classification number: G03B17/18 ,  H04L67/18 ,  H04N5/23293

Abstract: An apparatus and method display a world clock on the basis of an Augmented Reality (AR) scheme in a portable terminal. The method for displaying information in the portable terminal includes obtaining camera image data from a camera. The method also include searching for a city corresponding to a camera location and a camera viewpoint direction on the basis of a memory. The method further includes obtaining information on the found city and displaying the obtained information on the found city by compositing the information into the obtained camera image data.

Abstract translation: 一种装置和方法在便携式终端中基于增强现实（AR）方案显示世界时钟。 用于在便携式终端中显示信息的方法包括从照相机获取照相机图像数据。 该方法还包括基于存储器搜索与相机位置相对应的城市和相机视点方向。 该方法还包括通过将所述信息合成到所获得的相机图像数据中来获得关于所找到的城市的信息并显示所找到的城市的信息。

公开(公告)号：US20120003768A1

公开(公告)日：2012-01-05

申请号：US13231225

申请日：2011-09-13

Applicant: Hong-Kee CHIN ,  Sang-Gab KIM ,  Woong-Kwon KIM ,  Yong-Mo CHOI ,  Seung-Ha CHOI ,  Shin-Il CHOI ,  Ho-Jun LEE ,  Jung-Suk BANG ,  Yu-Gwang JEONG

Inventor： Hong-Kee CHIN ,  Sang-Gab KIM ,  Woong-Kwon KIM ,  Yong-Mo CHOI ,  Seung-Ha CHOI ,  Shin-Il CHOI ,  Ho-Jun LEE ,  Jung-Suk BANG ,  Yu-Gwang JEONG

IPC: H01L33/16

CPC classification number: H01L27/12 ,  H01L27/1248 ,  H01L27/1288

Abstract: A thin film transistor (TFT) substrate is provided in which a sufficiently large contact area between conductive materials is provided in a contact portion and a method of fabricating the TFT substrate. The TFT substrate includes a gate interconnection line formed on an insulating substrate, a gate insulating layer covering the gate interconnection line, a semiconductor layer arranged on the gate insulating layer, a data interconnection line including a data line, a source electrode and a drain electrode formed on the semiconductor layer, a first passivation layer formed on the data interconnection line and exposing the drain electrode, a second passivation layer formed on the first passivation film and a pixel electrode electrically connected to the drain electrode. An outer sidewall of the second passivation layer is positioned inside an outer sidewall of the first passivation layer.

Abstract translation: 提供一种薄膜晶体管（TFT）基板，其中在接触部分中提供导电材料之间的足够大的接触面积以及制造TFT基板的方法。 TFT基板包括形成在绝缘基板上的栅极互连线，覆盖栅极互连线的栅极绝缘层，布置在栅极绝缘层上的半导体层，包括数据线，源极和漏极的数据互连线 形成在所述半导体层上，形成在所述数据互连线上并暴露所述漏电极的第一钝化层，形成在所述第一钝化膜上的第二钝化层和与所述漏电极电连接的像素电极。 第二钝化层的外侧壁位于第一钝化层的外侧壁的内侧。

公开(公告)号：US20110285697A1

公开(公告)日：2011-11-24

申请号：US12957795

申请日：2010-12-01

Applicant: Jae-Hoon LEE ,  Byoung-Jun LEE ,  Hyun-Seok KO

Inventor： Jae-Hoon LEE ,  Byoung-Jun LEE ,  Hyun-Seok KO

IPC: G06F3/038 ,  G06T15/00

CPC classification number: G06F1/3265 ,  G06F1/324 ,  Y02D10/126 ,  Y02D10/153

Abstract: A three-dimensional (“3D”) image display includes a signal controller which receives two-dimensional (“2D”) image information and 3D image information and generates control signals based on the 2D image information and the 3D image information, a clock generator which receives the control signals from the signal controller and generates a first clock signal corresponding to the 3D image information and a second clock signal corresponding to the 2D image information, and a gate driver which generates a gate-on voltage based on at least one of the first clock signal and the second clock signal, where a frequency of the second clock signal is lower than a frequency of the first clock signal and an amplitude of the second clock signal is less than an amplitude of the first clock signal.

Abstract translation: 三维（“3D”）图像显示器包括接收二维（“2D”）图像信息和3D图像信息并基于2D图像信息和3D图像信息生成控制信号的信号控制器，时钟发生器 其接收来自信号控制器的控制信号，并产生对应于3D图像信息的第一时钟信号和对应于2D图像信息的第二时钟信号;以及栅极驱动器，其基于以下步骤中的至少一个产生栅极导通电压： 第一时钟信号和第二时钟信号，其中第二时钟信号的频率低于第一时钟信号的频率，并且第二时钟信号的幅度小于第一时钟信号的幅度。

公开(公告)号：US08059745B2

公开(公告)日：2011-11-15

申请号：US12187178

申请日：2008-08-06

Applicant: Seok-Jun Lee ,  Manish Goel

Inventor： Seok-Jun Lee ,  Manish Goel

IPC: H04B7/02 ,  H04L1/02

CPC classification number: H04L27/2647 ,  H03M13/41 ,  H03M13/6306 ,  H03M13/6508 ,  H04L25/03178 ,  H04L2025/03426

Abstract: A receiver system for receiving and decoding modulated communications signals in a multiple-input, multiple-output (MIMO) environment, where the signals are modulated according to Orthogonal Frequency Division Modulation (OFDM). The receiver system includes shared decoder logic circuitry that executes a maximum-likelihood (ML) estimation algorithm in deriving the signals transmitted from the multiple transmitting antennae, as those signals were received over all of the receiving antennae. For a control channel portion of the data frame, the shared decoder logic circuitry applies Viterbi decoding to the transmitted datastreams estimated by the ML estimation algorithm. This sharing of decoder logic reduces the integrated circuit chip area, and also power dissipation, otherwise required in performing these complex decoding functions.

Abstract translation: 一种用于在多输入多输出（MIMO）环境中接收和解码调制通信信号的接收机系统，其中信号根据正交频分调制（OFDM）进行调制。 接收机系统包括共享解码器逻辑电路，该解码器逻辑电路在导出从多个发送天线发送的信号时执行最大似然（ML）估计算法，因为这些信号在所有接收天线上被接收。 对于数据帧的控制信道部分，共享解码器逻辑电路对由ML估计算法估计的所发送的数据流应用维特比解码。 解码器逻辑的这种共享降低了集成电路芯片面积以及功耗，否则在执行这些复杂的解码功能时是必需的。