Abstract:
An image reading device and an image forming apparatus having the same that can increase a scan quality by improving mounting positions of units to read information recorded on a document and a mounting structure of a light shielding member. The image reading device may include a first reading unit to read image information recorded on a first surface of a document, a second reading unit disposed at a predetermined distance from the first reading unit along a document feeding direction to read image information recorded on a second surface of the document, and at least one light shielding member mounted between the first reading unit and the second reading unit along the document feeding direction. The light shielding member may extend in a direction different from the document feeding direction such that one end portion is located in a document feeding path. The light shielding member may be provided with a document guide portion to guide the document.
Abstract:
An UpLink (UL) scheduling method and apparatus considering a characteristic of a power amplifier in a mobile communication terminal are provided. The UL scheduling method includes calculating a packet transmission time, which minimizes energy consumed in packet transmission, by using a Direct Current (DC) voltage used in a power amplifier for signal amplification and by using nonlinear amplification efficiency; and scheduling UL data by using the calculated packet transmission time.
Abstract:
A CMOS image sensor and a method for fabricating the same are provided, in which an N type region of a photodiode is prevented from adjoining a device isolation film and a dark current is reduced. The CMOS image sensor includes an interlayer dielectric film formed between a gate poly and a power line, a contact formed in the interlayer dielectric film, and an epitaxial layer connected with the contact and formed only in a blue photodiode region.
Abstract:
A CMOS image sensor and a method for manufacturing the same are disclosed, in which a blue photodiode is imparted with a greater thickness to improve sensitivity of blue light. The blue photodiode of a CMOS image sensor includes a first lightly doped P-type epitaxial layer formed on a heavily doped P-type semiconductor substrate; a gate electrode of a transfer transistor formed on the first epitaxial layer; a first N-type blue photodiode region formed on the first epitaxial layer; and a second N-type blue photodiode region formed on the first epitaxial layer corresponding to the first blue photodiode region.
Abstract:
An image sensor may include a color filter layer on a semiconductor substrate; and a microlens on the color filter layer and including a non-photosensitive insulating layer.
Abstract:
A method of manufacturing a CMOS device including: sequentially forming a first silicon oxide film and a first polysilicon film on a lower substrate; performing an ion implantation process with respect to the first polysilicon film to form a plurality of lower conductors spaced apart from one another at a predetermined interval; forming a plurality of N-type semiconductor films and P-type semiconductor films which are formed by being spaced apart from one another at a predetermined interval and are in contact with the lower conductors; forming a plurality of upper conductors electrically connected to the N-type semiconductor films and P-type semiconductor films; forming an upper substrate on the upper conductors; forming a second polysilicon film on the upper substrate; forming a device isolation film and a photodiode in the second polysilicon film; forming a gate electrode including an insulating sidewall on the second polysilicon film; forming an insulating film on an epitaxial layer with the gate electrode; forming a color filter array on the insulating film; forming a planarization layer on the color filter array; and forming a microlens on the planarization layer.
Abstract:
A CMOS image sensor and a method for fabricating the same are provided, in which an N type region of a photodiode is prevented from adjoining a device isolation film and a dark current is reduced. The CMOS image sensor includes an interlayer dielectric film formed between a gate poly and a power line, a contact formed in the interlayer dielectric film, and an epitaxial layer connected with the contact and formed only in a blue photodiode region.
Abstract:
A semiconductor package may include a substrate having external contact terminals. A semiconductor chip having bonding pads may be formed on the substrate. Conductive bumps may connect the external contact terminals of the substrate to the bonding pads of the semiconductor chip. An underfill may be interposed between the substrate and the semiconductor chip. The underfill may include a first underfill region composed of a first material adjacent to the semiconductor chip and a second underfill region composed of a second material adjacent to the substrate, the first material having a higher glass transition temperature than the second material.
Abstract:
A thermal image forming apparatus includes a platen roller and a thermal printhead. A heating portion of the thermal printhead has a plurality of heating elements arranged along an area where the platen roller and the thermal printhead form a printing nip. A plurality of driving integrated circuits are mounted on a substrate and connected to the heating elements of the heating portion. A block is formed higher than the driving integrated circuits such that the driving integrated circuits are disposed between the block and the heating portion. A conveying unit is disposed toward the heating portion of the thermal printhead and conveys a sheet of paper between the platen roller and the thermal printhead.
Abstract:
Methods of fabricating semiconductor devices are disclosed. One example method includes forming a gate oxide and a gate electrode on a semiconductor substrate; performing a first ion implantation process for the formation of an LDD (lightly doped drain) region in the substrate; forming spacers on the sidewalls of the gate electrode; performing a second ion implantation process for the formation of a junction region in the substrate using the spacers as mask; forming a trench for device isolation by removing selectively the top portion of the substrate between the spacers; forming a sidewall oxide layer on the resulting substrate; forming a diffusion barrier on the sidewall oxide layer; depositing a gap filling insulation layer over the diffusion barrier; planarizing the gap filling insulating layer; and removing selectively some part of the gap filling insulation layer to form contact holes.