公开(公告)号：US07718348B2

公开(公告)日：2010-05-18

申请号：US12244857

申请日：2008-10-03

Applicant: Ching-Yu Chang

Inventor： Ching-Yu Chang

IPC: G03C5/00

CPC classification number: G03F7/70441 ,  G03F1/36

Abstract: In a photolithography process, a photoresist layer is formed on a substrate. A photomask is aligned over the substrate to transfer pattern images defined in the photomask on the substrate. The photomask includes first and second patterns of different light transmission rates, and a dummy pattern surrounding the second pattern having a light transmission rate lower than that of the first pattern. The substrate is exposed to a light radiation through the photomask. The photoresist layer then is developed to form the pattern images. The dummy pattern is dimensionally configured to allow light transmission, but in a substantially amount so that the dummy pattern is not imaged during exposure.

Abstract translation: 在光刻工艺中，在基板上形成光致抗蚀剂层。 光掩模在衬底上对准以传输在衬底上的光掩模中限定的图案图像。 光掩模包括不同透光率的第一和第二图案，以及围绕第二图案的虚拟图案，其透光率低于第一图案的透光率。 将基板暴露于通过光掩模的光辐射。 然后将光致抗蚀剂层显影以形成图案图像。 虚拟图案被尺寸地构造成允许光透射，但是基本上是这样的，使得在曝光期间伪图案不被成像。

公开(公告)号：US20100093176A1

公开(公告)日：2010-04-15

申请号：US12536805

申请日：2009-08-06

Applicant: Ching-Yu Chang

Inventor： Ching-Yu Chang

IPC: H01L21/306

CPC classification number: H01L21/32139 ,  H01L21/31111 ,  H01L21/31133

Abstract: The present disclosure provides a method for making a semiconductor device. The method includes forming a material layer on a substrate; forming a sacrificial layer on the material layer, where the material layer and sacrificial layer each as a thickness less than 100 angstrom; forming a patterned photoresist layer on the sacrificial layer; applying a first wet etching process to etch the sacrificial layer to form a patterned sacrificial layer using the patterned photoresist layer as a mask; applying a second wet etching process to etch the first material layer; and applying a third wet etching process to remove the patterned sacrificial layer.

Abstract translation: 本公开提供了制造半导体器件的方法。 该方法包括在基板上形成材料层; 在材料层上形成牺牲层，其中材料层和牺牲层各自的厚度小于100埃; 在所述牺牲层上形成图案化的光致抗蚀剂层; 施加第一湿蚀刻工艺以蚀刻牺牲层以使用图案化的光致抗蚀剂层作为掩模形成图案化的牺牲层; 施加第二湿蚀刻工艺以蚀刻第一材料层; 以及施加第三湿蚀刻工艺以去除图案化的牺牲层。

公开(公告)号：US07473517B2

公开(公告)日：2009-01-06

申请号：US11025538

申请日：2004-12-29

Applicant: Ching-Yu Chang ,  Burn Jeng Lin ,  Chi-Wen Liu

Inventor： Ching-Yu Chang ,  Burn Jeng Lin ,  Chi-Wen Liu

IPC: G03F7/30

CPC classification number: G03F7/322

Abstract: A method of creating a resist image on a semiconductor substrate includes exposing a layer of photoresist on the semiconductor substrate and developing the exposed layer of photoresist using a first fluid including supercritical carbon dioxide and a base such as Tetra-Methyl Ammonium Hydroxide (TMAH). Additionally, the developed photoresist can be cleaned using a second fluid including supercritical carbon dioxide and a solvent such as methanol, ethanol, isopropanol, and xylene.

Abstract translation: 在半导体衬底上产生抗蚀剂图像的方法包括：使用包括超临界二氧化碳和碱（例如四甲基氢氧化铵（TMAH））的第一流体在半导体衬底上曝光光致抗蚀剂层并显影曝光的光致抗蚀剂层。 此外，可以使用包括超临界二氧化碳和溶剂如甲醇，乙醇，异丙醇和二甲苯的第二流体来清洗显影的光致抗蚀剂。

公开(公告)号：US20080304025A1

公开(公告)日：2008-12-11

申请号：US11760365

申请日：2007-06-08

Applicant: Ching-Yu Chang ,  Burn Jeng Lin

Inventor： Ching-Yu Chang ,  Burn Jeng Lin

IPC: G03B27/42

CPC classification number: G03F7/70716 ,  G03F7/70341

Abstract: An immersion lithography apparatus includes a lens assembly having an imaging lens, a wafer stage for securing a wafer beneath the lens assembly, a fluid module for providing a fluid into a space between the lens assembly and the wafer, and a plurality of extraction units positioned proximate to an edge of the wafer. The extraction units are configured to operate independently to remove a portion of the fluid provided into the space between the lens assembly and the wafer.

Abstract translation: 浸没式光刻设备包括具有成像透镜的透镜组件，用于将晶片固定在透镜组件下方的晶片台，用于将流体提供到透镜组件和晶片之间的空间的流体模块以及定位在多个提取单元 靠近晶片的边缘。 提取单元被配置为独立地操作以去除设置在透镜组件和晶片之间的空间中的一部分流体。

公开(公告)号：US20080299487A1

公开(公告)日：2008-12-04

申请号：US11828809

申请日：2007-07-26

Applicant: Ching-Yu Chang

Inventor： Ching-Yu Chang

IPC: G03C1/04 ,  G03F5/00

CPC classification number: G03F7/2041 ,  G03F7/0046

Abstract: An immersion lithography resist material comprising a matrix polymer having a first polarity and an additive having a second polarity that is substantially greater than the first polarity. The additive may have a molecular weight that is less than about 1000 Dalton. The immersion lithography resist material may have a contact angle that is substantially greater than the contact angle of the matrix polymer.

Abstract translation: 一种浸没式光刻抗蚀剂材料，包括具有第一极性的基质聚合物和具有基本上大于第一极性的第二极性的添加剂。 添加剂可以具有小于约1000道尔顿的分子量。 浸没式光刻抗蚀剂材料可具有基本上大于基质聚合物的接触角的接触角。

公开(公告)号：US20080185021A1

公开(公告)日：2008-08-07

申请号：US11671570

申请日：2007-02-06

Applicant: Chih-Cheng Chiu ,  Ching-Yu Chang

Inventor： Chih-Cheng Chiu ,  Ching-Yu Chang

IPC: B08B3/04

CPC classification number: G03F1/82 ,  Y10S134/902

Abstract: A method for cleaning a photomask includes cleaning the photomask with a chemical cleaner, introducing a solution to the photomask, the solution is configured to react with residuals generated from the chemical cleaner to form insoluble precipitates, and rinsing the photomask with a fluid to remove the insoluble precipitates from the photomask.

Abstract translation: 用于清洁光掩模的方法包括用化学清洁剂清洁光掩模，将溶液引入到光掩模中，溶液被配置为与由化学清洁剂产生的残余物反应以形成不溶性沉淀物，并用流体冲洗光掩模以除去 来自光掩模的不溶性沉淀物。

公开(公告)号：US07323393B2

公开(公告)日：2008-01-29

申请号：US11715527

申请日：2007-03-07

Applicant: Yu-Lin Yen ,  Ching-Yu Chang

Inventor： Yu-Lin Yen ,  Ching-Yu Chang

IPC: H01L21/76

CPC classification number: G03F9/7003 ,  G03F7/70633 ,  G03F9/7076 ,  G03F9/708 ,  G03F9/7084 ,  H01L23/544 ,  H01L2223/5442 ,  H01L2223/54453 ,  H01L2924/0002 ,  Y10S438/975 ,  H01L2924/00

Abstract: An integrated circuit capable of operating despite a profile shift is disclosed. Overlay marks on the integrated circuit are surrounded by a trench that tends to relieve the effect of a profile shift caused by stress applied to the integrated circuit. The position of the overlay marks tends, therefore, not to be affected by the stress.

Abstract translation: 公开了尽管轮廓偏移的能够运行的集成电路。 集成电路上的覆盖标记被沟槽包围，该沟槽倾向于减轻由施加到集成电路的应力引起的轮廓移位的影响。 因此，覆盖标记的位置倾向于不受应力的影响。

公开(公告)号：US07252911B2

公开(公告)日：2007-08-07

申请号：US10810920

申请日：2004-03-26

Applicant: Ching-Yu Chang

Inventor： Ching-Yu Chang

IPC: G03F1/00

CPC classification number: G03F1/60 ,  G03F1/40 ,  H01J2237/31794

Abstract: An ESD-resistant photomask and method of preventing mask ESD damage is disclosed. The ESD-resistant photomask includes a mask substrate, a pattern-forming material provided on the substrate, a circuit pattern defined by exposure regions etched in the pattern-forming material, and positive or negative ions implanted into the mask substrate throughout ion implantation regions. The ions in the ion implantation regions dissipate electrostatic charges on the mask, thus preventing the buildup of electrostatic charges which could otherwise attract image-distorting particles to the mask or damage the mask.

Abstract translation: 公开了一种防静电防护光掩模和防止掩膜ESD损伤的方法。 防静电光掩模包括掩模基板，设置在基板上的图案形成材料，由在图案形成材料中蚀刻的曝光区域限定的电路图案，以及在离子注入区域中注入到掩模基板中的正或负离子。 离子注入区域中的离子消耗掩模上的静电电荷，从而防止静电电荷的积累，否则可能会吸引图像变形颗粒到掩模或损坏掩模。

公开(公告)号：US20070082275A1

公开(公告)日：2007-04-12

申请号：US11245522

申请日：2005-10-07

Applicant: Ching-Yu Chang

Inventor： Ching-Yu Chang

IPC: G03F1/00

CPC classification number: G03F1/36

Abstract: An optical proximity correction photomask comprises a transparent substrate, a main feature having a first transmitivity disposed on the transparent substrate and at least one assist feature having a second transmitivity disposed beside the main feature and on the transparent substrate, wherein the first transmitivity is not equal to the second transmitivity.

Abstract translation: 光学邻近校正光掩模包括透明衬底，具有设置在透明衬底上的第一透射率的主要特征和在主要特征旁边和透明衬底上具有第二透射率的至少一个辅助特征，其中第一透射率不相等 到第二个透射率。

公开(公告)号：US07192845B2

公开(公告)日：2007-03-20

申请号：US10864562

申请日：2004-06-08

Applicant: Yu Lin Yen ,  Ching-Yu Chang

Inventor： Yu Lin Yen ,  Ching-Yu Chang

IPC: H01L21/76 ,  H01L21/78 ,  H01L21/46 ,  H01L23/544

CPC classification number: H01L23/544 ,  H01L2223/54453 ,  H01L2924/0002 ,  Y10S438/975 ,  H01L2924/00

Abstract: An integrated circuit in which measurement of the alignment between subsequent layers has less susceptibility to stress induced shift. A first layer of the structure has a first overlay mark. A second and/or a third layer are formed in the alignment structure and on the first layer. Portions of the second and/or third layer are selectively removed from regions in and around the first overlay mark. A second overlay mark is formed and aligned to the first overlay mark. The alignment between the second overlay mark and first overlay mark may be measured with an attenuated error due to reflection and refraction or due to an edge profile shift of the first overlay mark.

Abstract translation: 一种集成电路，其中后续层之间的对准测量对应力诱导偏移具有较小的敏感性。 该结构的第一层具有第一覆盖标记。 在对准结构中和第一层上形成第二层和/或第三层。 第二层和/或第三层的部分从第一重叠标记中和周围的区域选择性地去除。 形成第二重叠标记并与第一覆盖标记对准。 可以由于反射和折射或由于第一重叠标记的边缘轮廓偏移而具有衰减误差来测量第二覆盖标记和第一覆盖标记之间的对准。