公开(公告)号：US20180083076A1

公开(公告)日：2018-03-22

申请号：US15686781

申请日：2017-08-25

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA

IPC: H01L27/32 ,  H01L27/12 ,  H01L29/786 ,  G09G3/3225 ,  G09G3/36 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: H01L27/3244 ,  G02F1/136209 ,  G02F1/136227 ,  G02F1/1368 ,  G09G3/3225 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2300/0842 ,  G09G2320/0247 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/78633 ,  H01L29/7869

Abstract: The purpose of the present invention is to form both LTPS TFT and semiconductor TFT in a same substrate. The feature of the display device to realize the above purpose is that: a display device having a display area containing a pixel comprising: the pixel includes a first TFT having an oxide semiconductor, a gate insulating film is formed on the oxide semiconductor, a first gate electrode is formed on the gate insulating film, a first source/drain electrode formed by a metal or an alloy contacts a source or a drain of the semiconductor the first gate electrode and the first source/drain electrode are formed by the same material.

公开(公告)号：US20170358606A1

公开(公告)日：2017-12-14

申请号：US15617547

申请日：2017-06-08

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Masayoshi FUCHI

IPC: H01L27/12 ,  H01L23/532 ,  H01L21/02 ,  H01L23/522 ,  H01L29/786 ,  H01L21/768

CPC classification number: H01L27/124 ,  H01L21/02063 ,  H01L21/76802 ,  H01L21/76843 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53266 ,  H01L27/1218 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/1262 ,  H01L29/78603 ,  H01L29/78675 ,  H01L29/7869

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer located above the insulating substrate, a second semiconductor layer located above the insulating substrate, an insulating layer which covers the first semiconductor layer and the second semiconductor layer, and includes a first contact hole reaching the first semiconductor layer and a second contact hole reaching the second semiconductor layer, a barrier layer which covers one of the first semiconductor layer inside the first contact hole and the second semiconductor layer inside the second contact hole, and a first conductive layer which is in contact with the barrier layer.

公开(公告)号：US20170207245A1

公开(公告)日：2017-07-20

申请号：US15405511

申请日：2017-01-13

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Hajime WATAKABE ,  Kazufumi WATABE

IPC: H01L27/12

CPC classification number: H01L27/1225 ,  H01L27/1237 ,  H01L27/1248 ,  H01L27/1251 ,  H01L29/42384 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78606 ,  H01L29/78633 ,  H01L29/78675 ,  H01L29/7869 ,  H01L2029/42388

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.