Patterning method
    81.
    发明授权
    Patterning method 有权
    图案化方法

    公开(公告)号:US07851370B2

    公开(公告)日:2010-12-14

    申请号:US11860792

    申请日:2007-09-25

    IPC分类号: H01L21/302 H01L21/461

    CPC分类号: H01L21/76224 H01L22/26

    摘要: A patterning method is provided. In the patterning method, a film is formed on a substrate and a pre-layer information is measured. Next, an etching process is performed to etch the film. The etching process includes a main etching step, an etching endpoint detection step, an extension etching step and an over etching step. An extension etching time for performing the extension etching step is set within 10 seconds based on a predetermined correlation between an extension etching time and the pre-layer information, so as to achieve a required film profile.

    摘要翻译: 提供了图案化方法。 在图案化方法中,在基板上形成膜,并测量预层信息。 接下来,进行蚀刻处理以蚀刻该膜。 蚀刻工艺包括主蚀刻步骤,蚀刻终点检测步骤,延伸蚀刻步骤和过蚀刻步骤。 基于预定的延长蚀刻时间和预层信息之间的相关性,在10秒钟内设置用于进行延长蚀刻步骤的延长蚀刻时间,以获得所需的膜轮廓。

    Method of forming at least an opening using a tri-layer structure
    82.
    发明授权
    Method of forming at least an opening using a tri-layer structure 有权
    使用三层结构形成至少一个开口的方法

    公开(公告)号:US07829472B2

    公开(公告)日:2010-11-09

    申请号:US12099788

    申请日:2008-04-09

    IPC分类号: H01L21/214

    摘要: A method of forming openings is disclosed. A substrate is first provided, and the tri-layer structure is formed on the substrate. The tri-layer structure includes a bottom photoresist layer, a silicon-containing layer and a top photoresist layer form bottom to top. Subsequently, the top photoresist layer is patterned, and the silicon-containing layer is etched by utilizing the top photoresist layer as an etching mask to partially expose the bottom photoresist layer. Next, the partially exposed bottom photoresist layer is etched through two etching steps in turn by utilizing the patterned silicon-containing layer as an etching mask. The first etching step includes an oxygen gas and at least one non-carbon-containing halogen-containing gas, while the second etching step includes at least one halogen-containing gas. The substrate is thereafter etched by utilizing the patterned bottom photoresist layer as an etching mask to form at least an opening in the substrate.

    摘要翻译: 公开了一种形成开口的方法。 首先提供衬底,并且在衬底上形成三层结构。 三层结构包括底部光致抗蚀剂层,含硅层和从顶部到顶部形成的顶部光致抗蚀剂层。 随后,对顶部光致抗蚀剂层进行图案化,并且通过利用顶部光致抗蚀剂层作为蚀刻掩模来蚀刻含硅层以部分地曝光底部光致抗蚀剂层。 接下来,通过利用图案化的含硅层作为蚀刻掩模,依次通过两个蚀刻步骤蚀刻部分曝光的底部光致抗蚀剂层。 第一蚀刻步骤包括氧气和至少一种含有非含卤素的气体,而第二蚀刻步骤包括至少一种含卤素的气体。 然后通过利用图案化的底部光致抗蚀剂层作为蚀刻掩模来蚀刻衬底,以在衬底中形成至少一个开口。

    METHOD OF FORMING AT LEAST AN OPENING USING A TRI-LAYER STRUCTURE
    83.
    发明申请
    METHOD OF FORMING AT LEAST AN OPENING USING A TRI-LAYER STRUCTURE 有权
    使用三层结构形成至少打开的方法

    公开(公告)号:US20090258499A1

    公开(公告)日:2009-10-15

    申请号:US12099788

    申请日:2008-04-09

    IPC分类号: H01L21/311

    摘要: A method of forming openings is disclosed. A substrate is first provided, and the tri-layer structure is formed on the substrate. The tri-layer structure includes a bottom photoresist layer, a silicon-containing layer and a top photoresist layer form bottom to top. Subsequently, the top photoresist layer is patterned, and the silicon-containing layer is etched by utilizing the top photoresist layer as an etching mask to partially expose the bottom photoresist layer. Next, the partially exposed bottom photoresist layer is etched through two etching steps in turn by utilizing the patterned silicon-containing layer as an etching mask. The first etching step includes an oxygen gas and at least one non-carbon-containing halogen-containing gas, while the second etching step includes at least one halogen-containing gas. The substrate is thereafter etched by utilizing the patterned bottom photoresist layer as an etching mask to form at least an opening in the substrate.

    摘要翻译: 公开了一种形成开口的方法。 首先提供衬底,并且在衬底上形成三层结构。 三层结构包括底部光致抗蚀剂层,含硅层和从顶部到顶部形成的顶部光致抗蚀剂层。 随后,对顶部光致抗蚀剂层进行图案化,并且通过利用顶部光致抗蚀剂层作为蚀刻掩模来蚀刻含硅层以部分地曝光底部光致抗蚀剂层。 接下来,通过利用图案化的含硅层作为蚀刻掩模,依次通过两个蚀刻步骤蚀刻部分曝光的底部光致抗蚀剂层。 第一蚀刻步骤包括氧气和至少一种含有非含卤素的气体,而第二蚀刻步骤包括至少一种含卤素的气体。 然后通过利用图案化的底部光致抗蚀剂层作为蚀刻掩模来蚀刻衬底,以在衬底中形成至少一个开口。

    METHOD FOR FABRICATING STRAINED-SILICON CMOS TRANSISTOR
    84.
    发明申请
    METHOD FOR FABRICATING STRAINED-SILICON CMOS TRANSISTOR 有权
    制备应变硅CMOS晶体管的方法

    公开(公告)号:US20080191287A1

    公开(公告)日:2008-08-14

    申请号:US11674660

    申请日:2007-02-13

    IPC分类号: H01L27/092 H01L21/8238

    CPC分类号: H01L21/823807 H01L29/7843

    摘要: First, a semiconductor substrate having a first active region and a second active region is provided. The first active region includes a first transistor and the second active region includes a second transistor. A first etching stop layer, a stress layer, and a second etching stop layer are disposed on the first transistor, the second transistor and the isolation structure. A first etching process is performed by using a patterned photoresist disposed on the first active region as a mask to remove the second etching stop layer and a portion of the stress layer from the second active region. The patterned photoresist is removed, and a second etching process is performed by using the second etching stop layer of the first active region as a mask to remove the remaining stress layer and a portion of the first etching stop layer from the second active region.

    摘要翻译: 首先,提供具有第一有源区和第二有源区的半导体基板。 第一有源区包括第一晶体管,第二有源区包括第二晶体管。 第一蚀刻停止层,应力层和第二蚀刻停止层设置在第一晶体管,第二晶体管和隔离结构上。 通过使用设置在第一有源区上的图案化光致抗蚀剂作为掩模来执行第一蚀刻工艺,以从第二有源区移除第二蚀刻停止层和应力层的一部分。 去除图案化的光致抗蚀剂,并且通过使用第一有源区的第二蚀刻停止层作为掩模来执行第二蚀刻工艺,以从第二有源区去除剩余的应力层和第一蚀刻停止层的一部分。

    METHOD FOR FORMING CONTACT HOLE
    85.
    发明申请
    METHOD FOR FORMING CONTACT HOLE 审中-公开
    形成接触孔的方法

    公开(公告)号:US20080176401A1

    公开(公告)日:2008-07-24

    申请号:US11626004

    申请日:2007-01-23

    IPC分类号: H01L21/3065

    CPC分类号: H01L21/02063 H01L21/76814

    摘要: A method for forming a contact hole. The method comprises steps of performing a substrate having at least a dielectric layer formed thereon and then forming a patterned mask layer on the dielectric layer, wherein the patterned mask layer exposes a portion of the dielectric layer. The dielectric layer is patterned to form a contact hole by using the patterned mask layer as a mask, wherein an aspect ratio of the contact hole is larger than 4. The patterned mask layer is removed and a wet cleaning process is performed. A plasma treatment is performed on the substrate in a first tool system, wherein a gas source for the plasma treatment is a hydrogen-nitrogen-containing gas. A vacuum system of the first tool system is broken and then the substrate is transferred into a second tool system. An argon plasma treatment is performed on the substrate in the second tool system.

    摘要翻译: 一种形成接触孔的方法。 该方法包括以下步骤:执行至少在其上形成介电层的衬底,然后在电介质层上形成图案化掩模层,其中图案化掩模层露出电介质层的一部分。 图案化电介质层以通过使用图案化掩模层作为掩模形成接触孔,其中接触孔的纵横比大于4.除去图案化掩模层并进行湿式清洗处理。 在第一工具系统中的基板上进行等离子体处理,其中用于等离子体处理的气体源是含氢气体。 第一工具系统的真空系统被破坏,然后将衬底转移到第二工具系统中。 在第二工具系统中的基板上进行氩等离子体处理。

    METHOD OF FABRICATING OPENINGS AND CONTACT HOLES
    86.
    发明申请
    METHOD OF FABRICATING OPENINGS AND CONTACT HOLES 有权
    制作开口和接触孔的方法

    公开(公告)号:US20080153295A1

    公开(公告)日:2008-06-26

    申请号:US12042340

    申请日:2008-03-05

    IPC分类号: H01L21/768 H01L21/311

    摘要: A semiconductor substrate having an etch stop layer and at least a dielectric layer disposed from bottom to top is provided. The dielectric layer and the etching stop layer is then patterned to form a plurality of openings exposing the semiconductor substrate. A dielectric thin film is subsequently formed to cover the dielectric layer, the sidewalls of the openings, and the semiconductor substrate. The dielectric thin film disposed on the dielectric layer and the semiconductor substrate is then removed while the dielectric thin film disposed on the sidewalls remains.

    摘要翻译: 提供具有蚀刻停止层和至少从底部到顶部设置的电介质层的半导体衬底。 然后对电介质层和蚀刻停止层进行构图以形成暴露半导体衬底的多个开口。 随后形成介电薄膜以覆盖电介质层,开口的侧壁和半导体衬底。 然后去除设置在电介质层和半导体衬底上的电介质薄膜,同时保留设置在侧壁上的电介质薄膜。

    Semiconductor manufacturing process
    88.
    发明申请
    Semiconductor manufacturing process 有权
    半导体制造工艺

    公开(公告)号:US20080146036A1

    公开(公告)日:2008-06-19

    申请号:US11611890

    申请日:2006-12-18

    IPC分类号: H01L21/3065

    摘要: Disclosed is a semiconductor manufacturing process, in which a fluorine radical-containing plasma is used to etch a hard mask and a layer therebeneath; and a treatment is carried out using a gas reactive to fluorine radicals for reacting with residual fluorine radicals to form a fluorine-containing compound and remove it. Thus, precipitates formed by the reaction of fluorine radicals and titanium components existing in the hard mask to cause a process defect can be avoided.

    摘要翻译: 公开了一种半导体制造方法,其中使用含氟自由基的等离子体来蚀刻硬掩模和其下面的层; 并且使用与氟自由基反应的气体与残留的氟自由基反应来进行处理以形成含氟化合物并将其除去。 因此,可以避免通过存在于硬掩模中的氟自由基和钛成分的反应形成的沉淀物引起工艺缺陷。

    ETCHING METHOD
    89.
    发明申请
    ETCHING METHOD 审中-公开
    蚀刻方法

    公开(公告)号:US20080090422A1

    公开(公告)日:2008-04-17

    申请号:US11954214

    申请日:2007-12-12

    IPC分类号: H01L21/311

    摘要: An etching method is described, including a first etching step that uses a first etching gas including a first fluorinated hydrocarbon compound, and a second etching step that uses a second etching gas including a second fluorinated hydrocarbon compound. The hydrogen content in the first fluorinated hydrocarbon compound is lower than that in the second fluorinated hydrocarbon compound, such that the after-etching-inspection (AEI) critical dimension is smaller than the after-development-inspection (ADI) critical dimension.

    摘要翻译: 描述了一种蚀刻方法,包括使用包括第一氟化烃化合物的第一蚀刻气体的第一蚀刻步骤和使用包括第二氟化烃化合物的第二蚀刻气体的第二蚀刻步骤。 第一氟化烃化合物中的氢含量低于第二氟化烃化合物中的氢含量,使得蚀刻后检验(AEI)临界尺寸小于显影后检验(ADI)临界尺寸。

    STACKED STRUCTURE AND PATTERNING METHOD USING THE SAME
    90.
    发明申请
    STACKED STRUCTURE AND PATTERNING METHOD USING THE SAME 有权
    使用它的堆叠结构和方式

    公开(公告)号:US20080045033A1

    公开(公告)日:2008-02-21

    申请号:US11464496

    申请日:2006-08-15

    IPC分类号: H01L21/467 H01L23/58

    摘要: A stacked structure for patterning a material layer to form an opening pattern with a predetermined opening width in the layer is provided. The stacked structure includes an underlayer, a silicon rich organic layer, and a photoresist layer. The underlayer is on the material layer. The silicon rich organic layer is between the underlayer and the photoresist layer. The thickness of the photoresist layer is smaller than that of the underlayer and larger than two times of the thickness of the silicon rich organic layer. The thickness of the underlayer is smaller than three times of the predetermined opening width.

    摘要翻译: 提供了用于图案化材料层以形成在该层中具有预定开口宽度的开口图案的层叠结构。 层叠结构包括底层,富硅有机层和光致抗蚀剂层。 底层在材料层上。 富硅有机层位于底层和光刻胶层之间。 光致抗蚀剂层的厚度小于底层的厚度,并且大于富硅有机层的厚度的两倍。 底层的厚度小于预定开口宽度的三倍。