公开(公告)号：US20130151780A1

公开(公告)日：2013-06-13

申请号：US13611614

申请日：2012-09-12

申请人： David M. Daly ,  Benjiman L. Goodman ,  Stephen J. Powell ,  Aaron C. Sawdey ,  Jeffrey A. Stuecheli

发明人： David M. Daly ,  Benjiman L. Goodman ,  Stephen J. Powell ,  Aaron C. Sawdey ,  Jeffrey A. Stuecheli

IPC分类号： G06F12/08

CPC分类号： G06F12/122 ,  G06F12/0897 ,  G06F12/121

摘要： A mechanism is provided for weighted history allocation prediction. For each member in a plurality of members in a lower level cache, an associated reference counter is initialized to an initial value based on an operation type that caused data to be allocated to a member location of the member. For each access to the member in the lower level cache, the associated reference counter is incremented. Responsive to a new allocation of data to the lower level cache and responsive to the new allocation of data requiring the victimization of another member in the lower level cache, a member of the lower level cache is identified that has a lowest reference count value in its associated reference counter. The member with the lowest reference count value in its associated reference counter is then evicted.

公开(公告)号：US20130151777A1

公开(公告)日：2013-06-13

申请号：US13315381

申请日：2011-12-09

申请人： David M. Daly ,  Benjiman L. Goodman ,  Stephen J. Powell ,  Aaron C. Sawdey ,  Jeffrey A. Stuecheli

发明人： David M. Daly ,  Benjiman L. Goodman ,  Stephen J. Powell ,  Aaron C. Sawdey ,  Jeffrey A. Stuecheli

IPC分类号： G06F12/08

CPC分类号： G06F12/0888 ,  G06F12/0897 ,  G06F12/126

摘要： A mechanism is provided for dynamic cache allocation using a cache hit rate. A first cache hit rate is monitored in a first subset utilizing a first allocation policy of N sets of a lower level cache. A second cache hit rate is also monitored in a second subset utilizing a second allocation policy different from the first allocation policy of the N sets of the lower level cache. A periodic comparison of the first cache hit rate to the second cache hit rate is made to identify a third allocation policy for a third subset of the N-sets of the lower level cache. The third allocation policy for the third subset is then periodically adjusted to at least one of the first allocation policy or the second allocation policy based on the comparison of the first cache hit rate to the second cache hit rate.

摘要翻译： 提供了一种用于使用高速缓存命中率进行动态高速缓存分配的机制。 使用N组较低级高速缓存的第一分配策略，在第一子集中监视第一高速缓存命中率。 利用与下一级高速缓存的N组的第一分配策略不同的第二分配策略，也在第二子集中监视第二高速缓存命中率。 进行第一高速缓存命中率与第二高速缓存命中率的周期性比较，以识别下级高速缓存的N组的第三子集的第三分配策略。 然后，基于第一高速缓存命中率与第二高速缓存命中率的比较，将第三子集的第三分配策略周期性地调整为第一分配策略或第二分配策略中的至少一个。

公开(公告)号：US20130117513A1

公开(公告)日：2013-05-09

申请号：US13290702

申请日：2011-11-07

申请人： Mark A. Brittain ,  John Steven Dodson ,  Benjiman L. Goodman ,  Stephen J. Powell ,  Eric E. Retter ,  Jeffrey A. Stuecheli

发明人： Mark A. Brittain ,  John Steven Dodson ,  Benjiman L. Goodman ,  Stephen J. Powell ,  Eric E. Retter ,  Jeffrey A. Stuecheli

IPC分类号： G06F12/14

CPC分类号： G06F13/1626 ,  G06F13/16

摘要： Techniques for handling queuing of memory accesses prevent passing excessive requests that implicate a region of memory subject to a high latency memory operation, such as a memory refresh operation, memory scrubbing or an internal bus calibration event, to a re-order queue of a memory controller. The memory controller includes a queue for storing pending memory access requests, a re-order queue for receiving the requests, and a control logic implementing a queue controller that determines if there is a collision between a received request and an ongoing high-latency memory operation. If there is a collision, then transfer of the request to the re-order queue may be rejected outright, or a count of existing queued operations that collide with the high latency operation may be used to determine if queuing the new request will exceed a threshold number of such operations.

摘要翻译： 用于处理存储器访问排队的技术防止传递过多的请求，这些请求涉及存储器的区域，这些存储器受到诸如存储器刷新操作，存储器擦除或内部总线校准事件的高等待时间存储器操作到存储器的重新排序队列 控制器。 存储器控制器包括用于存储未决存储器访问请求的队列，用于接收请求的重新排序队列，以及实现队列控制器的控制逻辑，该队列控制器确定接收到的请求和正在进行的高延迟存储器操作之间是否存在冲突 。 如果存在冲突，则将请求转发到重新排序队列可能被直接拒绝，或者可能使用与高等待时间操作相冲突的现有排队操作的计数来确定新请求的队列是否将超过阈值 此类操作的数量。

公开(公告)号：US08122223B2

公开(公告)日：2012-02-21

申请号：US12105401

申请日：2008-04-18

申请人： Jason F. Cantin ,  Richard Nicholas ,  Eric E. Retter ,  Jeffrey A. Stuecheli

发明人： Jason F. Cantin ,  Richard Nicholas ,  Eric E. Retter ,  Jeffrey A. Stuecheli

IPC分类号： G06F12/00 ,  G06F9/26 ,  G06F9/34

CPC分类号： G06F12/0862 ,  G06F12/0831 ,  G06F2212/1016 ,  Y02D10/13

摘要： An access speculation predictor may predict whether to perform speculative retrieval of data for a data request from a main memory based on whether or not a current requestor tag matches a previous requestor tag. In particular, a first address and a first requester tag may be extracted from a first data request and a finite state machine (FSM) of a memory controller may be selected whose memory region includes the first address. A second requester tag, that identifies a previous requester that attempted to access the memory region association with the selected FSM, may be retrieved from a register associated with the selected FSM and compared to the first requester tag. Speculatively retrieving the data for the first data request from a main memory may be controlled based on results of the comparison of the first requester tag to the second requester tag.

摘要翻译： 访问推测预测器可以基于当前请求者标签是否匹配先前的请求者标签来预测是否对来自主存储器的数据请求的数据进行推测检索。 特别地，可以从第一数据请求中提取第一地址和第一请求者标签，并且可以选择存储器控制器的有限状态机（FSM），其存储器区域包括第一地址。 可以从与所选FSM相关联的寄存器中检索识别尝试访问与选择的FSM的存储器区域关联的先前请求者的第二请求者标签，并与第一请求者标签进行比较。 可以基于第一请求者标签与第二请求者标签的比较的结果来控制从主存储器推测地检索第一数据请求的数据。

公开(公告)号：US20100268882A1

公开(公告)日：2010-10-21

申请号：US12424207

申请日：2009-04-15

申请人： Robert Alan Cargnoni ,  Guy Lynn Guthrie ,  Stephen James Powell ,  William John Starke ,  Jeffrey A. Stuecheli

发明人： Robert Alan Cargnoni ,  Guy Lynn Guthrie ,  Stephen James Powell ,  William John Starke ,  Jeffrey A. Stuecheli

IPC分类号： G06F12/08 ,  G06F12/12

CPC分类号： G06F12/123 ,  G06F12/084 ,  G06F12/0897

摘要： A system and method for tracking core load requests and providing arbitration and ordering of requests. When a core interface unit (CIU) receives a load operation from the processor core, a new entry in allocated in a queue of the CIU. In response to allocating the new entry in the queue, the CIU detects contention between the load request and another memory access request. In response to detecting contention, the load request may be suspended until the contention is resolved. Received load requests may be stored in the queue and tracked using a least recently used (LRU) mechanism. The load request may then be processed when the load request resides in a least recently used entry in the load request queue. CIU may also suspend issuing an instruction unless a read claim (RC) machine is available. In another embodiment, CIU may issue stored load requests in a specific priority order.

摘要翻译： 用于跟踪核心负载请求并提供仲裁和请求排序的系统和方法。 当核心接口单元（CIU）从处理器核心接收到加载操作时，分配在CIU队列中的新条目。 响应于在队列中分配新条目，CIU检测加载请求和另一个存储器访问请求之间的争用。 响应于检测到争用，负载请求可以被暂停，直到争用被解决。 接收到的加载请求可以存储在队列中，并使用最近最少使用的（LRU）机制进行跟踪。 然后可以在加载请求驻留在加载请求队列中最近最少使用的条目中时处理加载请求。 除非读取权利要求（RC）机器可用，否则CIU也可以暂停发出指令。 在另一个实施例中，CIU可以以特定优先级顺序发布存储的加载请求。

公开(公告)号：US07809004B2

公开(公告)日：2010-10-05

申请号：US12102133

申请日：2008-04-14

申请人： Benjiman L. Goodman ,  Praveen S. Reddy ,  Jeffrey A. Stuecheli

发明人： Benjiman L. Goodman ,  Praveen S. Reddy ,  Jeffrey A. Stuecheli

IPC分类号： H04L12/28

CPC分类号： G06F12/0831 ,  G06F12/0811 ,  G06F12/0813 ,  G06F12/0851

摘要： A data processing system includes an interconnect fabric, a protected resource having a plurality of banks each associated with a respective one of a plurality of address sets, a snooper that controls access to the resource, one or more masters that initiate requests, and interconnect logic coupled to the one or more masters and to the interconnect fabric. The interconnect logic regulates a rate of delivery to the snooper via the interconnect fabric of requests that target any one the plurality of banks of the protected resource.

摘要翻译： 数据处理系统包括互连结构，受保护资源具有多个存储体，每个存储体各自与多个地址集合中的相应一个地址集相关联，控制对资源的访问的监听器，发起请求的一个或多个主站和互连逻辑 耦合到一个或多个主器件和互连结构。 互连逻辑通过针对受保护资源的多个组中的任一个的请求的互连结构来调节到窥探者的传送速率。

公开(公告)号：US20090327619A1

公开(公告)日：2009-12-31

申请号：US12105401

申请日：2008-04-18

申请人： Jason F. Cantin ,  Richard Nicholas ,  Eric E. Retter ,  Jeffrey A. Stuecheli

发明人： Jason F. Cantin ,  Richard Nicholas ,  Eric E. Retter ,  Jeffrey A. Stuecheli

IPC分类号： G06F12/00

CPC分类号： G06F12/0862 ,  G06F12/0831 ,  G06F2212/1016 ,  Y02D10/13

摘要： An access speculation predictor may predict whether to perform speculative retrieval of data for a data request from a main memory based on whether or not a current requestor tag matches a previous requestor tag. In particular, a first address and a first requester tag may be extracted from a first data request and a finite state machine (FSM) of a memory controller may be selected whose memory region includes the first address. A second requester tag, that identifies a previous requester that attempted to access the memory region association with the selected FSM, may be retrieved from a register associated with the selected FSM and compared to the first requester tag. Speculatively retrieving the data for the first data request from a main memory may be controlled based on results of the comparison of the first requester tag to the second requester tag.

摘要翻译： 访问推测预测器可以基于当前请求者标签是否匹配先前的请求者标签来预测是否对来自主存储器的数据请求的数据进行推测检索。 特别地，可以从第一数据请求中提取第一地址和第一请求者标签，并且可以选择存储器控制器的有限状态机（FSM），其存储器区域包括第一地址。 可以从与所选FSM相关联的寄存器中检索识别尝试访问与选择的FSM的存储器区域关联的先前请求者的第二请求者标签，并与第一请求者标签进行比较。 可以基于第一请求者标签与第二请求者标签的比较的结果来控制从主存储器推测地检索第一数据请求的数据。

公开(公告)号：US20090265293A1

公开(公告)日：2009-10-22

申请号：US12105427

申请日：2008-04-18

申请人： Richard Nicholas ,  Ram Raghavan ,  Eric E. Retter ,  Jeffrey A. Stuecheli

发明人： Richard Nicholas ,  Ram Raghavan ,  Eric E. Retter ,  Jeffrey A. Stuecheli

IPC分类号： G06N5/00

CPC分类号： G06F12/0862 ,  G06F12/0831 ,  G06F2212/507 ,  G06F2212/6022 ,  G06F2212/6024 ,  Y02D10/13

摘要： An access speculation predictor is provided that may be implemented using idle command processing resources, such as registers of idle finite state machines (FSMs) in a memory controller. The access speculation predictor may predict whether to perform speculative retrieval of data for a data request from a main memory of the data processing system based on history information stored for a memory region targeted by the data request. In particular, a first address may be extracted from the data request and compared to memory regions associated with second addresses stored in address registers of a plurality of FSMs of the memory controller. A FSM whose memory region includes the first address may be selected. History information for the memory region may be obtained from the selected FSM. The history information may be used to control whether to speculatively retrieve the data for the data request from a main memory.

摘要翻译： 提供了可以使用诸如存储器控制器中的空闲有限状态机（FSM）的寄存器的空闲命令处理资源来实现的访问推测预测器。 访问推测预测器可以基于针对数据请求所针对的存储区域存储的历史信息来预测是否对数据处理系统的主存储器执行针对数据请求的数据的推测检索。 特别地，可以从数据请求中提取第一地址，并与存储在存储器控制器的多个FSM的地址寄存器中的第二地址相关联的存储器区域进行比较。 可以选择其存储区域包括第一地址的FSM。 可以从所选择的FSM获得用于存储器区域的历史信息。 历史信息可以用于控制是否从主存储器推测性地检索数据请求的数据。

公开(公告)号：US08930589B2

公开(公告)日：2015-01-06

申请号：US12869535

申请日：2010-08-26

申请人： John B. Carter ,  Karthick Rajamani ,  Gregory S. Still ,  Jeffrey A. Stuecheli ,  Malcom S. Ware

发明人： John B. Carter ,  Karthick Rajamani ,  Gregory S. Still ,  Jeffrey A. Stuecheli ,  Malcom S. Ware

IPC分类号： G06F3/00 ,  G06F11/34

CPC分类号： G06F11/3442 ,  G06F11/3476 ,  G06F2201/88 ,  G06F2201/885

摘要： According to one aspect of the present disclosure a method and technique for monitoring memory access is disclosed. The method includes monitoring access to a memory unit, updating an activity cache associated with an incrementor with access data corresponding to accesses to the memory unit, monitoring a rate of access to the memory unit, adjusting a sample rate of the access data for storage in the memory unit based on the rate of access, and scaling a value of the access data based on the sample rate.

摘要翻译： 根据本公开的一个方面，公开了一种用于监视存储器访问的方法和技术。 该方法包括监视对存储器单元的访问，使用与对存储器单元的访问相对应的访问数据来更新与增量器相关联的活动高速缓存，监视对存储器单元的访问速率，调整访问数据的采样率以便存储 基于访问速率的存储器单元，以及基于采样率来缩放访问数据的值。

公开(公告)号：US08909874B2

公开(公告)日：2014-12-09

申请号：US13371906

申请日：2012-02-13

申请人： Mark A. Brittain ,  John S. Dodson ,  Stephen J. Powell ,  Eric E. Retter ,  Jeffrey A. Stuecheli

发明人： Mark A. Brittain ,  John S. Dodson ,  Stephen J. Powell ,  Eric E. Retter ,  Jeffrey A. Stuecheli

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC分类号： G11C11/40607 ,  G06F13/1626 ,  G06F13/1689

摘要： A memory system and data processing system for controlling memory refresh operations in dynamic random access memories. The memory controller comprises logic that: tracks a time remaining before a scheduled time for performing a high priority, high latency operation a first memory rank of the memory system; responsive to the time remaining reaching a pre-established early notification time before the schedule time for performing the high priority, high latency operation, biases the re-order queue containing memory access operations targeting the plurality of ranks to prioritize scheduling of any first memory access operations that target the first memory rank. The logic further: schedules the first memory access operations to the first memory rank for early completion relative to other memory access operations in the re-order queue that target other memory ranks; and performs the high priority, high latency operation at the first memory rank at the scheduled time.

摘要翻译： 一种用于控制动态随机存取存储器中的存储器刷新操作的存储器系统和数据处理系统。 存储器控制器包括以下逻辑：跟踪在用于执行高优先级高等待时间操作的预定时间之前的剩余时间存储器系统的第一存储器等级; 响应于在执行高优先级高等待时间操作的调度时间之前达到预先建立的早期通知时间的时间，偏置包含针对多个等级的存储器访问操作的重新排序队列，以优先排序任何第一存储器访问 针对第一个内存排名的操作。 该逻辑进一步：将第一存储器访问操作调度到第一存储器等级以便相对于针对其他存储器排序的重新排序队列中的其他存储器访问操作来提前完成; 并且在预定时间在第一存储器等级执行高优先级，高延迟操作。