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公开(公告)号:US20220086105A1
公开(公告)日:2022-03-17
申请号:US17535608
申请日:2021-11-25
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Dotan David Levi , Avi Urman , Lior Narkis
IPC: H04L12/939 , H04L12/861 , H04W28/04 , H04L29/06 , H04L12/879
Abstract: Communication apparatus includes a host interface and a network interface, which receives from a packet communication network at least one packet stream including a sequence of data packets, which include headers containing respective sequence numbers and data payloads containing slices of the data segment having a predefined, fixed size per slice. Packet processing circuitry is configured to receive the data packets from the network interface, and to map the data payloads of the data packets in the at least one packet stream, using a linear mapping of the sequence numbers, to respective addresses in the buffer.
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公开(公告)号:US11271874B2
公开(公告)日:2022-03-08
申请号:US16782075
申请日:2020-02-05
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Dotan David Levi , Avi Urman , Lior Narkis , Liron Mula
IPC: H04L12/861 , H04L49/90 , H04L45/745 , H04L69/22 , H04W56/00 , H04L29/06 , H04L47/10 , H04L12/46 , H04L49/00
Abstract: A network adapter includes a host interface configured to communicate with a host, a network interface configured to communicate with a communication network, and packet processing circuitry. The packet processing circuitry is configured to receive a packet from the host via the host interface, or from the communication network via the network interface, to receive an indication of a network time used for synchronizing network elements in the communication network, to match the packet to a rule, the rule including a condition and an action, and to perform the action in response to the packet meeting the condition, wherein one or more of (i) the condition in the rule and (ii) the action in the rule, depend on the network time.
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公开(公告)号:US11070304B1
公开(公告)日:2021-07-20
申请号:US16799873
申请日:2020-02-25
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Dotan David Levi , Liron Mula , Avraham Ganor , Avi Urman , Aviad Raveh , Yuval Itkin , Oren Matus
IPC: H04J3/06
Abstract: In one embodiment, a computer apparatus includes a first NIC including at least one network interface port to transfer data with a first packet-data network (PDN) including a master clock to provide a clock synchronization signal S1, a first physical hardware clock (PHC) to maintain a time value T1 responsively to S1, and a first clock controller to generate a clock synchronization signal S2 responsively to S1, S2 having a frequency set responsively to S1, and send S2 over a connection to a second NIC including at least one network interface port to transfer data with a second PDN, a second PHC, and a second clock controller to receive S2, update the second PHC with a time value T2 responsively to S2, send another clock synchronization signal to network nodes in the second PDN responsively to T2, the second NIC acting as a master clock in the second PDN.
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公开(公告)号:US20210141413A1
公开(公告)日:2021-05-13
申请号:US16779611
申请日:2020-02-02
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Dotan David Levi , Liron Mula , Ariel Almog , Aviad Raveh , Yuval Itkin
Abstract: In one embodiment, a network interface card device includes communication interfaces to provide data connection with respective local devices configured to run respective clock synchronization clients, at least one network interface to provide data connection between a packet data network and ones of the local devices, and a hardware clock to maintain a time value, and serve the clock synchronization clients.
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公开(公告)号:US12294469B2
公开(公告)日:2025-05-06
申请号:US17885604
申请日:2022-08-11
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Natan Manevich , Dotan David Levi , Wojciech Wasko , Ariel Almog , Bar Shapira
Abstract: In one embodiment, a synchronized communication system includes a plurality of network devices, and clock connections to connect the network devices in a closed loop configuration, wherein the network devices are configured to distribute among the network devices a reference clock time from any selected one of the network devices.
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86.
公开(公告)号:US12284162B2
公开(公告)日:2025-04-22
申请号:US17369305
申请日:2021-07-07
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Dimitrios Syrivelis , Dotan David Levi , Paraskevas Bakopoulos , Ioannis (Giannis) Patronas , Elad Mentovich
Abstract: A network interface controller includes processing circuitry configured to pair with a local root of trust of a host device connected to the network interface controller and provide a key to an encryption device of the host device that enables the encryption device to encrypt data of one or more host device applications using the key. The encrypted data are stored in host device memory. The processing circuitry is configured to share the key with a remote endpoint and forward the encrypted data from the host device memory to the remote endpoint.
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公开(公告)号:US20250093905A1
公开(公告)日:2025-03-20
申请号:US18470452
申请日:2023-09-20
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Wojciech Wasko , Dotan David Levi , Natan Manevich , Maciej Machnikowski
Abstract: In one embodiment, a peripheral device includes an oscillator, a counter to be driven by the oscillator and provide a peripheral device counter value, and processing circuitry to receive a host device counter value from a host device, read host device clock translation parameters from a host memory of the host device, the host device clock translation parameters providing translation between the host device counter value and a host device clock time, read peripheral device clock translation parameters providing a translation between the peripheral device counter value and a peripheral device clock time, read the peripheral device counter value, compute a clock correction as a function of a difference between the host device clock time and the peripheral clock time, based on the host device and peripheral device counter values and clock translation parameters, and correct the host device or peripheral device clock translation parameters based on the clock correction.
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公开(公告)号:US12255734B2
公开(公告)日:2025-03-18
申请号:US17973575
申请日:2022-10-26
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Wojciech Wasko , Dotan David Levi , Avi Urman , Natan Manevich
IPC: H04J3/06
Abstract: In one embodiment, a system includes a network interface controller including a device interface to connect to a processing device and receive a time synchronization marker message from an application running on the processing device, a network interface to send packets over a network, and packet processing circuitry to process the time synchronization marker message for sending via the network interface over the network to a slave clock device, generate a time synchronization follow-up message including a timestamp indicative of when the synchronization marker message egressed the network interface, and process the time synchronization follow-up message for sending via the network interface over the network to the slave clock device.
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公开(公告)号:US12229072B2
公开(公告)日:2025-02-18
申请号:US18598382
申请日:2024-03-07
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Daniel Marcovitch , Dotan David Levi , Eyal Srebro , Eliel Peretz , Roee Moyal , Richard Graham , Gil Bloch , Sean Pieper
Abstract: Devices, methods, and systems are provided. In one example, a device is described to include a device interface that receives data from at least one data source; a data shuffle unit that collects the data received from the at least one data source, receives a descriptor that describes a data shuffle operation to perform on the data received from the at least one data source, performs the data shuffle operation on the collected data to produce shuffled data, and provides the shuffled data to at least one data target.
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公开(公告)号:US20250056006A1
公开(公告)日:2025-02-13
申请号:US18230877
申请日:2023-08-07
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Dotan David Levi , Yury Shvartzman , Eyal Frishman , Dror Porat , Eshed Ram , Ohad Markus , Limor Martin
IPC: H04N19/147 , H04N19/14 , H04N19/172 , H04N19/176
Abstract: Systems and methods herein are for a video encoder to be associated with an interface that is to receive, from an application, at least one metric that is associated with a quality preference for video compression to be performed by the video encoder and that is to provide a weight map to enable the video encoder to perform rate-distortion optimization (RDO) for received frames from the application using the weight map to weigh one or more first blocks associated with an individual one of the frames more than one or more second blocks associated with the individual one of the frames.
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