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公开(公告)号：US08269713B2
公开(公告)日：2012-09-18
申请号：US12733117
申请日：2008-05-15
IPC分类号： G09G3/36
CPC分类号： G11C19/184 , G09G3/3677 , G09G3/3688 , G09G2310/0286 , G09G2330/021
摘要： In one embodiment of the present invention, a unit circuit of a shift register includes a bootstrap circuit configured with a transistor T1, a transistor T2 and a capacitor, a transistor T3, a transistor T4, and a reset signal generation circuit. By use of two-phase clock signals and whose high level periods do not overlap with each other, the reset signal generation circuit generates a reset signal which is at a high level in a normal state and changes to a low level when an input signal turns into the high level. During a period that the reset signal is at the high level, transistors T3 and T4 perform discharge of a node and pull-down of an output signal. Thus, it is possible to obtain a power-saving shift register that fixes an output signal at a low level in a normal state without allowing a through current to flow therein.
摘要翻译： 在本发明的一个实施例中，移位寄存器的单元电路包括配置有晶体管T1，晶体管T2和电容器的晶体管T3，晶体管T4和复位信号产生电路的自举电路。 通过使用两相时钟信号并且其高电平周期彼此不重叠，复位信号产生电路产生在正常状态下处于高电平的复位信号，并且当输入信号变为低电平时变为低电平 进入高层。 在复位信号为高电平的期间，晶体管T3，T4进行节点的放电，输出信号的下拉。 因此，可以获得省电移位寄存器，其将正常状态下的输出信号固定在低电平，而不允许通流通过。
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公开(公告)号：US20120206510A1
公开(公告)日：2012-08-16
申请号：US13501174
申请日：2010-06-04
CPC分类号： G09G3/3614 , G09G3/3655 , G09G2310/0267
摘要： A display device employing CC driving switches from (i) a first mode in which to carry out a display by converting resolution of a video signal by a factor of 2 in a column-wise direction to (ii) a second mode in which to carry out a display at the resolution of the video signal. During the first mode, signal potentials having the same polarity and the same gray scale are supplied to pixel electrodes included in respective two pixels that correspond to two adjacent scanning signal lines and that are adjacent to each other in the column-wise direction, and a direction of change in the signal potentials written to the pixel electrodes varies every two adjacent rows (2-line inversion driving). During the second mode, the direction of change in the signal potentials written to the pixel electrodes lines varies every single row (1-line inversion driving).
摘要翻译： 一种采用CC驱动开关的显示装置，其从（i）第一模式，其中通过将视频信号的分辨率在列方向上转换为因子2来执行显示，以（ii）携带的第二模式 以视频信号的分辨率输出显示。 在第一模式中，具有相同极性和相同灰度的信号电位被提供给包括在相应于两个相邻扫描信号线并且在列方向上彼此相邻的两个像素中的像素电极，并且 写入像素电极的信号电位的变化方向每两个相邻行（2行反转驱动）变化。 在第二模式中，写入像素电极线的信号电位的变化方向每一行变化（1行反转驱动）。
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83.发明申请LIQUID CRYSTAL DISPLAY DEVICE AND DRIVE METHOD FOR LIQUID CRYSTAL DISPLAY DEVICE 有权液晶显示装置和液晶显示装置的驱动方法公开(公告)号：US20120188218A1
公开(公告)日：2012-07-26
申请号：US13395998
申请日：2010-06-25
CPC分类号： G09G3/3659 , G09G2300/0842 , G09G2330/021 , G09G2340/0435 , G09G2360/144
摘要： A memory-type liquid crystal display device includes a liquid crystal panel including memory circuits, and conducts a refresh operation more than once during a display holding period after rewriting of a screen. The memory-type liquid crystal display device increases at least one of (i) a frequency at which the screen is rewritten and (ii) a frequency at which the refresh operation is conducted during the display holding period as an intensity of light received by the liquid crystal panel increases. This allows the memory-type liquid crystal display device to reduce power consumption while keeping its display quality.
摘要翻译： 记忆型液晶显示装置包括具有存储电路的液晶面板，并且在重写画面之后的显示保持期间不止一次进行刷新动作。 记忆型液晶显示装置增加以下至少一个：（i）画面重写的频率和（ii）在显示保持期间进行刷新操作的频率，作为由 液晶面板增加。 这使得存储型液晶显示装置在保持其显示质量的同时降低功耗。
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公开(公告)号：US08085236B2
公开(公告)日：2011-12-27
申请号：US12087887
申请日：2006-11-30
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G3/3677 , G09G2310/0245 , G09G2310/0286 , G09G2330/027 , G11C19/28
摘要： A liquid crystal display apparatus (1) wherein the shift registers of a source driver (4) are configured by use of asynchronous RS flip-flops in which an active input to a set input terminal has a higher priority than an active input to a reset terminal. In a second mode of operation, first and second clock signals and a start pulse are fixed at high levels, thereby performing discharges from all the pixels (PIX) of a liquid crystal panel (2).
摘要翻译： 一种液晶显示装置（1），其中源驱动器（4）的移位寄存器通过使用异步RS触发器来配置，其中对设置输入端子的有效输入具有比复位的有效输入更高的优先级 终奌站。 在第二操作模式中，第一和第二时钟信号和起始脉冲固定在高电平，从而执行来自液晶面板（2）的所有像素（PIX）的放电。
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公开(公告)号：US20100245327A1
公开(公告)日：2010-09-30
申请号：US12733813
申请日：2008-07-24
CPC分类号： H02M3/073
摘要： An object of the present invention is to provide a power supply circuit including a charge-pumping booster section which uses switching elements provided only by N-channel transistors yet does not have a problem of voltage drop by threshold value. In a booster section (11a), capacitors (C1) and (C2) have their respective first terminals connected with transistors (Q1, Q3) and (Q2, Q4) respectively. Each transistor has its gate terminal supplied with control signals generated in a driver section (11b). The driver section (11b) includes capacitors (C3, C4) connected with input terminals (Ti3, Ti4) for respective supply of clock signals DCK2, DCK2B each having a voltage alternating between −VDD and VDD (VDD represents an input supply voltage from outside), as level-shifted signals of clock signals DCK1, DCK1B which are supplied to second terminals of the capacitors (C1, C2) respectively. In this arrangement, the driver section 11b generates signals each having a voltage alternating between VDD and 3VDD, as the control signals.
摘要翻译： 本发明的目的是提供一种电源电路，其包括使用仅由N沟道晶体管提供的开关元件的电荷泵浦升压器部分，但不具有通过阈值的电压降的问题。 在升压部（11a）中，电容器（C1）和（C2）分别具有与晶体管（Q1，Q3）和（Q2，Q4）相连的各自的第一端子。 每个晶体管的栅极端子提供有在驱动器部分（11b）中产生的控制信号。 驱动器部分（11b）包括与输入端子（Ti3，Ti4）连接的电容器（C3，C4），用于各自提供时钟信号DCK2，DCK2B，每个时钟信号具有在-VDD和VDD之间交替的电压（VDD表示来自外部的输入电源电压 ）作为分别提供给电容器（C1，C2）的第二端子的时钟信号DCK1，DCK1B的电平移位信号。 在这种布置中，驱动器部分11b产生各自具有在VDD和3VDD之间交替的电压的信号作为控制信号。
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86.发明申请Driving Circuit of Display Device, Method of Driving Display Device, Method of Driving Signal Line, and Display Device 失效显示装置的驱动电路，驱动显示装置的方法，驱动信号线的方法和显示装置公开(公告)号：US20090027318A1
公开(公告)日：2009-01-29
申请号：US11921444
申请日：2006-06-12
IPC分类号： G09G3/36
CPC分类号： G09G3/20 , G09G2310/0275
摘要： A driving circuit of a display device is disclosed in accordance with an embodiment of the present invention creates a non-display area on a display section of the display device so that a partial-screen display becomes available. The driving circuit includes a shift register and a signal processing circuit that processes a signal tapped off from the shift register. In partial-screen display, the signal processing circuit interrupts a signal tapped off from a predetermined stage of the shift register. This makes it possible to realize a driving circuit of a display device by which a high-quality display is possible with a small circuit area.
摘要翻译： 根据本发明的实施例公开了显示装置的驱动电路，在显示装置的显示部分上创建非显示区域，使得部分屏幕显示变得可用。 驱动电路包括移位寄存器和处理从移位寄存器分接的信号的信号处理电路。 在部分屏幕显示中，信号处理电路中断从移位寄存器的预定级分开的信号。 这使得可以实现具有小电路区域的高质量显示的显示装置的驱动电路。
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87.发明授权Signal output circuit, shift register, output signal generating method, display device driving circuit, and display device 有权信号输出电路，移位寄存器，输出信号生成方法，显示装置驱动电路和显示装置公开(公告)号：US08497834B2
公开(公告)日：2013-07-30
申请号：US13674541
申请日：2012-11-12
摘要： A signal output circuit of the present invention is provided in a unit stage of a shift register. The signal output circuit includes a set-reset flip-flop, and a signal generation circuit for generating an output signal by loading or blocking a clock signal in accordance with a signal inputted thereto. The signal output circuit is arranged such that: the signal generation circuit receives a signal outputted from the flip-flop and the output signal fed back to the signal generating circuit; and the output signal is fed back to a reset input of the flip-flop. This makes it possible to achieve a reduction in the area of the circuit and a simplification of the circuit.
摘要翻译： 本发明的信号输出电路设置在移位寄存器的单元级中。 信号输出电路包括设置复位触发器和信号产生电路，用于根据输入的信号通过加载或阻塞时钟信号来产生输出信号。 信号输出电路被布置为：信号发生电路接收从触发器输出的信号和反馈到信号发生电路的输出信号; 并将输出信号反馈到触发器的复位输入。 这使得可以实现电路面积的减小和电路的简化。
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88.发明申请公开(公告)号：US20120306829A1
公开(公告)日：2012-12-06
申请号：US13575490
申请日：2011-02-10
CPC分类号： G11C19/28 , G09G3/3677
摘要： A shift register includes a plurality of stages of unit circuits each including a flip-flop. Each of the unit circuits generates, by obtaining a sync signal in accordance with an output from the flip-flop, an output signal. The flip-flop includes a first switch and a second switch and a latch circuit for latching a signal supplied thereto and outputting the signal as the output from the flip-flop. A first shift direction signal is supplied to the latch circuit via the first switch, and the second shift direction signal is supplied to the latch circuit via the second switch. In each unit circuit other than those of the first and last stages, an output signal from a previous stage is supplied to a control terminal of the first switch, and an output signal from a subsequent stage is supplied to a control terminal of the second switch.
摘要翻译： 移位寄存器包括多个阶段的单元电路，每个单元电路包括一个触发器。 每个单元电路通过根据触发器的输出获得同步信号来产生输出信号。 触发器包括第一开关和第二开关以及用于锁存提供给其的信号的锁存电路，并将该信号作为触发器的输出输出。 第一移位方向信号通过第一开关提供给锁存电路，第二移位方向信号通过第二开关提供给锁存电路。 在除了第一级和最后级之外的每个单元电路中，来自前一级的输出信号被提供给第一开关的控制端，并且来自后级的输出信号被提供给第二开关的控制端 。
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89.发明申请MEMORY DEVICE, DISPLAY DEVICE EQUIPPED WITH MEMORY DEVICE, DRIVE METHOD FOR MEMORY DEVICE, AND DRIVE METHOD FOR DISPLAY DEVICE 审中-公开存储装置，具有存储装置的显示装置，用于存储装置的驱动方法和用于显示装置的驱动方法公开(公告)号：US20120176393A1
公开(公告)日：2012-07-12
申请号：US13395977
申请日：2010-04-23
申请人： Hiroyuki Ohkawa , Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta , Seijirou Gyouten , Shuji Nishi
发明人： Hiroyuki Ohkawa , Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta , Seijirou Gyouten , Shuji Nishi
CPC分类号： G09G3/3648 , G09G2300/0852 , G09G2300/0857 , G09G2310/06 , G09G2320/0219
摘要： Provided is a memory device that allows an amount of leakage into a first retaining section to which a binary logic level is written to be balanced between different circuit states. A predetermined period is set in which in a state where a first control section turns off an output element, (i) a first retaining section and a second retaining section retain an identical binary logic level, (ii) an electric potential of a voltage supply is set to one of a first electric potential level and a second electric potential level, (iii) the other one of the first electric potential level and the second electric potential level is supplied from a column driver to a fourth wire, and (iv) subsequently the fourth wire is shifted to a floating state.
摘要翻译： 提供了一种存储器件，其允许向写入二进制逻辑电平的第一保持部分的泄漏量在不同的电路状态之间平衡。 设定规定期间，其中在第一控制部分关闭输出元件的状态下，（i）第一保持部分和第二保持部分保持相同的二进制逻辑电平，（ii）电压源的电位 被设置为第一电位电平和第二电位电平之一，（iii）第一电位电平和第二电位电平中的另一个从列驱动器提供给第四线，以及（iv） 随后第四根线移动到浮动状态。
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公开(公告)号：US20120169751A1
公开(公告)日：2012-07-05
申请号：US13395681
申请日：2010-05-18
申请人： Etsuo Yamamoto , Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta , Seijirou Gyouten , Shuji Nishi
发明人： Etsuo Yamamoto , Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta , Seijirou Gyouten , Shuji Nishi
CPC分类号： G09G3/3648 , G02F1/13624 , G09G3/3614 , G09G2300/0857 , G09G2310/08 , G09G2320/0219 , G09G2330/021
摘要： In an active matrix display apparatus including: pixels provided in a matrix pattern, the pixels each including a memory circuit which retains data while refreshing the data, a data signal electric potential which is supplied from a source line in a period t1 and written to a node which is connected to a liquid capacitor is higher than a data electric potential of the node, the data electric potential being obtained in a period t14 after a refresh operation of the memory circuit.
摘要翻译： 在一种有源矩阵显示装置中，包括以矩阵模式提供的像素，每个像素包括一个在刷新数据的同时保留数据的存储电路，在时间段t1内从源极线提供的数据信号电位被写入到 连接到液体电容器的节点高于节点的数据电位，在存储器电路的刷新操作之后的周期t14中获得数据电位。
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