公开(公告)号：US20100050136A1

公开(公告)日：2010-02-25

申请号：US12257366

申请日：2008-10-23

Applicant: YING-TSO LAI ,  TSUNG-SHENG HUANG ,  SHOU-KUO HSU

Inventor： YING-TSO LAI ,  TSUNG-SHENG HUANG ,  SHOU-KUO HSU

IPC: G06F17/50

CPC classification number: G06F17/5063 ,  G06F2217/10

Abstract: A system for optimizing analog circuit designs includes an input device, a data processing device, and a data storage device. The data processing device includes a selecting module, a calculation module, and a determining module. The selecting module is for receiving input from the input device and selecting electronic components composing the circuit from the data storage device. The calculation module is for calculating average values and standard deviations of each electronic component, generating normal distribution samples of each electronic component, and calculating output voltages of the circuit. The determining module is for determining whether the circuit meets a process capability standard.

Abstract translation: 用于优化模拟电路设计的系统包括输入装置，数据处理装置和数据存储装置。 数据处理装置包括选择模块，计算模块和确定模块。 选择模块用于从输入设备接收输入，并从数据存储设备中选择构成电路的电子元件。 计算模块用于计算每个电子部件的平均值和标准偏差，产生每个电子部件的正态分布样本，以及计算电路的输出电压。 确定模块用于确定电路是否满足过程能力标准。

公开(公告)号：US20100007429A1

公开(公告)日：2010-01-14

申请号：US12205146

申请日：2008-09-05

Applicant: CHENG-SHIEN LI ,  YUNG-CHIEH CHEN ,  SHOU-KUO HSU

Inventor： CHENG-SHIEN LI ,  YUNG-CHIEH CHEN ,  SHOU-KUO HSU

IPC: H01P3/08

CPC classification number: H05K1/0245 ,  H05K1/0366 ,  H05K2201/029 ,  H05K2201/09236 ,  H05K2201/09263 ,  H05K2201/09272

Abstract: A printed circuit board includes a plurality of differential pairs arranged thereon side-by-side. Each differential pair includes two transmission lines. Each transmission line includes a plurality of sections of equal length. Every two adjacent sections in each transmission line meet at an angle, and all angles are equal. The length of each section is determined by dividing the distance between two corresponding angles of the two transmission lines of each differential pair by the cosine of half of the angle.

Abstract translation: 印刷电路板包括并排布置的多个差分对。 每个差分对包括两条传输线。 每个传输线包括多个相等长度的部分。 每个传输线中的每两个相邻部分以一定角度相交，并且所有角度相等。 每个部分的长度通过将每个差分对的两个传输线的两个对应角度之间的距离除以角度的一半的余弦来确定。

公开(公告)号：US20090294168A1

公开(公告)日：2009-12-03

申请号：US12272797

申请日：2008-11-18

Applicant: YU-CHANG PAI ,  SHOU-KUO HSU ,  CHIEN-HUNG LIU ,  YING-TSO LAI

Inventor： YU-CHANG PAI ,  SHOU-KUO HSU ,  CHIEN-HUNG LIU ,  YING-TSO LAI

IPC: H05K1/11

CPC classification number: H05K1/116 ,  H05K1/0245 ,  H05K1/0251 ,  H05K1/165 ,  H05K3/429 ,  H05K2201/09236 ,  H05K2201/09281 ,  H05K2201/09636

Abstract: A printed circuit board includes a first layout layer, a second layout layer, a copper foil layer, a first via and a second via. The first layout layer has a first signal line and a second signal line, each of which has a curved first portion. The second layout layer has a third signal line and a fourth signal line, each of which also has a curved first portion. The curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line are coupled to the first via and the second via. In this case, the curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line cooperatively generate spiral inductance characteristic.

Abstract translation: 印刷电路板包括第一布局层，第二布局层，铜箔层，第一通孔和第二通孔。 第一布局层具有第一信号线和第二信号线，每条信号线都具有弯曲的第一部分。 第二布局层具有第三信号线和第四信号线，每条信号线还具有弯曲的第一部分。 第一信号线，第二信号线，第三信号线和第四信号线的弯曲的第一部分耦合到第一通孔和第二通孔。 在这种情况下，第一信号线，第二信号线，第三信号线和第四信号线的弯曲的第一部分协同地产生螺旋电感特性。

公开(公告)号：US20090240450A1

公开(公告)日：2009-09-24

申请号：US12351858

申请日：2009-01-12

Applicant: CHIH-WEI TSAI ,  SHOU-KUO HSU

Inventor： CHIH-WEI TSAI ,  SHOU-KUO HSU

IPC: G06F19/00 ,  G06F15/00

CPC classification number: H05K1/0201 ,  G01R31/281 ,  H05K3/0005 ,  H05K2203/163

Abstract: A method for evaluating a temperature rise of a printed circuit board (PCB) trace receives a plurality of attribute parameters of the PCB trace. A temperature rise formula is determined for the PCB trace. The method further calculates the temperature rise by applying the temperature rise formula, and outputs the temperature rise.

Abstract translation: 用于评估印刷电路板（PCB）迹线的温度升高的方法接收PCB迹线的多个属性参数。 确定PCB走线的温升公式。 该方法通过应用温升公式进一步计算温升，并输出温升。

公开(公告)号：US20090065241A1

公开(公告)日：2009-03-12

申请号：US11957419

申请日：2007-12-15

Applicant: CHIEN-HUNG LIU ,  SHOU-KUO HSU ,  YU-CHANG PAI

Inventor： CHIEN-HUNG LIU ,  SHOU-KUO HSU ,  YU-CHANG PAI

IPC: H05K1/02

CPC classification number: H05K1/0245 ,  H05K1/0219 ,  H05K2201/09336 ,  H05K2201/09672

Abstract: A printed circuit board (PCB) includes first and second signal layers sandwiching a dielectric layer therebetween, and a differential pair having two differential traces respectively disposed within the first and second signal layers. Two ground parts are respectively arranged at opposite sides of each of the two differential traces.

Abstract translation: 印刷电路板（PCB）包括夹在其间的电介质层的第一和第二信号层，以及分别设置在第一和第二信号层内的差分对。 两个接地部分分别布置在两个差分迹线中的每一个的相对侧。

公开(公告)号：US20080059685A1

公开(公告)日：2008-03-06

申请号：US11759238

申请日：2007-06-07

Applicant: SHOU-KUO HSU ,  CHENG-SHIEN LI

Inventor： SHOU-KUO HSU ,  CHENG-SHIEN LI

IPC: G06F13/36

CPC classification number: G06F13/4068 ,  G06F2213/0024 ,  H05K1/029 ,  H05K1/0295 ,  H05K2201/10363

Abstract: A motherboard includes a chipset, a first connector pad suitable for receiving a first type of PCI connector, a second connector pad suitable for receiving a second type of PCI connector, a plurality of first transmission lines, a plurality of second transmission lines, and a plurality of areas for mounting switches. One end of each first transmission line is connected to the chipset, another end of each first transmission line is connected to an end of a corresponding area, one end of each second transmission line is connected to another end of the corresponding area, another end of each second transmission line is connected to the second connector pad, the first connector pad is connected to the plurality of first transmission lines, and the switches are selectively mounted on the plurality of areas.

Abstract translation: 主板包括芯片组，适于接收第一类型的PCI连接器的第一连接器焊盘，适于接收第二类型的PCI连接器的第二连接器焊盘，多个第一传输线，多条第二传输线，以及 多个安装开关的区域。 每个第一传输线的一端连接到芯片组，每个第一传输线的另一端连接到相应区域的一端，每个第二传输线的一端连接到相应区域的另一端，另一端 每个第二传输线连接到第二连接器焊盘，第一连接器焊盘连接到多个第一传输线，并且开关选择性地安装在多个区域上。

公开(公告)号：US20080041618A1

公开(公告)日：2008-02-21

申请号：US11759239

申请日：2007-06-07

Applicant: SHOU-KUO HSU ,  YU-CHANG PAI ,  CHENG-SHIEN LI

Inventor： SHOU-KUO HSU ,  YU-CHANG PAI ,  CHENG-SHIEN LI

IPC: H05K1/16 ,  H05K1/02

CPC classification number: H05K1/0228 ,  H05K2201/09236 ,  H05K2201/10189

Abstract: A printed circuit board includes a first signal layer, a second signal layer, a plurality of transmission lines respectively including first segments laid in parallel on the first signal layer and second segments laid in parallel on the second signal layer, and a plurality of vias, each via connecting the first segment with the second segment of a corresponding transmission line. One of the plurality of transmission lines has the first segment positioned in the middle of an array defined by the first segments of the plurality of transmission lines, and a second segment positioned in an outmost position of an array defined by the second segments of the plurality of transmission lines. The printed circuit board reduces the possibility of false action of electronic components coupled to transmission lines, which is caused by the crosstalk between transmission lines.

Abstract translation: 印刷电路板包括第一信号层，第二信号层，分别包括在第一信号层上平行放置的第一段和在第二信号层上并联放置的第二段的多条传输线，以及多个通孔， 每个通过将第一段连接到相应传输线的第二段。 多个传输线中的一个具有位于由多个传输线的第一段限定的阵列的中间的第一段，以及位于由多个传输线中的第二段定义的阵列的最外部位置的第二段 的传输线。 印刷电路板减少了由传输线之间的串扰引起的耦合到传输线的电子部件的错误动作的可能性。

公开(公告)号：US20070222537A1

公开(公告)日：2007-09-27

申请号：US11309638

申请日：2006-09-01

Applicant: SHOU-KUO HSU ,  CHENG-HONG LIU

Inventor： SHOU-KUO HSU ,  CHENG-HONG LIU

IPC: H03H7/38

CPC classification number: H05K1/0219 ,  H05K1/0237 ,  H05K2201/09236 ,  H05K2201/09618

Abstract: A printed circuit board (PCB) includes at least one signal layer, a ground layer, at least two signal lines, and at least one grounded line. The signal lines are arranged on the signal layer for transmitting signals. The grounded line is arranged on the signal layer and between the signal lines. A plurality of vias are defined in the grounded line, and the vias are connected to the ground layer. A distance between each two adjacent vias is so arranged that a resonant frequency of an electromagnetic wave transmitted on the grounded line must greater than a highest frequency of the signals transmitted on the signal lines. A related method for designing the PCB is also provided.

Abstract translation: 印刷电路板（PCB）包括至少一个信号层，接地层，至少两条信号线和至少一条接地线。 信号线布置在用于发送信号的信号层上。 接地线设置在信号层和信号线之间。 在接地线中限定多个通孔，并且通孔连接到接地层。 每两个相邻通孔之间的距离被布置成使得在接地线上传输的电磁波的谐振频率必须大于在信号线上传输的信号的最高频率。 还提供了一种用于设计PCB的相关方法。

公开(公告)号：US20070090512A1

公开(公告)日：2007-04-26

申请号：US11309279

申请日：2006-07-21

Applicant: CHENG-HONG LIU ,  SHOU-KUO HSU ,  YU-CHANG PAI

Inventor： CHENG-HONG LIU ,  SHOU-KUO HSU ,  YU-CHANG PAI

IPC: H01L23/053

CPC classification number: H05K1/0248 ,  H05K1/0268 ,  H05K2201/09236 ,  H05K2201/09263

Abstract: A signal transmission line used in a printed circuit board (PCB), the signal transmission line comprises a driving terminal for driving a signal, a contact portion, the signal line connected with the driving terminal and the contact portion to transmit the signal wherein a length of the signal line is so arranged that a time for the signal transmitted from the driving terminal to the contact portion is not less than half of a time for the transmitted signal to reach a receiving terminal.

Abstract translation: 在印刷电路板（PCB）中使用的信号传输线，信号传输线包括用于驱动信号的驱动端子，接触部分，与驱动端子连接的信号线和接触部分，以传输信号，其中长度 信号线的布置使得从驱动端子到接触部分发送的信号的时间不小于发送信号到达接收端子的时间的一半。

公开(公告)号：US20130097576A1

公开(公告)日：2013-04-18

申请号：US13327771

申请日：2011-12-16

Applicant: JIA-LU YE ,  CHIA-NAN PAI ,  SHOU-KUO HSU

Inventor： JIA-LU YE ,  CHIA-NAN PAI ,  SHOU-KUO HSU

IPC: G06F17/50

CPC classification number: G06F17/5036

Abstract: A computer-based method and a computing device for checking stub lengths of via stubs of a printed circuit board (PCB) layout are provided. The computing device displays a check interface, selects signal transmission line from a currently run PCB layout through the check interface, receives a reference stub length input through the check interface, and determines the actual stub length of each via stub of each via each selected signal transmission line connected to. The computing device further determines that a design of one via stub satisfies the design standards, if the actual stub length of the one stub via is less than or equal to the reference length, and determines that a design of one via stub does not satisfy the design standards if the actual stub length of the one via stub is greater than the reference stub length.

Abstract translation: 提供了一种基于计算机的方法和用于检查印刷电路板（PCB）布局的通孔短截线的短截线长度的计算装置。 计算装置显示检查接口，通过检查接口从当前运行的PCB布局中选择信号传输线，接收通过检查接口输入的参考短截线长度，并通过每个选定信号确定每个通孔短截线的实际短截线长度 传输线连接。 如果一个存根通孔的实际短截线长度小于或等于参考长度，则计算设备还确定一个通孔存根的设计满足设计标准，并且确定一个通孔存储体的设计不满足 如果一个通过存根的实际存根长度大于参考短截线长度，则设计标准。