公开(公告)号：US09240466B2

公开(公告)日：2016-01-19

申请号：US14451174

申请日：2014-08-04

Applicant: STMicroelectronics SA ,  STMicroelectronics, Inc.

Inventor： Pierre Morin ,  Denis Rideau ,  Olivier Nier

IPC: H01L21/00 ,  H01L29/66 ,  H01L21/02 ,  H01L21/324 ,  H01L21/762 ,  H01L29/78 ,  H01L27/12

CPC classification number: H01L29/66772 ,  H01L21/0217 ,  H01L21/324 ,  H01L21/76283 ,  H01L21/84 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/66795 ,  H01L29/7843 ,  H01L29/7847 ,  H01L29/785

Abstract: The disclosure concerns a method of stressing a semiconductor layer comprising: forming, over a silicon on insulator structure having a semiconductor layer in contact with an insulating layer, one or more stressor blocks aligned with first regions of said semiconductor layer in which transistor channels are to be formed, wherein said stressor blocks are stressed such that they locally stress said semiconductor layer; and deforming second regions of said insulating layer adjacent to said first regions by temporally decreasing, by annealing, the viscosity of said insulator layer.

Abstract translation: 本公开涉及一种对半导体层施加应力的方法，包括：在绝缘体上的结构上形成绝缘体结构，该绝缘体上硅结构具有与绝缘层相接触的半导体层，一个或多个与晶体管沟道所在半导体层的第一区对准的应力块 形成，其中所述应力块被应力，使得它们局部应力所述半导体层; 以及通过退火所述绝缘体层的粘度暂时减小所述绝缘层的与所述第一区域相邻的第二区域。

公开(公告)号：US20150249153A1

公开(公告)日：2015-09-03

申请号：US14194215

申请日：2014-02-28

Applicant: STMicroelectronics, Inc.

Inventor： Pierre Morin ,  Nicolas Loubet

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L27/10879 ,  H01L21/2251 ,  H01L29/0649 ,  H01L29/1054 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/41791 ,  H01L29/4236 ,  H01L29/66772 ,  H01L29/66795 ,  H01L29/7825 ,  H01L29/7838 ,  H01L29/7849 ,  H01L29/785 ,  H01L29/7855 ,  H01L29/78603 ,  H01L29/78654

Abstract: Methods and structures for forming a localized, strained region of a substrate are described. Trenches may be formed at boundaries of a localized region of a substrate. An upper portion of sidewalls at the localized region may be covered with a covering layer, and a lower portion of the sidewalls at the localized region may not be covered. A converting material may be formed in contact with the lower portion of the localized region, and the substrate heated. The heating may introduce a chemical species from the converting material into the lower portion, which creates stress in the localized region. The methods may be used to form strained-channel finFETs.

Abstract translation: 描述了形成基底的局部应变区域的方法和结构。 可以在衬底的局部区域的边界处形成沟槽。 局部区域的侧壁的上部可以被覆盖层覆盖，并且局部区域的侧壁的下部可能不被覆盖。 可以将转换材料形成为与局部区域的下部接触，并且加热衬底。 加热可以将化学物质从转化材料引入下部，这在局部区域中产生应力。 这些方法可以用于形成应变通道的finFET。

公开(公告)号：US20150118823A1

公开(公告)日：2015-04-30

申请号：US14526053

申请日：2014-10-28

Applicant: STMicroelectronics SA ,  STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics, Inc.

Inventor： Olivier Nier ,  Denis Rideau ,  Pierre Morin ,  Emmanuel Josse

IPC: H01L21/762 ,  H01L27/12 ,  H01L21/02 ,  H01L29/78

CPC classification number: H01L21/76283 ,  H01L21/02356 ,  H01L21/02532 ,  H01L21/76237 ,  H01L21/823431 ,  H01L21/845 ,  H01L27/1203 ,  H01L29/7846 ,  H01L29/7847 ,  H01L29/7849

Abstract: One or more embodiments of the disclosure concerns a method of forming a stressed semiconductor layer involving: forming, in a surface of a semiconductor structure having a semiconductor layer in contact with an insulator layer, at least two first trenches in a first direction; introducing, via the at least two first trenches, a stress in the semiconductor layer and temporally decreasing, by annealing, the viscosity of the insulator layer; and extending the depth of the at least two first trenches to form first isolation trenches in the first direction delimiting a first dimension of at least one transistor to be formed in the semiconductor structure.

Abstract translation: 本公开的一个或多个实施方案涉及形成应力半导体层的方法，包括：在具有与绝缘体层接触的半导体层的半导体结构的表面中形成沿第一方向的至少两个第一沟槽; 通过所述至少两个第一沟槽，在所述半导体层中引入应力并且通过退火来临时降低所述绝缘体层的粘度; 并且延伸所述至少两个第一沟槽的深度以在所述第一方向上形成第一隔离沟槽，所述第一隔离沟槽限定要形成在所述半导体结构中的至少一个晶体管的第一维度。

公开(公告)号：US08952420B1

公开(公告)日：2015-02-10

申请号：US13953551

申请日：2013-07-29

Applicant: STMicroelectronics, Inc.

Inventor： Nicolas Loubet ,  Pierre Morin

IPC: H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L29/7848 ,  H01L29/1054 ,  H01L29/155 ,  H01L29/16 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851

Abstract: Methods and structures for forming strained-channel finFETs are described. Fin structures for finFETs may be formed in two epitaxial layers that are grown over a bulk substrate. A first thin epitaxial layer may be cut and used to impart strain to an adjacent channel region of the finFET via elastic relaxation. The structures exhibit a preferred design range for increasing induced strain and uniformity of the strain over the fin height.

Abstract translation: 描述形成应变通道鳍状FET的方法和结构。 用于finFET的鳍结构可以形成在生长在块状衬底上的两个外延层中。 可以将第一薄外延层切割并用于通过弹性弛豫向finFET的相邻沟道区施加应变。 该结构表现出优选的设计范围，用于增加应变在翅片高度上的诱导应变和均匀性。