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    Ceramic honeycomb catalyst carrier and method of producing the same
    83.
    发明授权
    Ceramic honeycomb catalyst carrier and method of producing the same 有权
    陶瓷蜂窝状催化剂载体及其制造方法

    公开(公告)号：US06649244B2

    公开(公告)日：2003-11-18

    申请号：US09959211

    申请日：2002-01-17

    申请人： Toshiyuki Hamanaka ,  Kyoko Makino ,  Yasushi Noguchi

    发明人： Toshiyuki Hamanaka ,  Kyoko Makino ,  Yasushi Noguchi

    IPC分类号： B32B312

    CPC分类号： B28B11/0818 ,  B01D53/885 ,  B01D53/94 ,  B01J35/04 ,  B01J35/10 ,  F01N3/2828 ,  Y10T428/131 ,  Y10T428/24149 ,  Y10T428/24628 ,  Y10T428/24744 ,  Y10T428/249953

    摘要： A ceramic honeycomb catalyst carrier wherein a porosity is 20% or less and an average surface roughness (Ra) of a partition wall of the carrier is 0.5 &mgr;m or more is obtained by forming ceramic raw materials to obtain a ceramic honeycomb formed body; drying the ceramic honeycomb formed body to obtain a ceramic honeycomb dried-up body; roughening a surface of the partition wall of the ceramic honeycomb dried-up body by exposing the ceramic honeycomb dried-up body in an airflow in which polishing powders are included; and sintering the ceramic honeycomb dried-up body after a surface treatment, or, by forming ceramic raw materials to obtain a ceramic honeycomb formed body; drying and sintering the ceramic honeycomb formed body to obtain a ceramic honeycomb sintered body; and roughening a surface of the partition wall of the ceramic honeycomb sintered body by exposing the ceramic honeycomb sintered body in an airflow or a water flow in which polishing powders are included.

    摘要翻译： 通过形成陶瓷原料得到陶瓷蜂窝成形体，得到孔隙率为20％以下，载体隔壁的平均表面粗糙度（Ra）为0.5μm以上的陶瓷蜂窝状催化剂载体， 干燥陶瓷蜂窝成型体，得到陶瓷蜂窝干燥机; 通过在包含抛光粉末的气流中使陶瓷蜂窝干燥机体露出，使陶瓷蜂窝干燥机的分隔壁的表面粗糙化; 在表面处理后烧结陶瓷蜂窝状干燥体，或者通过形成陶瓷原料，得到陶瓷蜂窝成形体; 干燥并烧结陶瓷蜂窝成形体，得到陶瓷蜂窝烧结体; 通过将陶瓷蜂窝烧结体暴露在包含研磨粉末的气流或水流中，使陶瓷蜂窝状烧结体的隔壁的表面粗糙化。

    Process for production of cordierite-based ceramic honeycomb structure
    84.
    发明授权
    Process for production of cordierite-based ceramic honeycomb structure 有权
    堇青石陶瓷蜂窝结构生产工艺

    公开(公告)号：US06291379B1

    公开(公告)日：2001-09-18

    申请号：US09493206

    申请日：2000-01-28

    申请人： Yasushi Noguchi ,  Kyoko Makino ,  Wataru Kotani

    发明人： Yasushi Noguchi ,  Kyoko Makino ,  Wataru Kotani

    IPC分类号： C04B35195

    CPC分类号： B01J21/14

    摘要： A process for producing a cordierite-based ceramic honeycomb structure, includes kneading raw materials for cordierite with a forming aid to obtain a raw material batch, subjecting the raw material batch to obtain a honeycomb structure, and subjecting the honeycomb structure to drying and firing in this order to obtain a ceramic honeycomb structure whose crystal phase is composed mainly of cordierite. The raw material batch contains 65% by weight or more of raw materials for cordierite, comprising talc, kaolin and aluminum hydroxide and having crystal water. The kaolin has an average particle diameter of 5 &mgr;or more and a BET specific surface area of 10 m2/g or less and is contained in the raw material batch in an amount of 10% or more by weight. Formability during extruding, particularly lubricity and shape stability, are improved, for producing cordierite-based ceramic honeycomb structure having thin partition walls and high cell density, and improved mechanical strength (isostatic fracture strength) and improved catalyst coatability.

    摘要翻译： 一种堇青石系陶瓷蜂窝结构体的制造方法，其特征在于，将堇青石的原料与成形助剂混炼，得到原料批料，对原料批料进行处理，得到蜂窝结构体，使蜂窝结构物进行干燥烧成 这是为了得到其结晶相主要由堇青石组成的陶瓷蜂窝结构体。 原料批料含有65重量％以上的堇青石原料，包括滑石，高岭土和氢氧化铝，并具有结晶水。 所述高岭土的平均粒径为5μm以上，BET比表面积为10m 2 / g以下，原料成分含有10重量％以上。 改善挤出时的成形性，特别是润滑性和形状稳定性，用于生产具有薄隔壁和高泡孔密度以及改进的机械强度（等静压断裂强度）和改进的催化剂涂覆性的堇青石基陶瓷蜂窝结构体。

    Image processor
    85.
    发明授权
    Image processor 失效
    图像处理器

    公开(公告)号：US5642135A

    公开(公告)日：1997-06-24

    申请号：US218416

    申请日：1994-03-25

    申请人： Yasushi Noguchi ,  Shyunsuke Takano ,  Susumu Orikasa ,  Akihiko Tao

    发明人： Yasushi Noguchi ,  Shyunsuke Takano ,  Susumu Orikasa ,  Akihiko Tao

    IPC分类号： H04N1/00 ,  H04N1/21 ,  H04N1/393 ,  H04N7/14 ,  H04N7/15 ,  G09G5/04

    CPC分类号： H04N1/3935 ,  H04N7/142

    摘要： A picture processor for a video conference device, etc., can be used easily by carrying it into a room other than the video conference room, has an object of enabling the display of the input picture to be switched freely even if the picture of the line drawing is displayed together with the input picture. The picture of a line drawing, etc., is held at the corresponding position even in cases where the display of the input picture is switched by updating the input picture data, which is stored in the input picture memory 40, on the basis of the line drawing date and by writing the picture expressed with the line drawing data directly in the input picture, which is stored in the input picture memory 40.

    摘要翻译： 用于视频会议设备等的图像处理器可以通过将其携带到除了视频会议室之外的房间中而容易地使用，具有能够自由切换输入图像的显示的目的，即使图像 线条图与输入图像一起显示。 即使在通过更新存储在输入图像存储器40中的输入图像数据来切换输入图像的显示的情况下，线图等的图像也保持在相应的位置， 并且通过将直线图形表示的图像直接写入存储在输入图像存储器40中的输入图像中。

    Majority logic circuit for digital error correction system
    86.
    发明授权
    Majority logic circuit for digital error correction system 失效
    用于数字纠错系统的多数逻辑电路

    公开(公告)号：US4660199A

    公开(公告)日：1987-04-21

    申请号：US697579

    申请日：1985-01-16

    申请人： Satoru Maeda ,  Yasushi Noguchi

    发明人： Satoru Maeda ,  Yasushi Noguchi

    IPC分类号： H04L1/00 ,  G06F7/00 ,  G06F7/76 ,  G06F11/10 ,  G06F11/18 ,  H03K19/23 ,  H03M13/43

    CPC分类号： H03M13/43 ,  H03K19/23

    摘要： According to this invention, there are provided a plurality of memories in which predetermined data are written and a plurality of gates. Parity check bits are grouped into a plurality of groups in response to the bit number of the addresses of the memories. Of the grouped parity checkbits, the parity checkbits corresponding to the addresses of the memories are supplied to the addresses and the outputs of the memories are supplied to the gates so as to decode the parity check bits, whereby a threshold value is identified on the basis of the outputs of the gates.

    摘要翻译： PCT No.PCT / JP84 / 00280 Sec。 371日期1985年1月16日 102（e）日期1985年1月16日PCT Filed 1984年6月1日PCT公布。 公开号WO84 / 04984 日期为1984年12月20日。根据本发明，提供了多个存储器，其中写入预定数据和多个门。 响应于存储器的地址的位数，奇偶校验位被分组成多个组。 在分组的奇偶校验位中，对应于存储器的地址的奇偶校验位被提供给地址，并且存储器的输出被提供给门，以对奇偶校验位进行解码，由此基于 的门输出。