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公开(公告)号:US11650817B2
公开(公告)日:2023-05-16
申请号:US17276598
申请日:2019-09-18
Applicant: Optimum Semiconductor Technologies Inc.
Inventor: Mayan Moudgill , Murugappan Senthilvelan
IPC: G06F9/30
CPC classification number: G06F9/30036 , G06F9/3013 , G06F9/30018
Abstract: A processor includes a register file comprising a length register, a vector register file comprising a plurality of vector registers, a mask register file comprising a plurality of mask registers, and a vector instruction execution circuit to execute a masked vector instruction comprising a first length register identifier representing the length register, a first vector register identifier representing a first vector register of the vector register file, and a first mask register identifier representing a first mask register of the mask register file, wherein the length register is to store a length value representing a number of operations to be applied to data elements stored in the first vector register, the first mask register is to store a plurality of mask bits, and a first mask bit of the plurality of mask bits determines whether a corresponding first one of the operations causes an effect.
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公开(公告)号:US20220114807A1
公开(公告)日:2022-04-14
申请号:US17264146
申请日:2019-07-24
Applicant: Optimum Semiconductor Technologies Inc.
Inventor: Sabin Daniel IANCU , Beinan WANG , John GLOSSNER
Abstract: A system and method relating to object detection may include receiving an image frame comprising an array of pixels captured by an image sensor associated with the processing device, identifying a near-field image segment and a far-field image segment in the image frame, applying a first neural network trained for near-field image segments to the near-field image segment for detecting the objects presented in the near-field image segment, and applying a second neural network trained for far-field image segments to the far-field image segment for detecting the objects presented in the near-field image segment.
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公开(公告)号:US20220063573A1
公开(公告)日:2022-03-03
申请号:US17275007
申请日:2019-09-11
Applicant: Optimum Semiconductor Technologies Inc.
Inventor: Samantha MURPHY , John GLOSSNER , Sabin Daniel IANCU
IPC: B60T7/22
Abstract: An anti-collision system and method of a vehicle including a first sensor device to capture first sensor data associated with a first vehicle in front of the vehicle, a second sensor device to capture second sensor data associated with a second vehicle behind the vehicle, and a processing device to calculate, based on the first sensor data, a plurality of first parameters characterizing the first vehicle, calculate, based on the second sensor data, a plurality of second parameters characterizing the second vehicle, responsive to detecting a braking event by the first vehicle, determine, based on a rule taking into consideration at least one of the plurality of first parameters and at least one of the plurality of second parameters, a braking force for the vehicle, and generate a braking control signal that applies the braking force to brakes of the vehicle.
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公开(公告)号:US20210269037A1
公开(公告)日:2021-09-02
申请号:US17254731
申请日:2019-05-20
Applicant: Optimum Semiconductor Technologies Inc.
Inventor: Samantha MURPHY , John GLOSSNER , Sabin Daniel IANCU
Abstract: A system and method to operate an autonomous vehicle on the road. The system and method may include determining a lane area on a road, calculating a first position within the lane area, determining a tolerance region within the lane area, calculating a deviation offset based on the tolerance region, calculating a second position based on the first position and the deviation offset, and causing to operate the autonomous vehicle to travel to the second position.
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公开(公告)号:US10733140B2
公开(公告)日:2020-08-04
申请号:US14727051
申请日:2015-06-01
Applicant: Optimum Semiconductor Technologies, Inc.
Inventor: Mayan Moudgill , Arthur Joseph Hoane , Paul Hurtley
Abstract: A computer processor is disclosed. The computer processor may comprises a vector unit comprising a vector register file comprising at least one register to hold a varying number of elements. The computer processor may further comprise processing logic configured to operate on the varying number of elements in the vector register file using one or more instructions that produce results with elements of widths different than that of the input elements. The computer processor may be implemented as a monolithic integrated circuit.
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公开(公告)号:US10719451B2
公开(公告)日:2020-07-21
申请号:US15868513
申请日:2018-01-11
Applicant: Optimum Semiconductor Technologies, Inc.
Inventor: Mayan Moudgill , A. Joseph Hoane , Lei Wang , Gary Nacer , Aaron G. Milbury , Enrique A. Barria , Paul Hurtley
IPC: G06F12/1027 , G06F12/1036 , G06F12/1009 , G06F12/0864
Abstract: A processor includes a translation lookaside buffer (TLB) comprising a plurality of ways, wherein each way is associated with a respective page size, and a processing core, communicatively coupled to the TLB, to execute an instruction associated with a virtual memory page, identify a first way of the plurality of ways, wherein the first way is associated with a first page size, determine an index value using the virtual memory page and the first page size for the first way, determine, using the index value, a first TLB entry of the first way, and translate, using a memory address translation stored in the first TLB entry, the first virtual memory page to a first physical memory page.
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公开(公告)号:US12050910B2
公开(公告)日:2024-07-30
申请号:US17427832
申请日:2020-02-20
Applicant: Optimum Semiconductor Technologies Inc.
Inventor: Mayan Moudgill , Pablo Balzola , Murugappan Senthivelan , Vaidyanathan Ramdurai , Sitij Agrawal
CPC classification number: G06F9/3001 , G06F7/5446 , G06F7/548 , G06F9/3013 , G06F17/17 , G06F5/01
Abstract: A system and an accelerator circuit including a register file comprising instruction registers to store a trigonometric calculation instruction for evaluating a trigonometric function, and data registers comprising a first data register to store a floating-point input value associated with the trigonometric calculation instruction. The accelerator circuit further includes a determination circuit to identify the trigonometric calculation function and the floating-point input value associated with the trigonometric calculation instruction and determine whether the floating-point input value is in a small value range, and an approximation circuit to responsive to determining that the floating-point input value is in the small value, receive the floating-point input value and calculate an approximation of the trigonometric function with respect to the input value.
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公开(公告)号:US11928465B2
公开(公告)日:2024-03-12
申请号:US17427843
申请日:2020-02-20
Applicant: Optimum Semiconductor Technologies Inc.
Inventor: Mayan Moudgill , Pablo Balzola , Murugappan Senthivelan , Vaidyanathan Ramdurai , Sitij Agrawal
CPC classification number: G06F9/3001 , G06F7/5446 , G06F7/548 , G06F9/3013 , G06F17/17 , G06F5/01
Abstract: A system and an accelerator circuit including a register file comprising instruction registers to store an instruction for evaluating an elementary function, and data registers comprising a first data register to store an input value. The accelerator circuit further includes a successive cumulative rotation circuit comprising a reconfigurable inner stage to perform a successive cumulative rotation recurrence, and a determination circuit to determine a type of the elementary function based on the instruction, and responsive to determining that the input value is a fixed-point number, configure the reconfigurable inner stage to a configuration for evaluating the type of the elementary function, wherein the successive cumulative rotation circuit is to calculate an evaluation of the elementary function using the reconfigurable inner stage performing the successive cumulative rotation recurrence.
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公开(公告)号:US20220262002A1
公开(公告)日:2022-08-18
申请号:US17623714
申请日:2020-06-30
Applicant: Optimum Semiconductor Technologies Inc.
Inventor: Beinan WANG , John GLOSSNER , Sabin Daniel IANCU
Abstract: A system and method relating to constructing an encoder and decoder neural network for providing semantic image segmentation includes generating an encoder comprising encoding convolution layers, each of the encoding convolution layers specifying an encoding filter operation using a respective first filter kernel, generating a decoder corresponding to the encoder, the decoder comprising decoding convolution layers, each of the decoding convolution layers being associated with a corresponding encoding convolution layer, and each of the decoding convolution layers specifying a decoding filter operation using a respective second filter kernel derived from the first filter kernel of the corresponding encoder convolution layer, and providing an input image to the encoder and the decoder for semantic image segmentation.
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公开(公告)号:US20220095434A1
公开(公告)日:2022-03-24
申请号:US17433673
申请日:2020-02-21
Applicant: Optimum Semiconductor Technologies Inc.
Inventor: Keyi LI , Sabin Daniel IANCU , John GLOSSNER , Beinan WANG , Samantha MURPHY
IPC: H05B47/105 , G06T7/90 , H05B45/20 , B60Q1/20
Abstract: An intelligent light system installed on a motor vehicle includes a light source to provide illumination for the motor vehicle, wherein a wavelength of a light beam generated by the light source is adjustable, a plurality of sensors for capturing sensor data of an environment surrounding the motor vehicle, and a processing device to receive the sensor data captured by the plurality of sensors, provide the sensor data to a neural network to determine a first state of the environment, and issue a control signal to adjust the wavelength of the light beam based on the determined first state of the environment.
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