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公开(公告)号：US07907090B2
公开(公告)日：2011-03-15
申请号：US11759523
申请日：2007-06-07
申请人： Eli Bershadsky , Marina Kravchik , Reuven Katraro , David Ben-Bassat , Dani Alon
发明人： Eli Bershadsky , Marina Kravchik , Reuven Katraro , David Ben-Bassat , Dani Alon
IPC分类号： H01Q1/24
CPC分类号： C04B35/47 , C04B2235/3208 , C04B2235/3215 , C04B2235/3229 , C04B2235/3236 , C04B2235/3244 , C04B2235/3248 , C04B2235/3262 , C04B2235/3284 , C04B2235/3298 , C04B2235/349 , C04B2235/36 , C04B2235/656 , C04B2235/72
摘要： A dielectric ceramic composition has a dielectric constant, K, of at least 200 and a dielectric loss, DF, of 0.0006 or less at 1 MHz. The dielectric ceramic composition may be formed by sintering by firing in air without a controlled atmosphere. The dielectric ceramic composition may have a major component of 92.49 to 97.5 wt. % containing 60.15 to 68.2 wt. % strontium titanate, 11.02 to 23.59 wt. % calcium titanate and 7.11 to 21.32 wt. % barium titanate; and a minor component of 2.50 to 7.51 wt. % containing 1.18 to 3.55 wt. % calcium zirconate, 0.50 to 1.54 wt. % bismuth trioxide, 0.2 to 0.59 wt. % zirconia, 0.02 to 0.07 wt. % manganese dioxide, 0.12 to 0.35 wt. % zinc oxide, 0.12 to 0.35 wt. % lead-free glass frit, 0.24 to 0.71 wt. % kaolin clay and 0.12 to 0.35 wt. % cerium oxide. UHF antennas and monolithic ceramic components may use the dielectric ceramic composition.
摘要翻译： 介电陶瓷组合物的介电常数K至少为200，介电损耗DF在1MHz时为0.0006以下。 电介质陶瓷组合物可以通过在没有受控气氛的空气中烧制而烧结而形成。 介电陶瓷组合物可以具有92.49至97.5重量％的主要组分。 ％含有60.15〜68.2重量％ ％钛酸锶，11.02〜23.59重量％ 钛酸钙和7.11〜21.32重量％ ％钛酸钡; 和2.50〜7.51重量％的次要组分。 ％含有1.18〜3.55重量％ 锆酸钙，0.50〜1.54重量％ 三氧化二铋，0.2〜0.59重量％ ％氧化锆，0.02〜0.07重量％ ％二氧化锰，0.12〜0.35wt。 ％氧化锌，0.12〜0.35重量％ ％无铅玻璃料，0.24至0.71wt。 ％的高岭土和0.12〜0.35wt。 ％的氧化铈。 UHF天线和单片陶瓷组件可以使用介电陶瓷组合物。
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公开(公告)号：US20080211619A1
公开(公告)日：2008-09-04
申请号：US12030281
申请日：2008-02-13
申请人： Michael Belman , Leonid Akhtman
发明人： Michael Belman , Leonid Akhtman
IPC分类号： H01C1/012
CPC分类号： H01C1/034 , H01C17/288
摘要： A chip resistor includes an insulating substrate 11, top terminal electrodes 12 formed on top surface of the substrate using silver-based cermet, bottom electrodes 13, resistive element 14 that is situated between the top terminal electrodes 12 and overlaps them partially, an optional internal protective coating 15 that covers resistive element 14 completely or partially, an external protective coating 16 that covers completely the internal protection coating 15 and partially covers top terminal electrodes 12, a plated layer of nickel 17 that covers face sides of the substrate, top 12 and bottom 13 electrodes, and overlaps partially external protective coating 16, finishing plated layer 18 that covers nickel layer 17. The overlap of nickel layer 17 and external protective layer 16 possesses a sealing property because of metallization of the edges of external protective layer 16 prior to the nickel plating process.
摘要翻译： 芯片电阻器包括绝缘基板11，使用银基金属陶瓷在基板的顶表面上形成的顶部端子电极12，底部电极13，位于顶部端子电极12之间并与其部分重叠的电阻元件14，可选内部 完全或部分覆盖电阻元件14的保护涂层15，完全覆盖内部保护涂层15并且部分地覆盖顶部端子电极12的外部保护涂层16，覆盖基底的正面的镍17的镀层，顶部12和 底部13个电极，并且重叠部分外部保护涂层16，覆盖镍层17的整理镀层18。 镍层17和外部保护层16的重叠由于在镀镍过程之前的外部保护层16的边缘的金属化而具有密封性。
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公开(公告)号：US07150199B2
公开(公告)日：2006-12-19
申请号：US10958545
申请日：2004-10-05
IPC分类号： G01F1/00
CPC分类号： G01L1/2287
摘要： An improved strain gage and an improved manufacturing method are disclosed. The strain gage includes a semi-rigid substrate having a thickness of 3 to 30 mils, a resistive strain sensitive foil bonded to the semi-rigid substrate for providing a resistance varying with strain associated with a surface to which the strain gage is attached, a first and a second terminal operatively connected to the resistive strain sensitive foil, and an anti-static layer. The improved strain gage allows for reduced labor content in manufacturing by allowing use of modern automated electronic component manufacturing equipment.
摘要翻译： 公开了改进的应变计和改进的制造方法。 应变计包括厚度为3至30密耳的半刚性基底，结合到半刚性基底的电阻应变敏感箔，用于提供与应变计附着的表面相关联的应变变化的电阻， 第一和第二端子，其可操作地连接到电阻性应变敏感箔片和抗静电层。 改进的应变片允许通过允许使用现代自动电子元件制造设备来减少制造中的劳动量。
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公开(公告)号：US07089652B2
公开(公告)日：2006-08-15
申请号：US10440941
申请日：2003-05-19
申请人： Leonid Akhtman , Sakaev Matvey
发明人： Leonid Akhtman , Sakaev Matvey
IPC分类号： H01C17/00
CPC分类号： H01C7/003 , H01C1/142 , H01C17/006 , H01C17/281 , Y10T29/49082 , Y10T29/49098 , Y10T29/49099
摘要： The present invention provides for a method for manufacturing flip chip resistors by applying a first electrode layer to a substrate to create at least one pair of opposite electrodes, applying a resistance layer between each pair of opposite electrodes, applying a first protective layer at least partially overlaying the resistance layer, applying a second protective layer at least partially overlaying at least a portion of the resistance layer, and applying a second electrode layer overlaying the first electrode layer, a portion of the resistance layer, and at least a portion of the second protective layer. The present invention provides for higher reliability performance and enlarging the potential soldering area despite small chip size.
摘要翻译： 本发明提供了一种制造倒装芯片电阻器的方法，该方法是通过将第一电极层施加到衬底以产生至少一对相对电极，在每对相对电极之间施加电阻层，至少部分地施加第一保护层 覆盖所述电阻层，施加至少部分覆盖所述电阻层的至少一部分的第二保护层，以及施加覆盖所述第一电极层的第二电极层，所述电阻层的一部分以及所述第二电极层的至少一部分 保护层。 尽管芯片尺寸小，本发明提供了更高的可靠性性能和扩大了潜在的焊接区域。
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公开(公告)号：US06880234B2
公开(公告)日：2005-04-19
申请号：US09810206
申请日：2001-03-16
申请人： Javed Khan
发明人： Javed Khan
CPC分类号： H01C7/043 , H01C13/02 , H01C17/075 , H01C17/288 , Y10T29/49082 , Y10T29/49085 , Y10T29/49099
摘要： A method for manufacturing a thin film negative temperature coefficient thermistor is disclosed. The method includes selecting a negative temperature coefficient of resistance versus temperature curve, selecting a mixture of metal film materials to provide the negative temperature coefficient of resistance curve while maintaining a desired physical size, and depositing the mixture of metal film materials on a substrate.
摘要翻译： 公开了薄膜负温度系数热敏电阻的制造方法。 该方法包括选择电阻对温度曲线的负温度系数，选择金属膜材料的混合物以提供耐温曲线的负温度系数，同时保持所需的物理尺寸，以及将金属膜材料的混合物沉积在基底上。
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公开(公告)号：US3801340A
公开(公告)日：1974-04-02
申请号：US3801340D
申请日：1972-05-23
发明人： ELLIS G
CPC分类号： C09D5/28 , G01B11/20 , Y10S252/961
摘要： Highly sensitive, non-flammable, substantially odorless brittle coating compositions are disclosed for use in experimental stress analysis. The brittle coating compositions include a resin, a solvent, a plasticizer, a wetting agent and water.
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公开(公告)号：US3718883A
公开(公告)日：1973-02-27
申请号：US3718883D
申请日：1971-10-15
CPC分类号： H01C1/032 , H01C1/14 , H01C1/144 , Y10T29/49098
摘要： Improved means of attaching electrical connectors to miniaturized electrical components are disclosed. Flexible leads separately attached to the front of an electrical component are attached at their opposite ends to more rigid electrical connectors on the reverse side of the electrical component. The electrical connectors and the electrical component are preferably bonded together for improved stability. The resulting electrical component is typically surrounded with at least one protective covering.
摘要翻译： 公开了将电连接器附接到小型化电气部件的改进方式。 分离地附接到电气部件的前部的柔性引线在其相对端附接到电气部件的相反侧上的更刚性的电连接器。 电连接器和电气部件优选地结合在一起以提高稳定性。 所得到的电气部件通常被至少一个防护罩包围。
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8.发明授权
公开(公告)号：US3651584A
公开(公告)日：1972-03-28
申请号：US3651584D
申请日：1970-05-27
发明人： PERRY CHARLES C
摘要： Apparatus consisting of a frame in which a photoelastic model of a structural member is mounted in a floating position and a plurality of separately actuatable load applying members are movably mounted on the frame for applying various loads to the model to visually demonstrate various stress patterns in the model corresponding to the various loads applied thereto.
摘要翻译： 由结构构件的光弹性模型安装在浮动位置的框架和多个可单独致动的负载施加构件构成的装置可移动地安装在框架上，用于向模型施加各种载荷以目视地显示各种应力模式 模型对应于施加到其上的各种负载。
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公开(公告)号：US08957756B2
公开(公告)日：2015-02-17
申请号：US13970011
申请日：2013-08-19
发明人： Michael Belman , Leonid Akhtman
CPC分类号： H01C1/034 , H01C17/288
摘要： A chip resistor includes an insulating substrate, top terminal electrodes formed on top surface of the substrate using silver-based cermet, bottom electrodes, resistive element that is situated between the top terminal electrodes and overlaps them partially, an optional internal protective coating that covers resistive element completely or partially, an external protective coating that covers completely the internal protection coating and partially covers top terminal electrodes, a plated layer of nickel that covers face sides of the substrate, top and bottom electrodes, and overlaps partially external protective coating, finishing plated layer that covers nickel layer. The overlap of nickel layer and external protective layer possesses a sealing property because of metallization of the edges of external protective layer prior to the nickel plating process.
摘要翻译： 片状电阻器包括绝缘基板，使用银基金属陶瓷在基板的顶表面上形成的顶端电极，底电极，位于顶端电极之间并与其部分重叠的电阻元件，可选的内部保护涂层，其覆盖电阻 元件完全或部分，外部保护涂层完全覆盖内部保护涂层，并部分覆盖顶端电极，覆盖基板正面的镍镀层，顶部和底部电极，并重叠部分外部保护涂层，镀层 覆盖镍层的层。 镍镀层和外部保护层的重叠由于在镀镍工艺之前的外部保护层的边缘的金属化而具有密封性。
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公开(公告)号：US20130335191A1
公开(公告)日：2013-12-19
申请号：US13970011
申请日：2013-08-19
发明人： Michael Belman , Leonid Akhtman
IPC分类号： H01C1/034
CPC分类号： H01C1/034 , H01C17/288
摘要： A chip resistor includes an insulating substrate, top terminal electrodes formed on top surface of the substrate using silver-based cermet, bottom electrodes, resistive element that is situated between the top terminal electrodes and overlaps them partially, an optional internal protective coating that covers resistive element completely or partially, an external protective coating that covers completely the internal protection coating and partially covers top terminal electrodes, a plated layer of nickel that covers face sides of the substrate, top and bottom electrodes, and overlaps partially external protective coating, finishing plated layer that covers nickel layer. The overlap of nickel layer and external protective layer possesses a sealing property because of metallization of the edges of external protective layer prior to the nickel plating process.
摘要翻译： 片状电阻器包括绝缘基板，使用银基金属陶瓷在基板的顶表面上形成的顶端电极，底电极，位于顶端电极之间并与其部分重叠的电阻元件，可选的内部保护涂层，其覆盖电阻 元件完全或部分，外部保护涂层完全覆盖内部保护涂层，并部分覆盖顶端电极，覆盖基板正面的镍镀层，顶部和底部电极，并重叠部分外部保护涂层，镀层 覆盖镍层的层。 镍镀层和外部保护层的重叠由于在镀镍工艺之前的外部保护层的边缘的金属化而具有密封性。
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