公开(公告)号：US09654037B2

公开(公告)日：2017-05-16

申请号：US14461918

申请日：2014-08-18

申请人： Kuo-Chung Lee ,  Wei-Hsu Chang ,  An-Tung Chen ,  Chun-Wen Wang

发明人： Kuo-Chung Lee ,  Wei-Hsu Chang ,  An-Tung Chen ,  Chun-Wen Wang

IPC分类号： H02P6/06 ,  H02P6/182

CPC分类号： H02P6/182 ,  H02P6/15 ,  H02P6/18

摘要： A multi-phase motor control method controls a multi-phase motor which includes multiple nodes respectively receiving a corresponding number of driving voltage signals to control a rotation of a rotor. The motor control method includes: sensing a signal phase of a current signal corresponding to at least one node, for example by sensing a zero-crossing point of the current signal; determining a reference phase for the current signal; calculating a phase difference between the signal phase and the reference phase; and controlling a phase switching frequency of the stator according to the phase difference, such that the signal phase is close to or in phase with the reference phase, to thereby obtain an optimum rotation speed of the rotor corresponding to a given driving voltage. The present invention also provides a multi-phase motor control device using the motor control method.

公开(公告)号：US08878304B2

公开(公告)日：2014-11-04

申请号：US13358242

申请日：2012-01-25

申请人： Li-Wen Fang ,  Chih-Hao Yang ,  An-Tung Chen

发明人： Li-Wen Fang ,  Chih-Hao Yang ,  An-Tung Chen

IPC分类号： H01L27/06 ,  G11C29/00 ,  H01L27/02

CPC分类号： G11C29/785 ,  H01L27/0255 ,  H01L27/0617

摘要： The present invention discloses a fuse circuit for final test trimming of an integrated circuit (IC) chip. The fuse circuit includes at least one electrical fuse, at least one control switch corresponding to the electrical fuse, and a resistant device. The electrical fuse is connected with the control switch in series between a predetermined pin and a grounding pin. The control switch receives a control signal to determine whether a predetermined current flows through the corresponding electrical fuse and breaks the electrical fuse. The resistant device is coupled between a bulk terminal and a source terminal to increase a resistance of a parasitic channel, such that an electrostatic discharge (ESD) protection is enhanced, and errors of final test trimming of an IC chip are avoided.

摘要翻译： 本发明公开了一种用于集成电路（IC）芯片的最终测试修整的熔丝电路。 熔断器电路包括至少一个电熔丝，对应于电熔丝的至少一个控制开关和一个电阻装置。 电保险丝与控制开关串联连接在预定的引脚和接地引脚之间。 控制开关接收控制信号以确定预定电流是否流过相应的电熔丝并断开电熔丝。 电阻器件耦合在体端子和源极端子之间以增加寄生沟道的电阻，从而增强了静电放电（ESD）保护，并且避免了IC芯片的最终测试修整的误差。

公开(公告)号：US08791678B2

公开(公告)日：2014-07-29

申请号：US13188867

申请日：2011-07-22

申请人： Ting-Jung Tai ,  Chih-Hao Yang ,  An-Tung Chen

发明人： Ting-Jung Tai ,  Chih-Hao Yang ,  An-Tung Chen

IPC分类号： H02M3/156

CPC分类号： H02M3/156

摘要： A control circuit of a switching DC-DC power supply includes a feedback circuit detecting an output voltage of the power supply to generate a feedback signal, an error comparator detecting an error between the output voltage and a design value of the output voltage, a control logic circuit generating a control signal according to the error for regulating the output voltage, and an offset and delay cancellation circuit generating an offset adjust signal according to the feedback signal and a second reference voltage for adjusting an offset of the error comparator to pull the output voltage toward the design value.

摘要翻译： 开关DC-DC电源的控制电路包括检测电源的输出电压以产生反馈信号的反馈电路，检测输出电压与输出电压的设计值之间的误差的误差比较器，控制 逻辑电路根据用于调节输出电压的误差产生控制信号，以及偏移和延迟消除电路，根据反馈信号产生偏移调整信号，第二参考电压用于调整误差比较器的偏移量以将输出 电压达到设计值。

公开(公告)号：US08446135B2

公开(公告)日：2013-05-21

申请号：US13404520

申请日：2012-02-24

申请人： An-Tung Chen ,  Chih-Hao Yang

发明人： An-Tung Chen ,  Chih-Hao Yang

IPC分类号： G05F1/56

CPC分类号： H02M3/156 ,  H02M2001/0025

摘要： A control circuit and method for a ripple regulator system generate a ripple signal in-phase and synchronous with an inductor current of the ripple regulator system, and extract a ripple information proportional to the amplitude of the ripple signal. The ripple signal is used for triggering control in PWM signal generation to make the ripple regulator system have small ripples and better loop stability simultaneously. The ripple information is used to improve the output offset of the ripple regulator system that is caused by the ripple signal.

摘要翻译： 用于纹波调节器系统的控制电路和方法与纹波调节器系统的电感电流同相产生纹波信号，并提取与纹波信号幅度成比例的纹波信息。 纹波信号用于触发PWM信号生成中的控制，使波纹调节器系统同时具有小波纹和更好的环路稳定性。 纹波信息用于改善由纹波信号引起的纹波调节器系统的输出偏移。

公开(公告)号：US08253407B2

公开(公告)日：2012-08-28

申请号：US12658549

申请日：2010-02-05

申请人： An-Tung Chen ,  Jo-Yu Wang

发明人： An-Tung Chen ,  Jo-Yu Wang

IPC分类号： G05F1/40

CPC分类号： H02M3/1588 ,  H02M2001/0032 ,  Y02B70/1466 ,  Y02B70/16

摘要： The present invention discloses a voltage mode switching regulator with improved light load efficiency and mode transition characteristic, and a control circuit and a control method therefor. The switching regulator can switch between a pulse width modulation (PWM) mode and a pulse skipping mode. The control method for the switching regulator comprises: comparing a feedback signal relating to an output voltage with a reference signal, to generate an error amplification signal; generating a duty signal according to the error amplification signal and a ramp signal, to control the switching regulator; setting a threshold level of the error amplification signal and a threshold level of the pulse skipping mode according to the error amplification signal in a stable status; and when the error amplification signal is close or equal to the threshold level of the pulse skipping mode, generating a pulse skip signal to enter the pulse skipping mode.

摘要翻译： 本发明公开了一种具有改善的轻负载效率和模式转换特性的电压模式切换调节器，以及一种控制电路及其控制方法。 开关调节器可以在脉冲宽度调制（PWM）模式和脉冲跳跃模式之间切换。 开关调节器的控制方法包括：将与输出电压相关的反馈信号与参考信号进行比较，以产生误差放大信号; 根据误差放大信号和斜坡信号产生占空比信号，以控制开关调节器; 根据误差放大信号在稳定状态下设置误差放大信号的阈值电平和脉冲跳跃模式的阈值电平; 并且当误差放大信号接近或等于脉冲跳跃模式的阈值电平时，产生脉冲跳跃信号以进入脉冲跳跃模式。

公开(公告)号：US08248139B2

公开(公告)日：2012-08-21

申请号：US12977662

申请日：2010-12-23

申请人： Isaac Y. Chen ,  An-Tung Chen

发明人： Isaac Y. Chen ,  An-Tung Chen

IPC分类号： G06F1/04

CPC分类号： G06F1/04

摘要： An apparatus for interleaved phase shift clock synchronization includes a master clock generator and at least one slave clock generator. The master clock generator provides a ramp signal or reset signal for each slave clock generator to generate a clock synchronized with the clock of the master clock generator, and the master and slave clock generators have different reference voltages for generating clocks. Therefore, the clocks generated will be synchronized and interleaved phase with each other.

摘要翻译： 用于交错相移时钟同步的装置包括主时钟发生器和至少一个从时钟发生器。 主时钟发生器为每个从时钟发生器提供斜坡信号或复位信号，以产生与主时钟发生器的时钟同步的时钟，并且主时钟和从时钟发生器具有不同的参考电压用于产生时钟。 因此，产生的时钟将彼此同步并交错相位。

公开(公告)号：US20110280353A1

公开(公告)日：2011-11-17

申请号：US12930941

申请日：2011-01-20

申请人： Isaac Chen ,  An-Tung Chen

发明人： Isaac Chen ,  An-Tung Chen

IPC分类号： H04L7/00

CPC分类号： H03K5/15073 ,  G06F1/04 ,  H02J3/01 ,  H02M2003/1586 ,  Y10T307/50 ,  Y10T307/707

摘要： The present invention discloses an adaptive phase-shifted synchronization clock generation circuit and a method for generating phase-shifted synchronization clock. The adaptive phase-shifted synchronization clock generation circuit includes: a current source generating a current which flows through a node to generate a node voltage on the node; a reverse-proportional voltage generator coupled to the node for generating a voltage which is reverse-proportional to the node voltage; a ramp generator receiving a synchronization input signal and generating a ramp signal; a comparator comparing the reverse-proportional voltage to the ramp signal; and a pulse generator for generating a clock signal according to an output from the comparator.

摘要翻译： 本发明公开了一种自适应相移同步时钟产生电路和一种产生相移同步时钟的方法。 自适应相移同步时钟生成电路包括：电流源，其产生流过节点的电流，以在节点上产生节点电压; 耦合到所述节点的反向比例电压发生器，用于产生与所述节点电压成反比的电压; 斜坡发生器接收同步输入信号并产生斜坡信号; 比较反向比例电压与斜坡信号的比较器; 以及用于根据比较器的输出产生时钟信号的脉冲发生器。

公开(公告)号：US20110261492A1

公开(公告)日：2011-10-27

申请号：US13092282

申请日：2011-04-22

申请人： SHAO-HUNG LU ,  JING-MENG LIU ,  JO-YU WANG ,  ISAAC Y. CHEN ,  AN-TUNG CHEN

发明人： SHAO-HUNG LU ,  JING-MENG LIU ,  JO-YU WANG ,  ISAAC Y. CHEN ,  AN-TUNG CHEN

IPC分类号： H02H3/26

CPC分类号： H02M1/32

摘要： For a system to avoid abnormal operation caused by a shorted parameter setting pin of an integrated circuit, a protection apparatus and method apply a buffered reference voltage to the parameter setting pin to define an internal parameter of the integrated circuit by the buffered reference voltage and an external element connected to the parameter setting pin, and detect the rapid variation of the internal parameter to trigger a shutdown signal or slow down the speed of the variation of the internal parameter reflected to an adjustable signal of the integrated circuit.

摘要翻译： 为了避免由集成电路的短路参数设置引脚引起的异常操作的系统，保护装置和方法将缓冲的参考电压施加到参数设置引脚，以通过缓冲的参考电压定义集成电路的内部参数，并且 外部元件连接到参数设置引脚，并检测内部参数的快速变化以触发关断信号或将内部参数变化的速度降低到集成电路的可调信号。

公开(公告)号：US20110018514A1

公开(公告)日：2011-01-27

申请号：US12658692

申请日：2010-02-12

申请人： An-Tung Chen ,  Li-Wen Fang

发明人： An-Tung Chen ,  Li-Wen Fang

IPC分类号： G05F1/10

CPC分类号： H02M3/1588 ,  H02M2001/0032 ,  H02M2001/0048 ,  Y02B70/1466 ,  Y02B70/1491 ,  Y02B70/16

摘要： The present invention discloses a dual-mode buck switching regulator, comprising: a first power transistor having an end coupled to an input voltage and another end coupled to a common node; an inductor having an end coupled to the common node and another end coupled to the input voltage; a second power transistor having an end coupled to ground; a diode having an end coupled to ground; and a control circuit generating a first and a second switch control signals for controlling operations of the first and the second power transistors according to a feedback signal, and generating a mode selection signal according a mode control signal to select a synchronous or an asynchronous mode, wherein the second power transistor has another end which is coupled to the common node in the synchronous mode, and the diode has another end which is coupled to the common node in the asynchronous mode, and in the asynchronous mode: the another end of the second power transistor is not coupled to the common mode, or the second power transistor maintains off. The present invention also relates to a control circuit of the dual-mode buck switching regulator.

摘要翻译： 本发明公开了一种双模降压开关调节器，包括：第一功率晶体管，其一端耦合到输入电压，另一端耦合到公共节点; 电感器，其端部耦合到公共节点，另一端耦合到输入电压; 第二功率晶体管，其端部耦合到地; 二极管，其一端与地耦合; 以及控制电路，根据反馈信号产生用于控制第一和第二功率晶体管的操作的第一和第二开关控制信号，并且根据模式控制信号产生模式选择信号以选择同步或异步模式， 其中所述第二功率晶体管具有以同步模式耦合到所述公共节点的另一端，并且所述二极管具有以所述异步模式耦合到所述公共节点并且处于所述异步模式的另一端：所述第二功率晶体管的另一端 功率晶体管不耦合到共模，或者第二功率晶体管保持断开。 本发明还涉及双模降压开关调节器的控制电路。

公开(公告)号：US20100320844A1

公开(公告)日：2010-12-23

申请号：US12818539

申请日：2010-06-18

申请人： CHI-HUA LIN ,  CHIEN-FU TANG ,  ISAAC Y. CHEN ,  AN-TUNG CHEN

发明人： CHI-HUA LIN ,  CHIEN-FU TANG ,  ISAAC Y. CHEN ,  AN-TUNG CHEN

IPC分类号： H02B1/24

CPC分类号： H02B1/24 ,  H04R3/007 ,  Y10T307/74 ,  Y10T307/766

摘要： A power off delay circuit includes a switch connected between an external power input terminal and an internal power supply terminal, a capacitor connected to the internal power supply terminal, and a hysteresis comparator to switch the switch according to the voltages of the external power input terminal and the internal power supply terminal. During on-time of the switch, the external power input terminal is connected to the internal power supply terminal and the capacitor can be charged by the external power source. When the switch is off, the capacitor provides electric power for an internal circuit. Application of the power off delay circuit to an audio system may eliminate the turn-off pops of the audio system.

摘要翻译： 断电延迟电路包括连接在外部电源输入端子和内部电源端子之间的开关，连接到内部电源端子的电容器和滞后比较器，用于根据外部电力输入端子的电压来切换开关 和内部电源端子。 在接通时，外部电源输入端子连接到内部电源端子，电容器可以通过外部电源充电。 当开关关闭时，电容为内部电路提供电力。 将断电延迟电路应用于音频系统可以消除音频系统的关闭声音。