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    Method and system for dynamically controlling power to multiple cores in a multicore processor of a portable computing device
    2.
    发明授权
    Method and system for dynamically controlling power to multiple cores in a multicore processor of a portable computing device 有权
    用于在便携式计算设备的多核处理器中动态地控制多个核的功率的方法和系统

    公开(公告)号：US08695008B2

    公开(公告)日：2014-04-08

    申请号：US13080454

    申请日：2011-04-05

    申请人： Edoardo Regini ,  Bohuslav Rychlik

    发明人： Edoardo Regini ,  Bohuslav Rychlik

    IPC分类号： G06F9/46 ,  G06F1/00

    CPC分类号： G06F9/5094 ,  G06F1/3287 ,  G06F1/329 ,  G06F11/3404 ,  Y02D10/171 ,  Y02D10/22 ,  Y02D10/24

    摘要： A method and system for dynamically determining the degree of workload parallelism and to automatically adjust the number of cores (and/or processors) supporting a workload in a portable computing device are described. The method and system includes a parallelism monitor module that monitors the activity of an operating system scheduler and one or more work queues of a multicore processor and/or a plurality of central processing units (“CPUs”). The parallelism monitor may calculate a percentage of parallel work based on a current mode of operation of the multicore processor or a plurality of processors. This percentage of parallel work is then passed to a multiprocessor decision algorithm module. The multiprocessor decision algorithm module determines if the current mode of operation for the multicore processor (or plurality of processors) should be changed based on the calculated percentage of parallel work.

    摘要翻译： 描述了用于动态地确定工作负载并行度的程度并且自动调整支持便携式计算设备中的工作负载的核心（和/或处理器）的数量的方法和系统。 该方法和系统包括并行监视器模块，其监视操作系统调度器和多核处理器和/或多个中央处理单元（“CPU”）的一个或多个工作队列的活动。 并行监视器可以基于多核处理器或多个处理器的当前操作模式来计算并行工作的百分比。 然后将这个并行工作的百分比传递给多处理器决策算法模块。 多处理器决策算法模块确定多核处理器（或多个处理器）的当前操作模式是否应根据计算的并行工作百分比进行更改。

    Expansion of a stacked register file using shadow registers
    7.
    发明授权
    Expansion of a stacked register file using shadow registers 有权
    使用影子寄存器扩展堆叠寄存器文件

    公开(公告)号：US07844804B2

    公开(公告)日：2010-11-30

    申请号：US11271545

    申请日：2005-11-10

    申请人： Bohuslav Rychlik

    发明人： Bohuslav Rychlik

    IPC分类号： G06F7/38 ,  G06F9/00

    CPC分类号： G06F9/30123 ,  G06F9/30101 ,  G06F9/30116 ,  G06F9/30134 ,  G06F9/30138

    摘要： One or more Shadow Register Files (SRF) are interposed between a Physical Register File (PRF) and a Backing Store (BS) in a shadow register file system. The SRFs comprise dual-port registers connected serially in a chain of arbitrary depth from the PRF. A Register Save Engine has random access to one port of the registers in the final SRF in the chain, and saves/restores data between the final SRF and the BS, e.g., RAM. As PRF registers are deallocated from calling procedures for use by called procedures, data are serially shifted from multi-port registers in the PRF through successive corresponding dual-port registers in SRFs, and are serially shifted back toward the multi-port registers as the PRF registers are reallocated to calling procedures. Since no procedure can access more than the number of registers in the PRF, the effective size of the PRF is increased, using less costly dual-port registers.

    摘要翻译： 一个或多个影子寄存器文件（SRF）插入在影子寄存器文件系统中的物理寄存器文件（PRF）和备份存储（BS）之间。 SRF包括串行连接在与PRF任意深度的链中的双端口寄存器。 寄存器保存引擎具有对链中最终SRF中的寄存器的一个端口的随机访问，并且保存/恢复最终SRF和BS之间的数据，例如RAM。 由于PRF寄存器被从被调用过程使用的调用过程中分配，数据从PRF中的多端口寄存器通过SRF中的连续对应的双端口寄存器串行移位，并且作为PRF连续地向多端口寄存器移回 寄存器被重新分配给调用过程。 由于没有任何程序可以访问PRF中的寄存器数量，所以使用较便宜的双端口寄存器来增加PRF的有效大小。

    Advanced load value check enhancement
    8.
    发明授权
    Advanced load value check enhancement 有权
    高级负载值检查增强

    公开(公告)号：US07613906B2

    公开(公告)日：2009-11-03

    申请号：US11202770

    申请日：2005-08-12

    申请人： Bohuslav Rychlik

    发明人： Bohuslav Rychlik

    IPC分类号： G06F9/30 ,  G06F9/40 ,  G06F15/00

    CPC分类号： G06F9/383 ,  G06F9/3842

    摘要： Systems and methods for performing re-ordered computer instructions are disclosed. A computer processor loads a first value from a first memory address, and records both the first value and the second value in a table or queue. The processor stores a second value to the same memory address, and either evicts the previous table entry, or adds the second value to the previous table entry. Upon subsequently detecting the evicted table entry or inconsistent second value, the processor generates an exception that triggers recovery of speculative use of the first value.

    摘要翻译： 公开了用于执行重新排序的计算机指令的系统和方法。 计算机处理器从第一存储器地址加载第一值，并将第一值和第二值记录在表或队列中。 处理器将第二个值存储到相同的存储器地址，并且将驱逐前一个表项，或者将第二个值添加到先前的表项。 随后检测到逐出的表条目或不一致的第二值，处理器产生触发恢复第一个值的投机使用的异常。

    Reducing power by shutting down portions of a stacked register file
    9.
    发明申请
    Reducing power by shutting down portions of a stacked register file 有权
    关闭堆叠寄存器文件的部分来降低功耗

    公开(公告)号：US20060195707A1

    公开(公告)日：2006-08-31

    申请号：US11066958

    申请日：2005-02-25

    申请人： Bohuslav Rychlik

    发明人： Bohuslav Rychlik

    IPC分类号： G06F1/26

    CPC分类号： G06F9/30134 ,  G06F9/3012 ,  G06F9/30123

    摘要： Many processor architectures include registers in the form of a stacked register file, for holding data used during execution of processing operations. As taught herein, the physical registers forming the stack are organized into banks. One or more of the banks is activated and deactivated, as needed to meet the demands of register allocations.

    摘要翻译： 许多处理器架构包括堆叠寄存器文件形式的寄存器，用于保持在执行处理操作期间使用的数据。 如本文所教导的，形成堆叠的物理寄存器被组织成银行。 根据需要，一个或多个银行被激活和停用，以满足注册分配的要求。