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公开(公告)号：US07325180B2
公开(公告)日：2008-01-29
申请号：US10707205
申请日：2003-11-26
CPC分类号： G01R31/3025 , G01R31/2884 , G01R31/2889 , G01R31/303
摘要： A system to test integrated circuits on a wafer may include a transceiver formed on the wafer. The system may also include an antenna system couplable to the transceiver. The transceiver may be formed in one of a scribe line on the wafer, a chip on the wafer or on an otherwise unusable portion of the wafer. The antenna system maybe formed in at least one of the same scribe line as the transceiver or in at least one other scribe line formed in the wafer. Alternatively, the antenna system may include an antenna external to the wafer.
摘要翻译： 用于测试晶片上的集成电路的系统可以包括形成在晶片上的收发器。 系统还可以包括可耦合到收发器的天线系统。 收发器可以形成在晶片上的划线，晶片上的芯片或晶片的其它不可用部分之一中。 天线系统可以形成在与收发器相同的划线中的至少一个或形成在晶片中的至少一个其它划线中。 或者，天线系统可以包括晶片外部的天线。
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公开(公告)号：US06717502B2
公开(公告)日：2004-04-06
申请号：US10012209
申请日：2001-11-05
申请人： Chik Patrick Yue
发明人： Chik Patrick Yue
IPC分类号： H01F500
CPC分类号： H03F3/45183 , H03F2200/541 , H03H7/42 , Y10T29/4902 , Y10T29/49155
摘要： An on-chip signal transforming device includes a substrate and a first conductive layer above the substrate, wherein the first conductive layer has a plurality of interleaved inductors. The device further includes a second conductive layer above the substrate, wherein the second conductive layer has at least one inductor.
摘要翻译： 片上信号变换装置包括衬底和衬底上方的第一导电层，其中第一导电层具有多个交错电感器。 该器件还包括在衬底上方的第二导电层，其中第二导电层具有至少一个电感器。
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3.发明授权Synthesizer with lock detector, lock algorithm, extended range VCO, and a simplified dual modulus divider 有权具有锁定检测器，锁定算法，扩展范围VCO和简化双模式分频器的合成器公开(公告)号：US06404289B1
公开(公告)日：2002-06-11
申请号：US09747778
申请日：2000-12-22
申请人： David K. Su , Chik Patrick Yue , David J. Weber , Masound Zargari
发明人： David K. Su , Chik Patrick Yue , David J. Weber , Masound Zargari
IPC分类号： H03L7095
CPC分类号： H03L7/099 , H03K23/667 , H03L7/089 , H03L7/095 , H03L7/10 , H03L7/193 , Y10S331/02
摘要： The present invention provides a synthesizer having an efficient lock detect signal generator, an extended range VCO that can operate within any one of a plurality of adjacent characteristic curves defined by a plurality of adjacent regions, and a divide circuit implemented using only a single counter along with a decoder. This allows for a method of operating the synthesizer, methods of establishing or reestablishing a lock condition using the extended range VCO, and a method of designing a plurality of divide circuits which each use the same single counter and each use a different decoder.
摘要翻译： 本发明提供一种合成器，其具有有效的锁定检测信号发生器，能够在由多个相邻区域限定的多个相邻特性曲线中的任何一个中操作的扩展范围VCO，以及仅使用单个计数器实现的除法电路 与解码器。 这允许操作合成器的方法，使用扩展范围VCO建立或重新建立锁定条件的方法，以及设计多个除法电路的方法，每个除法电路使用相同的单个计数器并且每个使用不同的解码器。
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公开(公告)号：US06779261B2
公开(公告)日：2004-08-24
申请号：US10346403
申请日：2003-01-15
申请人： Chik Patrick Yue
发明人： Chik Patrick Yue
IPC分类号： H05K302
CPC分类号： H03F3/45183 , H03F2200/541 , H03H7/42 , Y10T29/4902 , Y10T29/49155
摘要： A method for producing an on-chip signal transforming device. The method includes providing a substrate, and laying a first conductive layer above the substrate, wherein the first conductive layer has a plurality of interleaved inductors. The method then includes laying a second conductive layer above the substrate, wherein the second conductive layer has at least one inductor.
摘要翻译： 一种片上信号变换装置的制造方法。 该方法包括提供衬底以及在衬底上铺设第一导电层，其中第一导电层具有多个交错电感器。 该方法然后包括在衬底上铺设第二导电层，其中第二导电层具有至少一个电感器。
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5.发明授权公开(公告)号：US06509779B2
公开(公告)日：2003-01-21
申请号：US10072191
申请日：2002-02-07
IPC分类号： H03K508
CPC分类号： H01L23/60 , H01L23/645 , H01L24/48 , H01L24/49 , H01L27/0248 , H01L2223/6611 , H01L2224/05554 , H01L2224/48091 , H01L2224/49113 , H01L2924/00014 , H01L2924/01039 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An ESD protection circuit uses an inductor to create an electromagnetic resonance in conjunction with the load capacitance of a conventional ESD device. By properly tuning the resonance of this combination, the protective properties of the ESD device can be maintained while minimizing its capacitive load on the main circuit. The inductor can be interposed in various series configurations with the ESD device between the main circuit and a voltage rail; alternatively, the inductor can be connected in various configurations in parallel with the ESD device. The inductor may be implemented as an on-chip inductor using conventional IC fabrication technologies, or may be implemented using IC chip bonding wires as inductors.
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6.发明授权Synthesizer with lock detector, lock algorithm, extended range VCO, and a simplified dual modulus divider 有权具有锁定检测器，锁定算法，扩展范围VCO和简化双模式分频器的合成器公开(公告)号：US06731176B2
公开(公告)日：2004-05-04
申请号：US10099208
申请日：2002-03-13
申请人： David K. Su , Chik Patrick Yue , David J. Weber , Masound Zargari
发明人： David K. Su , Chik Patrick Yue , David J. Weber , Masound Zargari
IPC分类号： H03L700
CPC分类号： H03L7/099 , H03K23/667 , H03L7/089 , H03L7/095 , H03L7/10 , H03L7/193 , Y10S331/02
摘要： The present invention provides a synthesizer having an efficient lock detect signal generator, an extended range VCO that can operate within any one of a plurality of adjacent characteristic curves defined by a plurality of adjacent regions, and a divide circuit implemented using only a single counter along with a decoder. This allows for a method of operating the synthesizer, methods of establishing or reestablishing a lock condition using the extended range VCO, and a method of designing a plurality of divide circuits which each use the same single counter and each use a different decoder.
摘要翻译： 本发明提供一种合成器，其具有有效的锁定检测信号发生器，能够在由多个相邻区域限定的多个相邻特性曲线中的任何一个中操作的扩展范围VCO，以及仅使用单个计数器实现的除法电路 与解码器。 这允许操作合成器的方法，使用扩展范围VCO建立或重新建立锁定条件的方法，以及设计多个除法电路的方法，每个除法电路使用相同的单个计数器并且每个使用不同的解码器。
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公开(公告)号：US06570453B2
公开(公告)日：2003-05-27
申请号：US10099229
申请日：2002-03-13
申请人： David K. Su , Chik Patrick Yue , David J. Weber , Masound Zargari
发明人： David K. Su , Chik Patrick Yue , David J. Weber , Masound Zargari
IPC分类号： H03L700
CPC分类号： H03L7/099 , H03K23/667 , H03L7/089 , H03L7/095 , H03L7/10 , H03L7/193 , Y10S331/02
摘要： The present invention provides a synthesizer having an efficient lock detect signal generator, an extended range VCO that can operate within any one of a plurality of adjacent characteristic curves defined by a plurality of adjacent regions, and a divide circuit implemented using only a single counter along with a decoder. This allows for a method of operating the synthesizer, methods of establishing or reestablishing a lock condition using the extended range VCO, and a method of designing a plurality of divide circuits which each use the same single counter and each use a different decoder.
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8.发明授权公开(公告)号：US06597227B1
公开(公告)日：2003-07-22
申请号：US09488940
申请日：2000-01-21
IPC分类号： H02H320
CPC分类号： H01L23/60 , H01L23/645 , H01L24/48 , H01L24/49 , H01L27/0248 , H01L2223/6611 , H01L2224/05554 , H01L2224/48091 , H01L2224/49113 , H01L2924/00014 , H01L2924/01039 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An ESD protection circuit uses an inductor to create an electromagnetic resonance in conjunction with the load capacitance of a conventional ESD device. By properly tuning the resonance of this combination, the protective properties of the ESD device can be maintained while minimizing its capacitive load on the main circuit. The inductor can be interposed in various series configurations with the ESD device between the main circuit and a voltage rail; alternatively, the inductor can be connected in various configurations in parallel with the ESD device. The inductor may be implemented as an on-chip inductor using conventional IC fabrication technologies, or may be implemented using IC chip bonding wires as inductors.
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9.发明授权公开(公告)号：US06593794B2
公开(公告)日：2003-07-15
申请号：US10072132
申请日：2002-02-07
IPC分类号： H03K508
CPC分类号： H01L23/60 , H01L23/645 , H01L24/48 , H01L24/49 , H01L27/0248 , H01L2223/6611 , H01L2224/05554 , H01L2224/48091 , H01L2224/49113 , H01L2924/00014 , H01L2924/01039 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An ESD protection circuit uses an inductor to create an electromagnetic resonance in conjunction with the load capacitance of a conventional ESD device. By properly tuning the resonance of this combination, the protective properties of the ESD device can be maintained while minimizing its capacitive load on the main circuit. The inductor can be interposed in various series configurations with the ESD device between the main circuit and a voltage rail; alternatively, the inductor can be connected in various configurations in parallel with the ESD device. The inductor may be implemented as an on-chip inductor using conventional IC fabrication technologies, or may be implemented using IC chip bonding wires as inductors.
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公开(公告)号：US06483188B1
公开(公告)日：2002-11-19
申请号：US09571004
申请日：2000-05-15
申请人： Chik Patrick Yue , Masoud Zargari , David Su
发明人： Chik Patrick Yue , Masoud Zargari , David Su
IPC分类号： H01L27095
CPC分类号： H01L23/66 , H01L23/552 , H01L2223/6688 , H01L2924/0002 , H01L2924/00
摘要： A radio-frequency (RF) integrated circuit is described. In one embodiment, the IC comprises multiple metal layers forming multiple transistors on a non-epitaxial substrate. The transistors are step and mirror symmetric. Also, the RF signal lines are on a top metal layer above all other metal layers and the power and ground planes are on a bottom metal layer below all other metal layers. The top and bottom metal layers are separated by a shield that extends beyond the RF signal lines by a distance that is at least the same distance that the shield is away from the RF lines. Low frequency signals are on signal lines below the top metal layer.
摘要翻译： 描述了射频（RF）集成电路。 在一个实施例中，IC包括在非外延衬底上形成多个晶体管的多个金属层。 晶体管是阶梯式和镜面对称的。 此外，RF信号线位于所有其它金属层上的顶部金属层上，并且电源和接地平面位于所有其它金属层下方的底部金属层上。 顶部和底部金属层被屏蔽层隔开，该屏蔽件延伸超过RF信号线一段至少与屏蔽层远离RF线路的距离至少相等的距离。 低频信号位于顶部金属层下方的信号线上。
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