公开(公告)号：US08664648B2

公开(公告)日：2014-03-04

申请号：US13425284

申请日：2012-03-20

Applicant: Jenn-Chang Hwang ,  Li-Shiuan Tsai ,  Chun-Yi Lee ,  Cheng-Lun Tsai

Inventor： Jenn-Chang Hwang ,  Li-Shiuan Tsai ,  Chun-Yi Lee ,  Cheng-Lun Tsai

IPC: H01L35/24

CPC classification number: H01L51/0055 ,  B82Y10/00 ,  H01L28/40 ,  H01L51/0046 ,  H01L51/0053 ,  H01L51/0093 ,  H01L51/052 ,  H01L51/0545 ,  H01L51/0562

Abstract: An N-type organic thin film transistor, an ambipolar field-effect transistor, and methods of fabricating the same are disclosed. The N-type organic thin film transistor of the present invention comprises: a substrate; a gate electrode locating on the substrate; a gate-insulating layer covering the gate electrode, and the gate-insulating layer is made of silk protein; a buffering layer locating on the gate-insulating layer, and the buffering layer is made of pentacene; an N-type organic semiconductor layer locating on the buffering layer; and a source and a drain electrode, wherein the N-type organic semiconductor layer, the buffering layer, the source and the drain electrode are disposed over the gate dielectric layer.

Abstract translation: 公开了一种N型有机薄膜晶体管，双极场效应晶体管及其制造方法。 本发明的N型有机薄膜晶体管包括：基板; 位于基板上的栅电极; 覆盖栅电极的栅极绝缘层，栅绝缘层由丝蛋白制成; 位于栅极绝缘层上的缓冲层，缓冲层由并五苯制成; 位于缓冲层上的N型有机半导体层; 以及源极和漏极，其中所述N型有机半导体层，所述缓冲层，所述源极和漏极被设置在所述栅极介电层上。

公开(公告)号：US08361866B2

公开(公告)日：2013-01-29

申请号：US13204461

申请日：2011-08-05

Applicant: Chun-Yi Lee ,  Harry Chuang ,  Ping-Wei Wang ,  Kong-Beng Thei

Inventor： Chun-Yi Lee ,  Harry Chuang ,  Ping-Wei Wang ,  Kong-Beng Thei

IPC: H01L21/8234

CPC classification number: H01L27/0883 ,  G11C11/412 ,  H01L27/092 ,  H01L27/105 ,  H01L27/11 ,  H01L27/1104 ,  H01L27/1116 ,  H01L29/1083 ,  H01L29/165 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7848 ,  Y10S438/919

Abstract: A semiconductor structure comprising an SRAM/inverter cell and a method for forming the same are provided, wherein the SRAM/inverter cell has an improved write margin. The SRAM/inverter cell includes a pull-up PMOS device comprising a gate dielectric over the semiconductor substrate, a gate electrode on the gate dielectric wherein the gate electrode comprises a p-type impurity and an n-type impurity, and a stressor formed in a source/drain region. The device drive current of the pull-up PMOS device is reduced due to the counter-doping of the gate electrode.

公开(公告)号：US08203896B2

公开(公告)日：2012-06-19

申请号：US12911173

申请日：2010-10-25

Applicant: Kuen-Long Chang ,  Chun-Hsiung Hung ,  Chuan-Ying Yu ,  Chun-Yi Lee

Inventor： Kuen-Long Chang ,  Chun-Hsiung Hung ,  Chuan-Ying Yu ,  Chun-Yi Lee

IPC: G11C7/00 ,  G11C11/50 ,  G11C7/04

CPC classification number: G11C29/022 ,  G11C29/02

Abstract: A memory chip and method for operating the same are provided. The memory chip includes a number of pads. The method includes inputting a number of first test signals to the pads respectively, wherein the first test signals corresponding to two physically-adjacent pads are complementary; inputting a number of second test signals, respectively successive to the first test signals, to the pads, wherein the first test signal and the second test signal corresponding to each of the pads are complementary; and outputting expected data from the memory chip if the first test signals and the second test signals are successfully received by the memory chip.

Abstract translation: 提供了一种存储芯片及其操作方法。 存储器芯片包括多个焊盘。 该方法包括分别将多个第一测试信号输入到焊盘，其中对应于两个物理相邻的焊盘的第一测试信号是互补的; 将多个分别连续到第一测试信号的第二测试信号输入到焊盘，其中对应于每个焊盘的第一测试信号和第二测试信号是互补的; 以及如果所述第一测试信号和所述第二测试信号被所述存储芯片成功接收，则从所述存储器芯片输出预期数据。

公开(公告)号：US20120073630A1

公开(公告)日：2012-03-29

申请号：US12891955

申请日：2010-09-28

Applicant: Woei-Yuan WU ,  Chun-Yi Lee

Inventor： Woei-Yuan WU ,  Chun-Yi Lee

IPC: H01L31/048

CPC classification number: H02S30/10 ,  F24S25/20

Abstract: A rectangular protective frame for a solar cell module is disclosed. The rectangular protective frame for a solar cell module includes: four bar elements, each including: a supporting portion, having an L-shape cross-section, encompassing edges of the solar cell module for supporting the solar cell module; and a body portion, having a rectangular cross-section with a long side connected to the supporting portion for increasing strength of the supporting portion. The rectangular protective frame also includes at least one carrying mechanism, connected to a short side of the body portion of at least one of the four bar elements, having an L-shape cross-section, for preventing fingers from slipping off while carrying the rectangular protective frame.

Abstract translation: 公开了一种用于太阳能电池模块的矩形保护框架。 太阳能电池模块的矩形保护框架包括：四个杆元件，每个包括：具有L形横截面的支撑部分，用于支撑太阳能电池模块的太阳能电池模块的边缘; 以及主体部分，具有矩形横截面，其长边连接到支撑部分，用于增加支撑部分的强度。 矩形保护框架还包括至少一个承载机构，其连接到四个杆元件中的至少一个的主体部分的短边，具有L形横截面，用于防止手指在携带矩形时防止滑落 防护框架

公开(公告)号：US20090175109A1

公开(公告)日：2009-07-09

申请号：US11970545

申请日：2008-01-08

Applicant: Yung-Feng Lin ,  Chun-Yi Lee

Inventor： Yung-Feng Lin ,  Chun-Yi Lee

IPC: G11C7/08

CPC classification number: G11C7/062 ,  G11C7/067 ,  G11C7/08 ,  G11C16/28 ,  G11C2207/063

Abstract: A current-mode sense amplifier comprises a first current mirror, a second current mirror and an amplifying circuit. The first current mirror outputs a cell current to a memory cell and duplicates the cell current to generate a mirrored cell current. The second current mirror outputs a reference current to the reference cell and duplicates the reference current to generate a mirrored reference current. The amplifying circuit comprises a first switch, second switch, third switch and fourth switch. The first switch has first and second terminals for respectively receiving the mirrored cell and reference currents. The second and third switches have first terminals respectively coupled to the first and second terminals of the first switch, and control terminals respectively coupled to the second and first terminals of the first switch. The fourth switch is connected to second terminals of the second and third switches.

Abstract translation: 电流模式读出放大器包括第一电流镜，第二电流镜和放大电路。 第一电流镜将单元电流输出到存储单元并复制单元电流以产生镜像单元电流。 第二电流镜将参考电流输出到参考单元并复制参考电流以产生镜像参考电流。 放大电路包括第一开关，第二开关，第三开关和第四开关。 第一开关具有用于分别接收镜像单元和参考电流的第一和第二端子。 第二和第三开关具有分别耦合到第一开关的第一和第二端子的第一端子和分别耦合到第一开关的第二端子和第一端子的控制端子。 第四开关连接到第二和第三开关的第二端子。

公开(公告)号：US20090089526A1

公开(公告)日：2009-04-02

申请号：US11863254

申请日：2007-09-28

Applicant: YU-LAN KUO ,  CHUN-YI LEE ,  KUEN-LONG CHANG ,  CHUN-HSIUNG HUNG

Inventor： YU-LAN KUO ,  CHUN-YI LEE ,  KUEN-LONG CHANG ,  CHUN-HSIUNG HUNG

IPC: G06F13/00

CPC classification number: G11C8/20 ,  G06F21/79 ,  G11C16/22

Abstract: A memory device comprises a memory array, a status register coupled with the memory array, and a security register coupled with the memory array and the status register. The memory array contains a number of memory blocks configured to have independent access control. The status register includes at least one protection bit indicative of a write-protection status of at least one corresponding block of the memory blocks that corresponds to the protection bit. The security register includes at least one register-protection bit. The register-protection bit is programmable to a memory-protection state for preventing a state change of at least the protection bit of the status register. The register-protection bit is configured to remain in the memory-protection state until the resetting of the memory device.

Abstract translation: 存储器件包括存储器阵列，与存储器阵列耦合的状态寄存器，以及与存储器阵列和状态寄存器耦合的安全寄存器。 存储器阵列包含被配置为具有独立访问控制的多个存储器块。 状态寄存器包括至少一个保护位，指示对应于保护位的存储器块的至少一个相应块的写保护状态。 安全寄存器包括至少一个寄存器保护位。 寄存器保护位可编程为存储器保护状态，以防止至少状态寄存器的保护位的状态改变。 寄存器保护位被配置为保持存储器保护状态，直到存储器件的复位。

公开(公告)号：US20070126060A1

公开(公告)日：2007-06-07

申请号：US11293340

申请日：2005-12-02

Applicant: Chun-Yi Lee ,  Huai-Ying Huang ,  Chii-Ming Wu

Inventor： Chun-Yi Lee ,  Huai-Ying Huang ,  Chii-Ming Wu

IPC: H01L27/12

CPC classification number: H01L27/1104 ,  H01L21/7624 ,  H01L21/84 ,  H01L27/11 ,  H01L27/1203 ,  Y10S257/903

Abstract: A 6T SRAM cell includes a first inverter having a first pull-up transistor and a first pull-down transistor serially coupled between a supply source and a complementary supply source, and a second inverter cross-coupled with the first inverter having a second pull-up transistor and a second pull-down transistor serially coupled between the supply source and the complementary supply source. The cell further includes a first pass-gate and second pass-gate transistors coupled to the first and second inverters, respectively. The first pass-gate transistor and the first pull-up transistor are respectively constructed on a first P-type well and a first N-type well adjacent to one another, which are overlaid by a first doped region and a second doped region of substantially the same width in alignment with one another, respectively.

Abstract translation: 6T SRAM单元包括具有第一上拉晶体管和串联耦合在电源和互补电源之间的第一下拉晶体管的第一反相器，与第一反相器交叉耦合的第二反相器具有第二上拉电阻， 串联耦合在电源和互补电源之间的第二下拉晶体管。 该单元还包括分​​别耦合到第一和第二反相器的第一通过栅极和第二通过栅极晶体管。 第一栅极晶体管和第一上拉晶体管分别构造在彼此相邻的第一P型阱和第一N型阱上，第一P型阱和第一N型阱被第一掺杂区域和基本上 相同的宽度分别对准。

公开(公告)号：US20070016361A1

公开(公告)日：2007-01-18

申请号：US11457466

申请日：2006-07-14

Applicant: Chun-Yi Lee ,  Huey-Ping Cheng

Inventor： Chun-Yi Lee ,  Huey-Ping Cheng

IPC: G01C21/00

CPC classification number: G01C21/32

Abstract: A method for auto updating application program suitable for a global position system (GPS) navigator is provided. The method comprises the following steps. First, a map-update short message is sent to the GPS navigator at a client terminal from a wireless station. Then, a map-downloading program inside the GPS navigator is woken up when the GPS navigator receives the map-update short message. Then, connecting to a map server through the map-update short message when a user decides to update the map. Accordingly, a newest electronic map can be downloaded from the wireless station.

Abstract translation: 提供了一种用于自动更新适用于全球定位系统（GPS）导航器的应用程序的方法。 该方法包括以下步骤。 首先，从无线站在客户终端向GPS导航器发送地图更新短消息。 然后，当GPS导航器接收到地图更新短消息时，GPS导航器内的地图下载程序被唤醒。 然后，当用户决定更新地图时，通过map-update短消息连接到地图服务器。 因此，可以从无线站下载最新的电子地图。

公开(公告)号：US20060179295A1

公开(公告)日：2006-08-10

申请号：US11054983

申请日：2005-02-09

Applicant: Ying-Chih Lu ,  Meng-Hua Cheng ,  Chun-Yi Lee ,  Chun-Lung Wu ,  Chi-Tsung Chang ,  Chia-Hsing Lee

Inventor： Ying-Chih Lu ,  Meng-Hua Cheng ,  Chun-Yi Lee ,  Chun-Lung Wu ,  Chi-Tsung Chang ,  Chia-Hsing Lee

IPC: G06F9/24

CPC classification number: G06F9/441

Abstract: A multiple system image options selective booting method and interface is proposed, which is designed for use in conjunction with a computer platform for the user to select a desired system image from multiple available options contained in a system image source (such as a CD-ROM module) for booting up the computer platform with the user-selected system image. This feature allows the user to more conveniently select a desired system image from a collection of system image options for booting up a computer platform.

Abstract translation: 提出了一种多系统图像选择选择性引导方法和接口，其被设计为与计算机平台结合使用，以便用户从包含在系统图像源（例如CD-ROM）中的多个可用选项中选择期望的系统图像 模块），用于通过用户选择的系统映像启动计算机平台。 该功能允许用户从用于引导计算机平台的系统图像选项的集合中更方便地选择期望的系统图像。

公开(公告)号：US20050016467A1

公开(公告)日：2005-01-27

申请号：US10626998

申请日：2003-07-24

Applicant: Yi-Li Hsiao ,  Mei-Sheng Zhou ,  Chin-Hsin Peng ,  Chien-Ling Huang ,  Tse-Yi Chen ,  Chun-Yi Lee ,  Hsueh-Chang Wu

Inventor： Yi-Li Hsiao ,  Mei-Sheng Zhou ,  Chin-Hsin Peng ,  Chien-Ling Huang ,  Tse-Yi Chen ,  Chun-Yi Lee ,  Hsueh-Chang Wu

IPC: C23C16/00 ,  H01L21/00

CPC classification number: H01L21/67248 ,  H01J2237/2001 ,  H01L21/67109

Abstract: A system and method which is capable of compensating for unintended elevations in process temperatures induced in a substrate during a semiconductor fabrication process in order to reduce or eliminate disparities in critical dimensions of device features. The system may be a plasma etching system comprising a process chamber containing an electrostatic chuck (ESC) for supporting a wafer substrate. A chiller outside the process chamber includes a main coolant chamber, which contains a main coolant fluid, as well as an compensation coolant chamber, which contains an compensation coolant fluid. A main circulation loop normally circulates the main coolant fluid from the main coolant chamber through the electrostatic chuck to maintain the chuck at a desired set point temperature.

Abstract translation: 一种系统和方法，其能够在半导体制造过程期间补偿在衬底中感应的工艺温度中的意外高度，以便减少或消除器件特征的关键尺寸的不均匀性。 该系统可以是包括含有用于支撑晶片衬底的静电吸盘（ESC）的处理室的等离子体蚀刻系统。 处理室外部的冷却器包括主冷却剂室，其包含主冷却剂流体，以及补偿冷却剂室，其包含补偿冷却剂流体。 主循环回路通常使主冷却剂流体从主冷却剂室通过静电吸盘循环，以将卡盘保持在所需的设定点温度。