公开(公告)号：US5998298A

公开(公告)日：1999-12-07

申请号：US67614

申请日：1998-04-28

申请人： James G. Fleming ,  Shawn-Yu Lin ,  Dale L. Hetherington ,  Bradley K. Smith

发明人： James G. Fleming ,  Shawn-Yu Lin ,  Dale L. Hetherington ,  Bradley K. Smith

IPC分类号： G02B6/12 ,  G02B6/122 ,  G02B6/132 ,  H01L33/00

CPC分类号： G02B6/1225 ,  B82Y20/00 ,  G02B6/132 ,  G02B2006/12176

摘要： A method is disclosed for fabricating a two- or three-dimensional photonic bandgap structure (also termed a photonic crystal, photonic lattice, or photonic dielectric structure). The method uses microelectronic integrated circuit (IC) processes to fabricate the photonic bandgap structure directly upon a silicon substrate. One or more layers of arrayed elements used to form the structure are deposited and patterned, with chemical-mechanical polishing being used to planarize each layer for uniformity and a precise vertical tolerancing of the layer. The use of chemical-mechanical planarization allows the photonic bandgap structure to be formed over a large area with a layer uniformity of about two-percent. Air-gap photonic bandgap structures can also be formed by removing a spacer material separating the arrayed elements by selective etching. The method is useful for fabricating photonic bandgap structures including Fabry-Perot resonators and optical filters for use at wavelengths in the range of about 0.2-20 .mu.m.

摘要翻译： 公开了一种用于制造二维或三维光子带隙结构（也称为光子晶体，光子晶格或光子介质结构）的方法。 该方法使用微电子集成电路（IC）工艺在硅衬底上直接制造光子带隙结构。 用于形成结构的一层或多层阵列元件被沉积和图案化，其中使用化学机械抛光来平整每层以获得均匀性和层的精确垂直公差。 使用化学机械平面化可以使光子带隙结构形成在大面积上，层间均匀度约为2％。 气隙光子带隙结构也可以通过去除通过选择性蚀刻分离排列元件的间隔物材料来形成。 该方法可用于制造光子带隙结构，包括法布里 - 珀罗谐振器和用于波长在0.2-20μm范围内的滤光器。

公开(公告)号：US07004198B1

公开(公告)日：2006-02-28

申请号：US10894636

申请日：2004-07-20

申请人： Murat Okandan ,  Paul C. Galambos ,  Gilbert L. Benavides ,  Dale L. Hetherington

发明人： Murat Okandan ,  Paul C. Galambos ,  Gilbert L. Benavides ,  Dale L. Hetherington

IPC分类号： F16K37/00

CPC分类号： B01L3/565 ,  B01J2219/00783 ,  B01J2219/0081 ,  B01J2219/00828 ,  B01L3/5027 ,  B01L9/527 ,  B01L2200/027 ,  B01L2300/0816 ,  Y10T137/2191 ,  Y10T137/2224 ,  Y10T137/8242

摘要： An apparatus for simultaneously aligning and interconnecting microfluidic ports is presented. Such interconnections are required to utilize microfluidic devices fabricated in Micro-Electromechanical-Systems (MEMS) technologies, that have multiple fluidic access ports (e.g. 100 micron diameter) within a small footprint, (e.g. 3 mm×6 mm). Fanout of the small ports of a microfluidic device to a larger diameter (e.g. 500 microns) facilitates packaging and interconnection of the microfluidic device to printed wiring boards, electronics packages, fluidic manifolds etc.

摘要翻译： 提出了一种用于同时对准和互连微流体端口的装置。 需要这种互连来利用在微机电系统（MEMS）技术中制造的微流体装置，其在小占地面积内（例如3mm×6mm）具有多个流体通路口（例如100微米直径）。 微流体装置的小端口到较大直径（例如500微米）的扇出促进微流体装置与印刷线路板，电子封装，流体歧管等的封装和互连。

公开(公告)号：US06808952B1

公开(公告)日：2004-10-26

申请号：US10236631

申请日：2002-09-05

申请人： Jeffry J. Sniegowski ,  Thomas W. Krygowski ,  Seethambal S. Mani ,  Scott D. Habermehl ,  Dale L. Hetherington ,  James E. Stevens ,  Paul J. Resnick ,  Steven R. Volk

发明人： Jeffry J. Sniegowski ,  Thomas W. Krygowski ,  Seethambal S. Mani ,  Scott D. Habermehl ,  Dale L. Hetherington ,  James E. Stevens ,  Paul J. Resnick ,  Steven R. Volk

IPC分类号： H01L2100

CPC分类号： B81C1/00666 ,  B81C2201/0167

摘要： A process is disclosed for forming a microelectromechanical (MEM) structure on a substrate having from 5 to 6 or more layers of deposited and patterned polysilicon. The process is based on determining a radius of curvature of the substrate which is bowed due to accumulated stress in the layers of polysilicon and a sacrificial material used to buildup the MEM structure, and then providing one or more stress-compensation layers on a backside of the substrate to flatten the substrate and allow further processing.

摘要翻译： 公开了一种用于在具有5至6层或更多层沉积和图案化多晶硅的衬底上形成微机电（MEM）结构的方法。 该过程基于确定由于多晶硅层中的累积应力而被弯曲的衬底的曲率半径以及用于构建MEM结构的牺牲材料，然后在背面设置一个或多个应力补偿层 使基板平坦化并允许进一步处理。

公开(公告)号：US5919548A

公开(公告)日：1999-07-06

申请号：US915071

申请日：1997-08-20

申请人： Carole C. Barron ,  Dale L. Hetherington ,  Stephen Montague

发明人： Carole C. Barron ,  Dale L. Hetherington ,  Stephen Montague

IPC分类号： B32B3/04 ,  H01L21/00

CPC分类号： B81C1/00611 ,  B81C2201/0125 ,  Y10T428/24331

摘要： A method is disclosed for micromachining recessed layers (e.g. sacrificial layers) of a microelectromechanical system (MEMS) device formed in a cavity etched into a semiconductor substrate. The method uses chemical-mechanical polishing (CMP) with a resilient polishing pad to locally planarize one or more of the recessed layers within the substrate cavity. Such local planarization using the method of the present invention is advantageous for improving the patterning of subsequently deposited layers, for eliminating mechanical interferences between functional elements (e.g. linkages) of the MEMS device, and for eliminating the formation of stringers. After the local planarization of one or more of the recessed layers, another CMP step can be provided for globally planarizing the semiconductor substrate to form a recessed MEMS device which can be integrated with electronic circuitry (e.g. CMOS, BiCMOS or bipolar circuitry) formed on the surface of the substrate.

摘要翻译： 公开了一种用于微加工在蚀刻到半导体衬底中的腔体中形成的微机电系统（MEMS）器件的凹陷层（例如，牺牲层）的方法。 该方法使用具有弹性抛光垫的化学机械抛光（CMP）来在衬底腔内局部平坦化一个或多个凹陷层。 使用本发明的方法的这种局部平面化有利于改进随后沉积的层的图案化，以消除MEMS器件的功能元件（例如，连接）之间的机械干扰，并且用于消除桁条的形成。 在一个或多个凹陷层的局部平坦化之后，可以提供另一个CMP步骤用于全面平坦化半导体衬底以形成凹陷的MEMS器件，该MEMS器件可与形成在其上的凹陷的MEMS器件集成在电子电路（例如，CMOS，BiCMOS或双极电路） 基板的表面。

公开(公告)号：US5804084A

公开(公告)日：1998-09-08

申请号：US729122

申请日：1996-10-11

申请人： Robert D. Nasby ,  Dale L. Hetherington ,  Jeffry J. Sniegowski ,  Paul J. McWhorter ,  Christopher A. Apblett

发明人： Robert D. Nasby ,  Dale L. Hetherington ,  Jeffry J. Sniegowski ,  Paul J. McWhorter ,  Christopher A. Apblett

IPC分类号： B32B3/04 ,  H01L21/00

CPC分类号： B81C1/00611 ,  B81C2201/0125

摘要： A process for removing topography effects during fabrication of micromachines. A sacrificial oxide layer is deposited over a level containing functional elements with etched valleys between the elements such that the sacrificial layer has sufficient thickness to fill the valleys and extend in thickness upwards to the extent that the lowest point on the upper surface of the oxide layer is at least as high as the top surface of the functional elements in the covered level. The sacrificial oxide layer is then polished down and planarized by chemical-mechanical polishing. Another layer of functional elements is then formed upon this new planarized surface.

摘要翻译： 一种在微机械制造过程中消除地形影响的过程。 牺牲氧化物层沉积在含有在元件之间具有蚀刻谷的功能元件的层上，使得牺牲层具有足够的厚度以填充谷并且向上延伸到氧化物层的上表面上的最低点 至少与被覆盖层中的功能元件的顶表面一样高。 然后将牺牲氧化物层抛光并通过化学机械抛光进行平面化。 然后在这个新的平坦化表面上形成另一层功能元件。