公开(公告)号：US07223697B2

公开(公告)日：2007-05-29

申请号：US10710604

申请日：2004-07-23

申请人： Garth A. Brooks ,  Bruce W. Porth ,  Steven M. Shank ,  Eric J. White

发明人： Garth A. Brooks ,  Bruce W. Porth ,  Steven M. Shank ,  Eric J. White

IPC分类号： H01L21/302

CPC分类号： H01L27/10867 ,  H01L21/3212

摘要： A method of forming a structure, an array of structures and a memory cell, the method of fabricating a structure, including: (a) forming a trench in a substrate; (b) depositing a first layer of polysilicon on a surface of the substrate, the first layer of polysilicon filling the trench; (c) chemical-mechanical-polishing the first layer of polysilicon at a first temperature to expose the surface of the substrate; (d) removing an upper portion of the first polysilicon from the trench; (e) depositing a second layer of polysilicon on the surface of the substrate, the second layer of polysilicon filling the trench; and (f) chemical-mechanical-polishing the second layer of polysilicon at a second temperature to expose the surface of the substrate, the second temperature different from the first temperature.

摘要翻译： 一种形成结构，结构阵列和存储单元的方法，制造结构的方法，包括：（a）在衬底中形成沟槽; （b）在所述衬底的表面上沉积第一层多晶硅，所述第一层多晶硅填充所述沟槽; （c）在第一温度下化学机械抛光所述第一层多晶硅以暴露​​所述衬底的表面; （d）从沟槽去除第一多晶硅的上部; （e）在所述衬底的表面上沉积第二层多晶硅，所述第二层多晶硅填充所述沟槽; 和（f）在第二温度下对所述第二层多晶硅进行化学机械抛光以暴露所述衬底的表面，所述第二温度不同于所述第一温度。

公开(公告)号：US4470874A

公开(公告)日：1984-09-11

申请号：US561778

申请日：1983-12-15

申请人： Thomas A. Bartush ,  Garth A. Brooks ,  James R. Kitcher

发明人： Thomas A. Bartush ,  Garth A. Brooks ,  James R. Kitcher

IPC分类号： H01L21/3205 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768 ,  B44C1/22 ,  C03C15/00 ,  C03C25/06 ,  C23F1/02

CPC分类号： H01L21/32131 ,  H01L21/31055 ,  H01L21/31116 ,  H01L21/76819 ,  H01L21/76885

摘要： The planarization of structures having vertical interconnection studs embedded in an insulator layer utilizing a resist layer with dry etching in a CF.sub.4 ambient for equal etching of resist and the insulation to planarize the insulation, followed by dry etching in essentially a noble gas (argon) ambient for equal etching of the insulator layer and stud metal to desired planarization.

摘要翻译： 使用在CF4环境中具有干蚀刻的抗蚀剂层嵌入在绝缘体层中的垂直互连螺柱的结构的平面化，用于等同蚀刻抗蚀剂，并且绝缘体使绝缘体平坦化，然后在基本上惰性气体（氩）环境中进行干法蚀刻 用于将绝缘体层和螺柱金属相等蚀刻成所需的平坦化。

公开(公告)号：US4867838A

公开(公告)日：1989-09-19

申请号：US258367

申请日：1988-10-17

申请人： Garth A. Brooks ,  Nancy A. Greco

发明人： Garth A. Brooks ,  Nancy A. Greco

IPC分类号： G03F7/16 ,  H01L21/3105 ,  H01L21/312 ,  H01L21/768

CPC分类号： H01L21/76819 ,  G03F7/162 ,  H01L21/31051 ,  H01L21/3121

摘要： Disclosed is a process for forming a planarized multilevel ship wiring structure. Starting from a substrate having thereon at least a metal stud serving as vertical wiring between two levels of metallization, a quartz layer is deposited, obtaining a non-planar structure. A thick planarizing photoactive photoresist is applied. The photoresist is converted by silylation process into a silicate having substantially the same etch rate as that of quartz. Silylation is accomplished by, for example, subjecting to resist to a bath of hexamethyldisilazane, hexamethylcyclotrisilazane, octamethylcyclotetrasilazane, N,N,dimethylaminotrimethylsilane or N,N,diethylaminotrimethylsilane, for a period of time determined by the thickness of the resist. Unwanted portions of the silylated resist and quartz are etched back at 1:1 etch rate ratio to the level of the stud.

摘要翻译： 公开了一种形成平面化多层船舶布线结构的方法。 从其上具有至少一个用作两层金属化之间的垂直布线的金属螺柱的基板开始，沉积石英层，获得非平面结构。 应用厚平坦化的光致抗蚀剂。 光致抗蚀剂通过甲硅烷化方法转化为具有与石英基本相同的蚀刻速率的硅酸盐。 甲硅烷基化通过例如耐受由六甲基二硅氮烷，六甲基环三硅氮烷，八甲基环四硅氮烷，N，N，二甲基氨基三甲基硅烷或N，N，二乙基氨基三甲基硅烷的浴保护一段时间，由抗蚀剂的厚度确定。 甲硅烷基化抗蚀剂和石英的不需要的部分以1:1的蚀刻速率比回蚀刻到螺柱的水平。

公开(公告)号：US4816112A

公开(公告)日：1989-03-28

申请号：US923779

申请日：1986-10-27

申请人： Garth A. Brooks ,  Nancy A. Greco

发明人： Garth A. Brooks ,  Nancy A. Greco

IPC分类号： H01L21/302 ,  G03F7/16 ,  H01L21/3065 ,  H01L21/3105 ,  H01L21/312 ,  H01L21/3205 ,  H01L21/768 ,  B44C1/22 ,  C03C15/00 ,  C03C25/06 ,  B29C37/00

CPC分类号： G03F7/162 ,  H01L21/31051 ,  H01L21/3121 ,  H01L21/76819

摘要： Disclosed is a process for forming a planarized multilevel ship wiring structure. Starting from a substrate having thereon at least a metal stud serving as vertical wiring between two levels of metallization, a quartz layer is deposited, obtaining a non-planar structure. A thick planarizing photoactive photoresist is applied. The photoresist is converted by silylation process into a silicate having substantially the same etch rate as that of quartz. Silylation is accomplished by, for example, subjecting the resist to a bath of hexamethyldisilazane, hexamethylcyclotrisilazene, octamethylcyclotetrasilazane, N,N,dimethylaminotrimethylsilane or N,N,diethylaminotrimethylsilane, for a period of time determined by the thickness of the resist. Unwanted portions of the silylated resist and quartz are etched back at 1:1 etch rate ratio to the level of the stud.

摘要翻译： 公开了一种形成平面化多层船舶布线结构的方法。 从其上具有至少一个用作两层金属化之间的垂直布线的金属螺柱的基板开始，沉积石英层，获得非平面结构。 应用厚平坦化的光致抗蚀剂。 光致抗蚀剂通过甲硅烷化方法转化为具有与石英基本相同的蚀刻速率的硅酸盐。 通过例如使抗蚀剂经受由抗蚀剂的厚度确定的时间，使抗蚀剂经受六甲基二硅氮烷，六甲基环三硅氮烷，八甲基环四硅氮烷，N，N，二甲基氨基三甲基硅烷或N，N，二乙基氨基三甲基硅烷的浴的洗涤来实现。 甲硅烷基化抗蚀剂和石英的不需要的部分以1:1的蚀刻速率比回蚀刻到螺柱的水平。