摘要:
Disclosed are an auto focus (AF) module and a photographing apparatus employing the same. The AF module may include an AF sensor having a plurality of AF pixels and a controller. The controller receives an information regarding the amount of light respectively received by the light receiving elements of one or more of the plurality of AF pixels from the one or more of the plurality of AF pixels. The controller of the AF sensor may be configured to control the operations, e.g., the light exposure timing, of the plurality of AF pixels based on the information received from the AF pixels.
摘要:
A complementary metal oxide semiconductor (CMOS) image sensor includes a photodiode, a switch and a comparator. The switch transfers a sensing signal to a sensing node from the photodiode. The comparator, which is directly connected to the sensing node, compares the sensing signal of the sensing node with a reference signal. The comparator outputs a signal corresponding to a voltage difference between the sensing signal and the reference signal.
摘要:
A CMOS image sensor includes a photodiode, a switch configured to transfer a signal sensed by the photodiode to a sensing node, and a comparator electrically and directly connected to the sensing node and configured to compare the sensed signal of the sensing node and a ramp signal. Reset offset of the comparator is maintained at a constant offset voltage level during an initialization mode.
摘要:
A method for operating an image capture device having a sensor with an array of first and second pixels includes capturing an image a plurality of times with the second pixels to produce a corresponding second image signal, the second pixels being white pixels, capturing the image a single time with the first pixels to produce a corresponding first image signal, inputting selecting signals to the sensor via a row driver to obtain the first and second image signals from the first and second pixels, respectively, and converting the first and second image signals to respective digital values via an analog-to-digital converter.
摘要:
A time-interleaved bandpass delta-sigma modulator is developed which includes a first adder and a second adder and a comparator. An input signal is transmitted to the first adder according to the clock frequency of each channel block, and an n channel block output un of the first adder is transmitted to the first adder and the second adder of an n+2 channel block, and an n block output vn of the second adder is transmitted to the second adder of an n+2 block, and an output yn that passes through an n block comparator is transmitted to the first adder and the second adder of an n+2 block. Therefore, a modulator sequentially receives output from the comparator of each block for generating the final output y.
摘要翻译:开发了一种时间交织的带通Δ-Σ调制器,其包括第一加法器和第二加法器以及比较器。 根据每个通道块的时钟频率将输入信号发送到第一加法器,并且第一加法器的n个通道块输出u N n被发送到第一加法器,第二加法器 n + 2个通道块和第n个加法器的n个块输出端子n n n被发送到n + 2个块的第二加法器,并且输出y n n 通过n块比较器被传送到第n + 2块的第一加法器和第二加法器。 因此,调制器顺序地从每个块的比较器接收用于产生最终输出y的输出。
摘要:
A time-interleaved bandpass delta-sigma modulator is developed which includes a first adder and a second adder and a comparator. An input signal is transmitted to the first adder according to the clock frequency of each channel block, and an n channel block output un of the first adder is transmitted to the first adder and the second adder of an n+2 channel block, and an n block output vn of the second adder is transmitted to the second adder of an n+2 block, and an output yn that passes through an n block comparator is transmitted to the first adder and the second adder of an n+2 block. Therefore, a modulator sequentially receives output from the comparator of each block for generating the final output y.
摘要翻译:开发了一种时间交织的带通Δ-Σ调制器,其包括第一加法器和第二加法器以及比较器。 根据每个通道块的时钟频率将输入信号发送到第一加法器,并且第一加法器的n个通道块输出u N n被发送到第一加法器,第二加法器 n + 2个通道块和第n个加法器的n个块输出端子n n n被发送到n + 2个块的第二加法器,并且输出y n n 通过n块比较器被传送到第n + 2块的第一加法器和第二加法器。 因此,调制器顺序地从每个块的比较器接收用于产生最终输出y的输出。
摘要:
An image sensor includes a delta-sigma analog-to-digital converter (ADC) including a delta-sigma modulator (DSM) and a voltage adjusting circuit. The DSM is configured to perform delta-sigma modulation on an analog signal from a unit pixel. The delta-sigma ADC is configured to convert the analog signal to a digital signal. The voltage adjusting circuit includes a replica inverter having a same configuration as at least one inverter included in the DSM. The voltage adjusting circuit is configured to adjust a power supply voltage and an input voltage provided to the at least one inverter based on a current flowing in the replica inverter.
摘要:
A ratio-independent switched capacitor amplifier includes a first sampling circuit configured to sample a first input voltage as a first sampling voltage and to double a level of the first sampling voltage during an interval in which the first input voltage is cut off; a second sampling circuit configured to sample a second input voltage as a second sampling voltage and to double a level of the second sampling voltage during an interval in which the second input voltage is cut off; and a differential amplifier circuit configured to output a difference between the first sampling voltage and the second sampling voltage.
摘要:
An analog-to-digital converter (ADC) includes first and second circuits, a differential amplifier, a comparator and a digital-to-analog converter (DAC). The first circuit samples a reset voltage, amplifies the sampled reset voltage, and subtracts a first reference voltage from the amplified reset voltage to produce a first difference. The second circuit samples a signal voltage, amplifies the sampled signal voltage, and subtracts a second reference voltage from the amplified signal voltage to produce a second difference. The differential amplifier produces a third difference based a comparison of the first and second differences from the first and second circuits. The comparator compares an output of the differential amplifier with at least one predetermined comparison voltage and outputs a comparison result as a digital value. The DAC is connected to the first and second circuits and the comparator, and controls the first and second reference voltages in response to the digital value.
摘要:
Provided is a pixel circuit in a CMOS image sensor, a structure thereof, and a method of operating the same. The pixel includes: a photodiode; a floating diffusion node connected to the photodiode through a first switch; a source follower responsive to a voltage of the floating diffusion node. The voltage of the floating diffusion node is applied to the source follower through capacitance coupling.