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    Rescaling
    2.
    发明申请
    Rescaling 有权
    重新调整

    公开(公告)号：US20130097575A1

    公开(公告)日：2013-04-18

    申请号：US13806767

    申请日：2011-04-06

    申请人： Scott J. Weber ,  Christopher D. Ebeling ,  Andrew Caldwell ,  Steven Teig ,  Timothy J. Callahan ,  Hung Q. Nguyen ,  Shangzhi Sun ,  Shilpa V. Yeole

    发明人： Scott J. Weber ,  Christopher D. Ebeling ,  Andrew Caldwell ,  Steven Teig ,  Timothy J. Callahan ,  Hung Q. Nguyen ,  Shangzhi Sun ,  Shilpa V. Yeole

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5077 ,  G06F17/5045 ,  G06F17/505 ,  G06F17/5054

    摘要： A novel method for designing an integrated circuit (“IC”) by rescaling an original set of circuits in a design of the IC is disclosed. The original set of circuits to be rescaled includes sequential nodes, combinational nodes, and interconnects. Each sequential node is associated with a phase of a clock. The method generates a rescaled set of circuits that includes multiple replica sets of the circuits. Each replica set of circuits includes sequential nodes, combinational nodes, and interconnects that are identical to nodes and interconnects in the original set of circuits. Each sequential node is associated with a phase of a clock that is at a fraction of the phase of its corresponding sequential element in the original set. The method connects nodes in each replica set of circuits to a logically equivalent node in another replica set. The method replaces the original set of circuits with the rescaled set of circuits.

    摘要翻译： 公开了一种通过在IC的设计中重新缩放原始电路组来设计集成电路（“IC”）的新颖方法。 要重新定标的原始电路组包括顺序节点，组合节点和互连。 每个顺序节点与时钟的相位相关联。 该方法产生包括电路的多个复制集合的重新定标的电路集合。 每个电路副本集包括与原始电路组中的节点和互连相同的顺序节点，组合节点和互连。 每个顺序节点与时钟的相位相关联，时钟的相位是原始集合中其对应的顺序元素的相位的一小部分。 该方法将每个电路副本中的节点连接到另一个副本集中的逻辑等效节点。 该方法用重新定标的电路组替换原始电路组。

    Fast Voltage Regulators For Charge Pumps
    5.
    发明申请
    Fast Voltage Regulators For Charge Pumps 有权
    用于充电泵的快速稳压器

    公开(公告)号：US20110121799A1

    公开(公告)日：2011-05-26

    申请号：US12987906

    申请日：2011-01-10

    申请人： Hieu Van Tran ,  Sang Thanh Nguyen ,  Anh Ly ,  Hung Q. Nguyen ,  Wingfu Aaron Lau ,  Nasrin Jaffari ,  Thuan Trong Vu ,  Vishal Sarin ,  Loc B. Hoang

    发明人： Hieu Van Tran ,  Sang Thanh Nguyen ,  Anh Ly ,  Hung Q. Nguyen ,  Wingfu Aaron Lau ,  Nasrin Jaffari ,  Thuan Trong Vu ,  Vishal Sarin ,  Loc B. Hoang

    IPC分类号： G05F1/46 ,  G05F3/16 ,  G05F3/08

    CPC分类号： H02M3/07 ,  G11C5/145 ,  H02M1/36 ,  H02M1/44 ,  Y10T307/50

    摘要： A digital multilevel memory system includes a charge pump and a voltage regulator for generating regulated high voltages for various memory operations. The charge pump may include a plurality of boost circuits to boost the output of the charge pump during a fast start up. Afterwards, the boost circuits are disabled to allow the charge pump to generate high voltages without boosting. The boost circuits may be successively enabled to boost the voltage. The boost circuits may be loadless. The voltage regulator may operate in an open loop and may include a resistive divider as a reference voltage for regulating the high voltage from the charge pump. The charge pump may include spread spectrum pump clocking to reduce electromagnetic inference for capacitor or inductor on-chip charge pumping.

    摘要翻译： 数字多电平存储器系统包括电荷泵和用于产生用于各种存储器操作的调节高电压的电压调节器。 电荷泵可以包括多个升压电路，以在快速启动期间升高电荷泵的输出。 之后，升压电路被禁止，使电荷泵产生高电压而不加速。 升压电路可以被连续地使能以升高电压。 升压电路可以是无负载的。 电压调节器可以在开环中工作，并且可以包括电阻分压器作为用于调节来自电荷泵的高电压的参考电压。 电荷泵可以包括扩频泵时钟，以减少用于电容器或电感器片上电荷泵浦的电磁推理。

    SUB VOLT FLASH MEMORY SYSTEM
    9.
    发明申请
    SUB VOLT FLASH MEMORY SYSTEM 有权
    子电压闪存系统

    公开(公告)号：US20090016106A1

    公开(公告)日：2009-01-15

    申请号：US11777895

    申请日：2007-07-13

    申请人： Hieu Van TRAN ,  Sang T. NGUYEN ,  Anh LY ,  Hung Q. NGUYEN

    发明人： Hieu Van TRAN ,  Sang T. NGUYEN ,  Anh LY ,  Hung Q. NGUYEN

    IPC分类号： G11C16/04 ,  G11C16/06 ,  G11C8/00

    CPC分类号： G11C16/28 ,  G11C16/08 ,  G11C16/30

    摘要： Various circuits include MOS transistors that have a bulk voltage terminal for receiving a bulk voltage that is different from a supply voltage and ground. The bulk voltage may be selectively set so that some MOS transistors have a bulk voltage set to the supply voltage or ground and other MOS transistors have a bulk voltage that is different. The bulk voltage may be set to forward or reverse bias pn junctions in the MOS transistor. The various circuits include comparators, operational amplifiers, sensing circuits, decoding circuits and the other circuits. The circuits may be included in a memory system.

    摘要翻译： 各种电路包括具有用于接收不同于电源电压和接地的体电压的体电压端子的MOS晶体管。 可以选择性地设置体电压，使得一些MOS晶体管具有设置为电源电压或地的体电压，并且其它MOS晶体管具有不同的体电压。 体电压可以被设置为MOS晶体管中的正向或反向偏置pn结。 各种电路包括比较器，运算放大器，感测电路，解码电路和其它电路。 电路可以包括在存储器系统中。