Linear dead-band-free digital phase detection
    1.
    发明授权
    Linear dead-band-free digital phase detection 失效
    线性无死区数字相位检测

    公开(公告)号:US06985551B1

    公开(公告)日:2006-01-10

    申请号:US09580632

    申请日:2000-05-30

    IPC分类号: H03D3/24

    摘要: A phase-locked loop includes a phase detector, a loop filter, a voltage controlled oscillator and a frequency divider arranged such that the phase detector generates a phase detector output signal as a function of a phase difference between the reference clock signal and the feedback signal; the loop filter generates a frequency control signal from the phase detector output signal; the voltage controlled oscillator generates a phase-locked loop output signal that has a frequency that is controlled by the frequency control signal; and the frequency divider generates the feedback signal from the phase-locked loop output signal. The phase-locked loop further includes one or more circuit elements that maintain an operating point of the phase detector such that, for a predetermined range of both positive and negative phase differences between the reference clock signal and the feedback signal, the output signal is generated as a substantially linear function of the phase difference between the reference clock signal and the feedback signal.

    摘要翻译: 锁相环包括相位检测器,环路滤波器,压控振荡器和分频器,其被布置成使得相位检测器产生作为参考时钟信号和反馈信号之间的相位差的函数的相位检测器输出信号 ; 环路滤波器从相位检测器输出信号产生频率控制信号; 压控振荡器产生具有由频率控制信号控制的频率的锁相环输出信号; 并且分频器从锁相环输出信号产生反馈信号。 锁相环还包括保持相位检测器的工作点的一个或多个电路元件,使得在参考时钟信号和反馈信号之间的正和负相位差的预定范围内,产生输出信号 作为参考时钟信号和反馈信号之间的相位差的基本线性函数。

    XO-buffer robust to interference
    2.
    发明授权
    XO-buffer robust to interference 有权
    XO缓冲区能够强大的干扰

    公开(公告)号:US07102447B2

    公开(公告)日:2006-09-05

    申请号:US10837573

    申请日:2004-05-04

    IPC分类号: H01L7/00

    CPC分类号: H03B5/04

    摘要: Disclosed are methods and circuit configurations for reference frequency signal distribution circuitry that suppress unwanted spurious components introduced by way of RF signal leakage. The methods and circuitry may include relocating components of a buffer along a reference frequency signal path, thereby suppressing conductive and inductive components associated with RF leakage paths entering the circuitry. A filter also may be used after the buffer to suppress spurious components resulting from subsampling of unwanted tones in a phase frequency detector or intermodulation between the reference signal and interference tones in the signal-path of the buffer.

    摘要翻译: 公开了用于抑制通过RF信号泄漏引入的不想要的杂散分量的参考频率信号分配电路的方法和电路配置。 方法和电路可以包括沿着参考频率信号路径重新定位缓冲器的部件,从而抑制与进入电路的RF泄漏路径相关联的导电和感应部件。 也可以在缓冲器之后使用滤波器来抑制由相位频率检测器中的不想要的音调的二次采样引起的杂散分量或者在缓冲器的信号路径中的参考信号和干扰音调之间的互调。

    Generation of a phase locked loop output signal having reduced spurious spectral components
    3.
    发明授权
    Generation of a phase locked loop output signal having reduced spurious spectral components 失效
    产生具有减少的寄生光谱分量的锁相环输出信号

    公开(公告)号:US06952138B2

    公开(公告)日:2005-10-04

    申请号:US09949845

    申请日:2001-09-12

    摘要: The present invention helps to mitigate and reduce the amount of interfering signals (e.g. RF leakage) that enter the phase detector of a phase locked loop by acting as a less than perfect sampler. This is accomplished by introducing a time jitter to the signal edges that enter the phase detector input. A phase detector can also be made to act as a less than perfect sampler by intentionally introducing an interfering signal. For example, a small interfering analog signal can be introduced with a different frequency from the reference frequency already present in the PLL. The interfering signal will cause the stable internal signal to vary slightly in time at the rate of the interfering signal frequency. It is this signal variation and jitter introduced on the signal edges entering the phase detector input that induces the phase detector to act as a less than perfect sampler.

    摘要翻译: 本发明有助于通过充当不太完美的采样器来减轻和减少进入锁相环的相位检测器的干扰信号(例如RF泄漏)的量。 这是通过将时间抖动引入到进入相位检测器输入的信号边缘来实现的。 也可以通过有意引入干扰信号,使相位检测器作为不太完美的采样器。 例如,可以引入与PLL中已经存在的参考频率不同的频率的小干扰模拟信号。 干扰信号会导致稳定的内部信号以干扰信号频率的速率在时间上略有变化。 在信号边缘上引入的信号变化和抖动是进入相位检测器输入的,这引起相位检测器作为不太完美的采样器。

    Multi-frequency band receiver for RF signal
    4.
    发明授权
    Multi-frequency band receiver for RF signal 失效
    用于RF信号的多频带接收机

    公开(公告)号:US6091963A

    公开(公告)日:2000-07-18

    申请号:US6867

    申请日:1998-01-14

    摘要: The present invention relates to a receiver device comprising a receiver (104) adapted to receive radio signals in two frequency bands (FB1, FB2). The radio signals in one of the frequency bands (FB1) constitute communication signals for a radio system (AMPS, NMT) having a certain channel spacing, whereas the radio signals of the second frequency band (FB2) constitutes communication signals for a second radio system (PCS1900, DCS1800, GSM) having a second certain channel spacing. The receiver (104) comprises two inputs (108, 11) each intended for a radio system having different frequency bands and channel spacing. For radio signals occurring on one input (108), mixing is performed from the RF range directly to the baseband frequency range. For radio signals occurring on the second input (108) the mixing from the radio frequency range to the baseband frequency range is carried out through an intermediate frequency range. Further the receiver (104) comprises an output (112) intended to deliver baseband signals for both radio systems. The output (112) is connected to a baseband unit which is common to the radio systems. In the baseband unit, among other things, lowpass filtering, detection and neighbouring channel suppression are performed on the received radio signal that has been mixed down to the baseband frequency range.

    摘要翻译: 本发明涉及一种接收机设备,包括适于接收两个频带(FB1,FB2)中的无线电信号的接收机(104)。 一个频带(FB1)中的无线电信号构成具有一定信道间隔的无线电系统(AMPS,NMT)的通信信号,而第二频带(FB2)的无线电信号构成用于第二无线电系统 (PCS1900,DCS1800,GSM)具有第二特定信道间隔。 接收器(104)包括两个输入端(108,11),每个输入端用于具有不同频带和信道间隔的无线电系统。 对于在一个输入(108)上发生的无线电信号,从RF范围直接到基带频率范围进行混频。 对于在第二输入(108)上发生的无线电信号,通过中频范围执行从射频范围到基带频率范围的混合。 此外,接收器(104)包括旨在为两个无线电系统传送基带信号的输出(112)。 输出(112)连接到无线电系统共用的基带单元。 在基带单元中,对已经混合到基带频率范围的接收无线电信号执行低通滤波,检测和相邻信道抑制。

    Methods and apparatus to select tornado error correction parameters
    5.
    发明申请
    Methods and apparatus to select tornado error correction parameters 有权
    选择龙卷风纠错参数的方法和装置

    公开(公告)号:US20070192663A1

    公开(公告)日:2007-08-16

    申请号:US11351760

    申请日:2006-02-10

    IPC分类号: H03M13/00

    摘要: Methods and apparatus to select Tornado forward error correction parameters for delivery systems are disclosed. A disclosed example system includes a transmitter station comprising a processor to select a Tornado error correction parameter based on an error correction configuration for a file and to indicate to a receiver the selected Tornado error correction parameter, and a Tornado error correction circuit to encode the file based on the selected Tornado error correction parameter.

    摘要翻译: 公开了用于选择递送系统的龙卷风前向纠错参数的方法和装置。 所公开的示例系统包括发射机站,该发射台包括处理器,用于基于文件的纠错配置来选择龙卷风误差校正参数,并向接收机指示所选择的龙卷风纠错参数,以及龙卷风纠错电路对文件进行编码 基于所选的龙卷风纠错参数。

    Tuning the bandwidth of a phase-locked loop
    6.
    发明授权
    Tuning the bandwidth of a phase-locked loop 失效
    调整锁相环的带宽

    公开(公告)号:US6049255A

    公开(公告)日:2000-04-11

    申请号:US90914

    申请日:1998-06-05

    摘要: A phase-locked loop bandwidth is tuned to a desired level by operating the phase-locked loop in a phase-locked condition at a first frequency and applying a step response to the phase-locked loop by causing the phase-locked loop to begin locking to a second frequency that is different from the first frequency. A parameter is then detected that is related to the applied step response and that is indicative of whether the phase-locked loop bandwidth is at the desired level. The phase-locked loop bandwidth is adjusted, and the steps of operating at the first frequency, applying the step response, detecting the parameter and adjusting the phase-locked loop bandwidth are repeated until the phase-locked loop bandwidth is at the desired level. Where the desired bandwidth level for tuning is not the operational bandwidth, the phase-locked loop bandwidth is further adjusted by a predetermined amount, thereby tuning the phase-locked loop bandwidth to an operational level. The step response may be applied by changing a frequency division value in a feedback path of the phase-locked loop. The detected parameter may be a pulse skip, which indicates that the bandwidth of the phase-locked loop is not yet at the desired bandwidth level.

    摘要翻译: 通过在第一频率的相位锁定状态下操作锁相环并且通过使锁相环开始锁定而对锁相环施加阶跃响应,将锁相环带宽调谐到期望的水平 到与第一频率不同的第二频率。 然后检测与所应用的步骤响应相关的参数,并且指示锁相环带宽是否处于期望的水平。 调整锁相环带宽,并且重复在第一频率下工作的步骤,应用阶跃响应,检测参数和调整锁相环带宽,直到锁相环带宽达到期望的水平。 在用于调谐的期望带宽水平不是操作带宽的情况下,锁相环带宽进一步调整预定量,从而将锁相环带宽调整到操作级。 可以通过改变锁相环的反馈路径中的分频值来应用阶跃响应。 检测到的参数可以是脉冲跳过,其指示锁相环的带宽尚未处于期望的带宽水平。

    XO-buffer robust to interference
    7.
    发明申请
    XO-buffer robust to interference 有权
    XO缓冲区能够强大的干扰

    公开(公告)号:US20050248416A1

    公开(公告)日:2005-11-10

    申请号:US10837573

    申请日:2004-05-04

    IPC分类号: H03B1/00 H03B5/04

    CPC分类号: H03B5/04

    摘要: Disclosed are methods and circuit configurations for reference frequency signal distribution circuitry that suppress unwanted spurious components introduced by way of RF signal leakage. The methods and circuitry may include relocating components of a buffer along a reference frequency signal path, thereby suppressing conductive and inductive components associated with RF leakage paths entering the circuitry. A filter also may be used after the buffer to suppress spurious components resulting from subsampling of unwanted tones in a phase frequency detector or intermodulation between the reference signal and interference tones in the signal-path of the buffer.

    摘要翻译: 公开了用于抑制通过RF信号泄漏引入的不想要的杂散分量的参考频率信号分配电路的方法和电路配置。 方法和电路可以包括沿着参考频率信号路径重新定位缓冲器的部件,从而抑制与进入电路的RF泄漏路径相关联的导电和感应部件。 也可以在缓冲器之后使用滤波器来抑制由相位频率检测器中的不想要的音调的二次采样引起的杂散分量或者在缓冲器的信号路径中的参考信号和干扰音调之间的互调。

    Multi-divide frequency division
    8.
    发明授权
    Multi-divide frequency division 失效
    多分频分频

    公开(公告)号:US5948046A

    公开(公告)日:1999-09-07

    申请号:US990772

    申请日:1997-12-15

    申请人: Hans Hagberg

    发明人: Hans Hagberg

    CPC分类号: H03K23/667

    摘要: A multi-divide frequency divider, includes a chain of serially-connected frequency divider units, each responding to a first state of received control signals by using the reference clock signal to generate an output signal having a frequency that is the reference clock frequency divided by a first divisor, and each responding to a second state of the control signals by using the reference clock signal to generate an output signal having a frequency that is the reference clock frequency divided by a second divisor. The output signal may be supplied to a successor frequency divider unit in the chain. Division by the first and second divisors causes the frequency divider to respectively transition through first and second predetermined state sequences. Each frequency divider further responds to a third state of the control signals by initializing the frequency divider to an initial state that is common to both the first and second predetermined state sequences, whereby the frequency divider in the initial state is immediately responsive to subsequent application of the first state of the control signals, and is immediately responsive to subsequent application of the second state of the control signals. Receipt of a received swallow enable control signal having a predetermined value disables division by the second divisor. Each frequency divider further generates an output control signal having the predetermined value whenever the frequency divider is in the initial state.

    摘要翻译: 多分频分频器包括串联连接的分频器单元链,每一个通过使用参考时钟信号来响应接收到的控制信号的第一状态,以产生具有作为参考时钟频率除以的频率的输出信号 第一除数,并且通过使用参考时钟信号来响应控制信号的第二状态,以产生具有作为参考时钟频率除以第二除数的参考时钟频率的频率的输出信号。 输出信号可以被提供给链中的后继分频器单元。 由第一和第二除数分频使得分频器分别通过第一和第二预定状态序列转变。 每个分频器还通过将分频器初始化为对于第一和第二预定状态序列共同的初始状态来进一步响应于控制信号的第三状态,由此初始状态中的分频器立即响应于随后的 控制信号的第一状态,并且立即响应于随后应用控制信号的第二状态。 接收到具有预定值的接收到的吞咽使能控制信号将禁止第二除数分频。 每当分频器处于初始状态时,每个分频器进一步产生具有预定值的输出控制信号。