公开(公告)号：US07560796B2

公开(公告)日：2009-07-14

申请号：US11634752

申请日：2006-12-06

申请人： Eun-Seok Shin ,  Hee-Cheol Choi ,  Seung-Hoon Lee ,  Kyung-Hoon Lee ,  Young-Jae Cho

发明人： Eun-Seok Shin ,  Hee-Cheol Choi ,  Seung-Hoon Lee ,  Kyung-Hoon Lee ,  Young-Jae Cho

IPC分类号： H01L29/00

CPC分类号： H01L27/0805 ,  H01L23/5223 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a capacitor and a capacitor array configured for reducing an effect of parasitic capacitance, the capacitor array can have a matrix configuration that includes a plurality of unit capacitors. The unit capacitors include a lower electrode and an upper electrode that constitute a plate capacitor, as well as shielding structures which enclose the capacitor. The unit capacitors are connected by an upper electrode connecting line with a first direction to constitute a plurality of capacitor columns, wherein the unit capacitors are also arranged in rows, in a second direction perpendicular to the first direction, and wherein lower electrode lead lines are disposed between the capacitor columns, the lower electrode lead lines being connected to the respective lower electrodes of each of the unit capacitors.

摘要翻译： 在用于减小寄生电容的影响的电容器和电容器阵列中，电容器阵列可以具有包括多个单位电容器的矩阵配置。 单元电容器包括构成平板电容器的下电极和上电极以及围绕电容器的屏蔽结构。 单元电容器通过上电极连接线与第一方向相连，以构成多个电容器列，其中单元电容器也沿垂直于第一方向的第二方向排列成行，并且其中下电极引线为 设置在电容器柱之间，下部电极引线与每个单位电容器的各个下部电极连接。

公开(公告)号：US06259392B1

公开(公告)日：2001-07-10

申请号：US09166813

申请日：1998-10-06

申请人： Hee-Cheol Choi ,  Kwang-Hee Lee

发明人： Hee-Cheol Choi ,  Kwang-Hee Lee

IPC分类号： H03M166

CPC分类号： H03M1/806 ,  H03M1/168

摘要： Multiplying Digital-to-Analog Converters (MDAC) multiply an analog input signal at an analog input terminal and a digital input signal at a digital input terminal to produce an analog output signal at an output terminal. The MDACs include unit capacitors and a feedback capacitor. The unit capacitors are connected to the analog input terminal during a first time interval and the unit capacitors are selectively connected to a first reference voltage, a second reference voltage or the output terminal during a second time interval in response to the digital input signal at the digital input terminal. The feedback capacitor is connected to the second reference voltage during the first time interval and to the output terminal during the second time interval.

摘要翻译： 乘法数字模拟转换器（MDAC）将模拟输入端的模拟输入信号和数字输入端的数字输入信号相乘，以在输出端产生模拟输出信号。 MDAC包括单位电容器和反馈电容器。 单元电容器在第一时间间隔期间连接到模拟输入端子，并且单元电容器响应于第二时间间隔期间的数字输入信号在第二时间间隔期间选择性地连接到第一参考电压，第二参考电压或输出端子 数字输入端子 反馈电容器在第一时间间隔期间连接到第二参考电压，并且在第二时间间隔期间连接到输出端子。

公开(公告)号：US20090128231A1

公开(公告)日：2009-05-21

申请号：US12353749

申请日：2009-01-14

申请人： Hee-Cheol Choi

发明人： Hee-Cheol Choi

IPC分类号： G05F1/10

CPC分类号： G05F3/262 ,  Y10S323/901

摘要： A circuit for generating a reference current comprises: a first current mirror configured to current-mirror based on a second current, so as to generate a first current that is substantially in inverse proportion to a variation of a power supply voltage; a current compensation unit configured to remove a variation of the first current corresponding to the variation of the power supply voltage to form a compensated first current; a second current mirror configured to generate the second current based on the compensated first current, and configured to provide the second current to the first current mirror; and a current output unit configured to output the second current as the reference current.

摘要翻译： 用于产生参考电流的电路包括：基于第二电流配置为电流镜的第一电流镜，以便产生与电源电压的变化基本上成反比的第一电流; 电流补偿单元，被配置为去除与所述电源电压的变化相对应的所述第一电流的变化，以形成补偿的第一电流; 第二电流镜，被配置为基于所述经补偿的第一电流产生所述第二电流，并且被配置为将所述第二电流提供给所述第一电流镜; 以及配置为输出第二电流作为参考电流的电流输出单元。

公开(公告)号：US07508427B2

公开(公告)日：2009-03-24

申请号：US10823859

申请日：2004-04-14

申请人： Hee-Cheol Choi

发明人： Hee-Cheol Choi

IPC分类号： H04N5/217

CPC分类号： H04N5/378 ,  G11C27/026 ,  H03F3/005 ,  H03G1/0094 ,  H04N5/35518

摘要： A system and method for processing an input signal, such as an analog video input signal, are described. The system includes a correlated double sampler (CDS) for receiving an input signal, sampling the input signal and providing an output signal, the CDS comprising an amplifier for amplifying the input signal. The sampled and amplified output of the CDS is applied to a programmable gain amplifier (PGA). The PGA receives the output signal from the CDS and amplifies the received signal. By providing gain in both the CDS and the PGA, the system of the invention uses much smaller area than conventional systems. Also, a pseudo log scale gain response for the overall system is realized.

摘要翻译： 描述用于处理诸如模拟视频输入信号的输入信号的系统和方法。 该系统包括用于接收输入信号的相关双采样器（CDS），对输入信号进行采样并提供输出信号，该CDS包括用于放大输入信号的放大器。 CDS的采样和放大输出应用于可编程增益放大器（PGA）。 PGA从CDS接收输出信号并放大接收到的信号。 通过在CDS和PGA两者中提供增益，本发明的系统使用比常规系统小得多的面积。 此外，实现了整个系统的伪对数标度增益响应。

公开(公告)号：US07495507B2

公开(公告)日：2009-02-24

申请号：US11508428

申请日：2006-08-23

申请人： Hee-Cheol Choi

发明人： Hee-Cheol Choi

IPC分类号： G05F1/10 ,  G05F3/02

CPC分类号： G05F3/262 ,  Y10S323/901

摘要： A circuit for generating a reference current comprises: a first current mirror configured to current-mirror based on a second current, so as to generate a first current that is substantially in inverse proportion to a variation of a power supply voltage; a current compensation unit configured to remove a variation of the first current corresponding to the variation of the power supply voltage to form a compensated first current; a second current mirror configured to generate the second current based on the compensated first current, and configured to provide the second current to the first current mirror; and a current output unit configured to output the second current as the reference current.

摘要翻译： 用于产生参考电流的电路包括：基于第二电流配置为电流镜的第一电流镜，以便产生与电源电压的变化基本上成反比的第一电流; 电流补偿单元，被配置为去除与所述电源电压的变化相对应的所述第一电流的变化，以形成补偿的第一电流; 第二电流镜，被配置为基于所述经补偿的第一电流产生所述第二电流，并且被配置为将所述第二电流提供给所述第一电流镜; 以及配置为输出第二电流作为参考电流的电流输出单元。

公开(公告)号：US20070138587A1

公开(公告)日：2007-06-21

申请号：US11634752

申请日：2006-12-06

申请人： Eun-Seok Shin ,  Hee-Cheol Choi ,  Seung-Hoon Lee ,  Kyung-Hoon Lee ,  Young-Jae Cho

发明人： Eun-Seok Shin ,  Hee-Cheol Choi ,  Seung-Hoon Lee ,  Kyung-Hoon Lee ,  Young-Jae Cho

IPC分类号： H01L31/0232

CPC分类号： H01L27/0805 ,  H01L23/5223 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a capacitor and a capacitor array configured for reducing an effect of parasitic capacitance, the capacitor array can have a matrix configuration that includes a plurality of unit capacitors. The unit capacitors include a lower electrode and an upper electrode that constitute a plate capacitor, as well as shielding structures which enclose the capacitor. The unit capacitors are connected by an upper electrode connecting line with a first direction to constitute a plurality of capacitor columns, wherein the unit capacitors are also arranged in rows, in a second direction perpendicular to the first direction, and wherein lower electrode lead lines are disposed between the capacitor columns, the lower electrode lead lines being connected to the respective lower electrodes of each of the unit capacitors.

摘要翻译： 在用于减小寄生电容的影响的电容器和电容器阵列中，电容器阵列可以具有包括多个单位电容器的矩阵配置。 单元电容器包括构成平板电容器的下电极和上电极以及围绕电容器的屏蔽结构。 单元电容器通过上电极连接线与第一方向相连，以构成多个电容器列，其中单元电容器也沿垂直于第一方向的第二方向排列成行，并且其中下电极引线为 设置在电容器柱之间，下部电极引线与每个单位电容器的各个下部电极连接。

公开(公告)号：US06597235B2

公开(公告)日：2003-07-22

申请号：US10043029

申请日：2002-01-09

申请人： Hee-cheol Choi

发明人： Hee-cheol Choi

IPC分类号： H02M307

CPC分类号： H02M3/073 ,  H02M2003/077

摘要： A boost circuit, such as might be used to generate a boosted voltage in an integrated circuit device (e.g., an EEPROM), includes a plurality of charge pump circuits having outputs connected in common and that generate current pulses responsive to respective phased periodic signals. The boost circuit further includes a multi-phase periodic signal generator circuit that generates the phased periodic signals such that they have respective different phases. For example, the multi-phase periodic signal generator circuit may include a control signal generator circuit that produces a control signal responsive to a voltage produced by the plurality of charge pump circuits, and an oscillator circuit that generates the plurality of phased periodic signals responsive to the control signal. Related operating methods are described.

摘要翻译： 诸如可能用于在集成电路器件（例如，EEPROM）中产生升高的电压的升压电路包括多个电荷泵电路，其具有共同连接的输出，并且响应于各个相控周期信号产生电流脉冲。 升压电路还包括产生相位周期信号的多相周期信号发生器电路，使得它们具有各自的不同相位。 例如，多相周期信号发生器电路可以包括控制信号发生器电路，其产生响应于由多个电荷泵电路产生的电压的控制信号，以及振荡器电路，其产生响应于 控制信号。 描述相关的操作方法。

公开(公告)号：US6052025A

公开(公告)日：2000-04-18

申请号：US124599

申请日：1998-07-29

申请人： Dong-Young Chang ,  You-Mi Lee ,  Seung-Hoon Lee ,  Geun-Soon Kang ,  Hee-Cheol Choi

发明人： Dong-Young Chang ,  You-Mi Lee ,  Seung-Hoon Lee ,  Geun-Soon Kang ,  Hee-Cheol Choi

IPC分类号： H01L21/8234 ,  H01L27/088 ,  H03F3/45

CPC分类号： H03F3/45219 ,  H03F3/45654 ,  H03F2203/45398

摘要： Operational amplifier integrated circuits include a differential input stage, a cascode current mirror, a cascode current source and a preferred bias signal generator which is responsive to a clock signal and is electrically coupled to the differential input stage, the cascode current mirror and the cascode current source. This preferred bias signal generator sequentially enables the cascode current mirror and then the differential input stage in response to a rising edge of the clock signal and disables the cascode current mirror and the cascode current source in response to a falling edge of the clock signal. This sequential enablement of the cascode current mirror before the differential input stage improves the unity gain phase margin characteristics of the circuit and the disablement of the cascode current mirror and the cascode current source in response to the falling edge of the clock signal decreases the power consumption requirements of the circuit.

摘要翻译： 运算放大器集成电路包括差分输入级，共源共栅电流镜，共源共栅电流源和优选的偏置信号发生器，其响应于时钟信号并电耦合到差分输入级，共源共栅电流镜和共源共栅电流 资源。 该优选的偏置信号发生器响应于时钟信号的上升沿而依次启用共源共栅电流镜和差分输入级，并响应时钟信号的下降沿禁用共源共栅电流反射镜和共源共栅电流源。 在差分输入级之前，级联电流镜的这种顺序启用提高了电路的单位增益相位裕度特性，并且响应于时钟信号的下降沿，共源共栅电流反射镜和共源共栅电流源的禁用降低了功耗 电路要求。

公开(公告)号：US06891494B2

公开(公告)日：2005-05-10

申请号：US10687084

申请日：2003-10-16

申请人： Hee-Cheol Choi

发明人： Hee-Cheol Choi

IPC分类号： H03M1/12 ,  H03M1/06 ,  H03M1/36

CPC分类号： H03M1/365 ,  H03M1/0604

摘要： The present invention discloses a layout method of a comparator array of a flash type analog to digital converting circuit. The flash type analog to digital converting circuit includes a reference voltage for generating 2n −Ivoltages and being arranged to be folded; a comparator array including (2n−1) comparators for comparing voltage differences between the respective 2n −Ivoltages and an analog input signal to generate a digital thermometer code having (2n−1) bits and an encoder for encoding the digital thermometer code having (2n−1) bits to generate an n-bit digital signal. The layout method of the flash type analog to digital converting circuit comprises arranging the comparators such that the comparators of (2n−1)th comparator to (2n/2)th comparator are arranged in order and the comparators of (2n/2−1)th comparator to a first comparator are arranged in reverse fashion between the comparators of the (2n−1)th comparator to the (2n/2)th comparator; and arranging the comparators such that the neighboring comparators adjacent to the respective (2n−1) comparators remain at to the same state when the (2n−1)th comparator to the (2n/2)th comparator transit to different states respectively. Therefore, increasing of an offset voltage due to the effects of the neighboring comparators is prevented without increasing a layout area size.

摘要翻译： 本发明公开了一种闪存型模数转换电路的比较器阵列的布局方法。 闪光型模数转换电路包括用于产生2-n电压的参考电压并被布置为折叠; 比较器阵列，其包括用于比较各个2n -I电压的电压差与模拟输入信号之间的比较器，用于产生数字温度计代码，其具有（ 2个比特）和用于编码具有（2 n个）比特的数字温度计代码的编码器，以产生n比特数字信号。 闪存型模数转换电路的布局方法包括：将比较器布置成使比较器的比较器（2＆lt; n＆lt; n＆gt; 1） ^{/ 2）比较器按顺序排列，并且比较器将比较器（2＆lt; n＆lt; i＆gt; / 2-1） 第一比较器以相反的方式布置在（2≤n≤0.0）比较器的比较器与（2≤n≤O/ 2）比较器的比较器之间。 SUP> th 比较器; 以及将比较器布置成使得当相应的（2≤n≤-1）比较器相邻的相邻比较器在（2≤n≤-SUP）-1）时保持在相同的状态 比较器到（2 / 2）比较器分别转到不同的状态。 因此，在不增加布局区域尺寸的情况下，可以防止由于相邻比较器的影响引起的偏移电压的增加。}

公开(公告)号：US20070057717A1

公开(公告)日：2007-03-15

申请号：US11508428

申请日：2006-08-23

申请人： Hee-Cheol Choi

发明人： Hee-Cheol Choi

IPC分类号： G05F1/10

CPC分类号： G05F3/262 ,  Y10S323/901

摘要： A circuit for generating a reference current comprises: a first current mirror configured to current-mirror based on a second current, so as to generate a first current that is substantially in inverse proportion to a variation of a power supply voltage; a current compensation unit configured to remove a variation of the first current corresponding to the variation of the power supply voltage to form a compensated first current; a second current mirror configured to generate the second current based on the compensated first current, and configured to provide the second current to the first current mirror; and a current output unit configured to output the second current as the reference current.

摘要翻译： 用于产生参考电流的电路包括：基于第二电流配置为电流镜的第一电流镜，以便产生与电源电压的变化基本上成反比的第一电流; 电流补偿单元，被配置为去除与所述电源电压的变化相对应的所述第一电流的变化，以形成补偿的第一电流; 第二电流镜，被配置为基于所述经补偿的第一电流产生所述第二电流，并且被配置为将所述第二电流提供给所述第一电流镜; 以及配置为输出第二电流作为参考电流的电流输出单元。