Abstract:
A luminous display includes pixels arranged in rows and columns. Control signals that are used for controlling first switches for measuring parameters of pixel cells in a first row are also used to control second switches for programming pixel cells in a second row. In this way it is possible to use a single control signal for selecting one pixel cell for programming and simultaneously selecting another pixel cell for measuring. Programming and measuring are thus performed in a time staggered manner, while the addressing is moved to the respective next row. The programming is preferably voltage programming. In one embodiment the current through the pixel cell that is currently programmed is interrupted. In another embodiment the measuring is performed only after the transient current into signal holding means coupled to current control means has set.
Abstract:
A CMOS image sensor allows for selectively outputting one of two vertical resolutions, e.g. 1080 to 720 lines. The scan conversion is implemented completely on the image sensor chip by using smaller sub-pixel cores, which can be electrically combined via switch transistors. A basic circuit of the CMOS image sensor has a number of pixel cells arranged in lines and columns. Each pixel cell has a photosensitive element that converts impinging light into electric charge and a first transfer element. The first transfer elements of m pixel cells arranged consecutively in the same column are arranged for transferring the charge generated in the respective m photosensitive elements during exposure to a single first charge storage element provided for the respective group of m pixel cells. In an exemplary embodiment the switching scheme allows for combining the signal information of either two or three vertically adjacent sub-pixel cores.
Abstract:
The invention relates to an asynchronous sample rate converter (ASRC) for the conversion of the sample rate of digital data such as audio data or video data. In the case of high over-sampling or sub-sampling factors an ASRC becomes quite complex. It is an object of the invention to provide an ASRC with a simplified design for such purposes. It is suggested to use an ASRC which has a n-tap polyphase filter, whereby a computational entity performs a polynomial computation of the filter coefficients. The attenuation at the notch frequencies is best when using a Parzen window or a quadratic window.
Abstract:
The invention relates to an apparatus for the reproduction or recording of data or information with a photodetector and digital error signal and evaluation signal processing. The object of the invention is to provide an apparatus for the reproduction or recording of data or information which requires little outlay despite digital evaluation signal processing and a considerable capability of adaptation to different scanning speeds. The invention is based on the principle of enabling digital evaluation signal generation with an analog-to-digital converter known from audio technology, even though the data rate of the data or high-frequency signal requires an analog-to-digital converter for the radio-frequency or for the video signal band. An analog-to-digital converter for the audio frequency band can be used to generate a digital evaluation signal by the analog-to-digital converter having fed to it not the high-frequency signal directly but rather at least one envelope of the high-frequency signal. An envelope detector is also proposed, which envelope detector is advantageously suitable both for the purpose of providing an upper envelope and for the purpose of providing a lower envelope. The invention can preferably be used in apparatuses for the reproduction or recording of data or information with a photodetector and digital error signal and evaluation signal processing by means of which data or information are read from the data tracks of a recording medium or of different recording media or are recorded in tracks.
Abstract:
The high frequency oscillator comprises a reference oscillator, a phase-locked loop circuit with a phase frequency detector, a charge pump, a ring oscillator and a divider, the reference oscillator being coupled to the phase frequency detector for frequency control. The ring oscillator is a symmetrical delay cell oscillator containing two amplifiers with a dual output stage for providing I/Q output signal generation. The reference oscillator works in the range of 1.25-1.5 GHz and is a Colpitts type digital controlled frequency synthesizer with an external tank circuit for providing a low phase noise, and the dividing factor of the divider is four for providing a tuned output range of 5 to 6 GHz. The phase-locked loop circuit is integrated together with the reference oscillator into an integrated circuit, using advantageously a BICMOS Silicon/Germanium process, which is well suited for RF applications.
Abstract:
In illuminated displays with lighting elements which are driven by means of a control voltage, the voltage drop on a supply line, which supplies two or more lighting elements, is compensated for. The currents for all of the light elements, which are connected to a supply line, and the known resistances are used to calculate the potential profile of the supply line for this purpose. The control voltages for the light elements are changed such that the actual potential on the supply line for each element is taken into account. Fluctuations in the brightness of the illuminated display resulting from potential differences are avoided. One element of an illuminated display has a current control means, a signal retaining means, a light emitting means and means for interrupting the current flow through the light emitting means. The control voltage is adjusted with the current flow interrupted, so that no potential differences exist on the supply line. The signal retaining means hold the control voltage relative to the potential on the line at the respective position of the lighting element. An illuminated display has adjustable voltages for the supply lines. The voltages are chosen to be sufficiently high that the minimum required voltage for setting the desired currents through the lighting elements is achieved.
Abstract:
The reduction of interfering influences in an LC resonant circuit with an integrated circuit is effected by including the interfering elements of the housing in the resonant circuit. This precludes the occurrence of parasitic radio-frequency oscillation modes. It also ensures good radio-frequency properties and a wide frequency tuning range.
Abstract:
The present invention relates to a circuit for controlling a light emitting element, in particular an organic light emitting diode. The circuit comprises a capacitor connectable with the light emitting element, charging means for charging the capacitor and a switching means. The switching means is adapted to alternately disconnect the capacitor from the light emitting element and connect the capacitor to the light emitting element. The capacitor is alternately charged and discharged. A charging current or a discharge current from the capacitor drives the current of the light emitting element. Said charging means comprises at least one charging transistor for charging the capacitor.
Abstract:
The present invention relates a bidirectional signal transmission apparatus and method, wherein said apparatus comprises a processor unit connected in signal communication with an Ethernet, an RF modulation/demodulation unit, and an RF frequency conversion unit connected in signal communication with a coaxial cable network. The data signal input from the Ethernet is modulated into standard IEEE802.11 signal by means of said signal processing unit and RF modulation/demodulation unit, and then down-converted from 2.4 GHz or 5.8 GHz standard IEEE802.11 signal to a range of 500 MHz to 2000 MHz, and preferably to a range of 900 MHz to 1200 MHz. The bidirectional transmission apparatus further includes a frequency band selector for selecting different frequency bands so as to broaden the bandwidth of the signal and a real broad band data transmission is accomplished.
Abstract:
An image sensor circuit comprises a pixel cell array having a plurality of pixel cells arranged along a plurality of column lines, a plurality of readout circuits connected to said column lines, each of which comprises an analog-to-digital converter and a multiplexer for selectively applying an output signal of one of said column lines to said analog-to-digital converter. Between two of said column lines which are connected to a first one of said readout circuits located at a first side of said pixel cell array, there is a column line which is connected to a second one of said readout circuits located at a second side of said pixel cell array opposite to said first side.