Method for fabricating an array substrate for a liquid crystal display with an insulating stack made from TFT layers between crossed conductors
    3.
    发明授权
    Method for fabricating an array substrate for a liquid crystal display with an insulating stack made from TFT layers between crossed conductors 有权
    用于制造具有由交叉导体之间的TFT层制成的绝缘层的液晶显示器用阵列基板的方法

    公开(公告)号:US06760092B2

    公开(公告)日:2004-07-06

    申请号:US10652311

    申请日:2003-09-02

    IPC分类号: G02F11333

    摘要: An array substrate for use in a liquid crystal display device is fabricated by the steps of forming a first metal layer on a substrate, patterning the first metal layer to form a gate line, a gate electrode, a gate pad, a first shorting bar, and a second shorting bar, forming a gate insulation layer, a pure amorphous silicon layer, a doped amorphous silicon layer and a second metal layer to cover the patterned first metal layer, patterning the second metal layer and the doped amorphous silicon layer to form first, second and third through-holes and first and second grooves to expose a portion of the pure amorphous silicon layer, the first and second grooves creating an isolated portions of the second metal layer, forming a passivation layer to cover the patterned second metal layer, forming a source electrode, a drain electrode, a data line, a data pad, an insulating segment, and first, second and third contact holes, and forming a pixel electrode, a first connector and a second connector of a transparent conductive material.

    摘要翻译: 通过以下步骤制造用于液晶显示装置的阵列基板:在基板上形成第一金属层,图案化第一金属层以形成栅极线,栅电极,栅极焊盘,第一短路棒, 以及第二短路棒,形成栅绝缘层,纯非晶硅层,掺杂非晶硅层和第二金属层以覆盖图案化的第一金属层,图案化第二金属层和掺杂的非晶硅层以形成第一 第二和第三通孔以及第一和第二凹槽以暴露纯非晶硅层的一部分,第一和第二凹槽产生第二金属层的隔离部分,形成钝化层以覆盖图案化的第二金属层, 形成源电极,漏电极,数据线,数据焊盘,绝缘段以及第一,第二和第三接触孔,并形成像素电极,第一连接器和第二连接器 透明导电材料。

    Liquid crystal display and fabricating method thereof
    4.
    发明授权
    Liquid crystal display and fabricating method thereof 有权
    液晶显示及其制造方法

    公开(公告)号:US06509940B2

    公开(公告)日:2003-01-21

    申请号:US09739824

    申请日:2000-12-20

    IPC分类号: G02F1136

    CPC分类号: G02F1/1368

    摘要: A liquid crystal display device and a fabricating method thereof wherein four masks are used so as to reduce a process. In the device, a gate electrode is formed on a transparent substrate. A gate insulating film is formed on the transparent substrate to cover the gate electrode. An active layer is provided at a portion corresponding to the gate electrode on the gate insulating film. Source and drain electrodes are intervened by an ohmic contact layer on the active layer. A contact portion is connected to and extended from a portion of the drain electrode opposed to the source electrode and has an exposed side surface. A passivation layer is formed on the active layer in such a manner to cover the source and drain electrodes, but to expose the side surface of the contact portion. A pixel electrode is formed on the gate insulating film in such a manner to contact the exposed side surface of the contact portion. Accordingly, the contact portion connected to and extended from a portion of the drain electrode opposed to the source electrode or a plurality of comb-shaped contact portions having the exposed side surfaces are formed in such a manner to overlap with the black matrix of the upper plate provided with color filters. Accordingly, the pixel electrode contacts the side surface of the contact portion overlapping with a black matrix of an upper plate to be electrically connected to the drain electrode, so that an aperture ration can be improved.

    摘要翻译: 一种液晶显示装置及其制造方法,其中使用四个掩模以减少处理。 在该器件中,在透明基板上形成栅电极。 在透明基板上形成栅极绝缘膜以覆盖栅电极。 在与栅极绝缘膜上的栅电极对应的部分设置有源层。 源极和漏极由有源层上的欧姆接触层介入。 接触部分连接到与源电极相对的一部分漏电极,并具有暴露的侧表面。 钝化层以这样的方式形成在有源层上以覆盖源电极和漏电极,但是露出接触部分的侧表面。 像素电极以与接触部的露出侧面接触的方式形成在栅极绝缘膜上。 因此,与源极电极相对的一部分漏电极的接触部分或具有暴露侧面的多个梳形接触部分形成为与上部的黑色矩阵重叠 板上装有彩色滤光片。 因此,像素电极接触与上板的黑矩阵重叠的接触部分的侧表面,以电连接到漏电极,从而可以提高孔径比。

    Array substrate for use in LCD device and method of fabricating same
    6.
    发明授权
    Array substrate for use in LCD device and method of fabricating same 有权
    用于LCD装置的阵列基板及其制造方法

    公开(公告)号:US06992364B2

    公开(公告)日:2006-01-31

    申请号:US10653283

    申请日:2003-09-03

    IPC分类号: H01L29/00

    摘要: A TFT array substrate has a PAI pattern, and the PAI pattern has an over-etched portion of the pure amorphous silicon layer. This over-etched portion prevents a short between the pixel electrode and the pure amorphous silicon layer (i.e., the active layer). The over-etched portion also enables the aperture ratio to increase a gate line over a said substrate; a data line over the said substrate being perpendicular to the gate line; a passivation layer covering the data line, the passivation layer divided into a residual passivation layer and a etched passivation layer; a doped amorphous silicon layer formed under the data line and corresponding in size to the data line; a pure amorphous silicon layer formed under the doped amorphous silicon layer and having a over-etched portion in the peripheral portions, wherein the over-etched portion is over-etched from the edges of the residual passivation layer toward the inner side; an insulator layer under the pure amorphous silicon layer; a TFT formed near the crossing of the gate line and the data line; and a pixel electrode overlapping the data line and contacting the TFT.

    摘要翻译: TFT阵列基板具有PAI图案,并且PAI图案具有纯非晶硅层的过蚀刻部分。 该过蚀刻部分防止像素电极和纯非晶硅层(即有源层)之间的短路。 过蚀刻部分还使孔径比增加了所述衬底上的栅极线; 所述衬底上的数据线垂直于所述栅极线; 覆盖数据线的钝化层,钝化层分为残留钝化层和蚀刻钝化层; 形成在数据线之下且与数据线大小对应的掺杂非晶硅层; 形成在掺杂非晶硅层下面并且在周边部分中具有过蚀刻部分的纯非晶硅层,其中过蚀刻部分从残余钝化层的边缘向内侧被过度蚀刻; 在纯非晶硅层下面的绝缘体层; 形成在栅极线和数据线的交叉点附近的TFT; 以及与数据线重叠并与TFT接触的像素电极。