Method for inspecting a wafer and apparatus for inspecting a wafer

    公开(公告)号:US20050176159A1

    公开(公告)日:2005-08-11

    申请号:US11101035

    申请日:2005-04-06

    申请人: Hyo-Cheon Kang

    发明人: Hyo-Cheon Kang

    CPC分类号: G01R31/307

    摘要: Disclosed are a method and apparatus for inspecting a wafer for electrical defects. A first electron beam is irradiated onto an area of the wafer including an inspection region to charge the area. A second electron beam is irradiated onto the inspection region to inspect the inspection region after focusing the second electron beam on the inspection region. A third electron beam is irradiated onto the area to discharge charges accumulated on the area. Therefore, the electrical defect of the wafer can be precisely detected with increased voltage contrasts for distinguishing the electrical defect. This method and apparatus have improved detection sensitivity and detection reliability over conventional methods.

    Apparatus for detecting defects in semiconductor devices and methods of using the same

    公开(公告)号:US06545491B2

    公开(公告)日:2003-04-08

    申请号:US09940943

    申请日:2001-08-28

    IPC分类号: G01R31305

    摘要: The present invention provides apparatus and methods for detecting defects in a semiconductor device. The semiconductor device includes a plurality of conductive pads, which may be formed, for example, between insulating layers for insulating the conductive pads from conductive lines formed between ones of the conductive pads. Electrons and/or holes are accumulated in ones of the conductive pads, for example, on the surface of the conductive pads. A contrast associated with one of the conductive pads is detected based on secondary electron emissions from the ones of the conductive pads after accumulation of the electrons and/or holes. The presence of defects is determined based on the detected contrast.

    Methods of inspecting integrated circuit substrates using electron beams
    3.
    发明授权
    Methods of inspecting integrated circuit substrates using electron beams 有权
    使用电子束检查集成电路基板的方法

    公开(公告)号:US06525318B1

    公开(公告)日:2003-02-25

    申请号:US09384885

    申请日:1999-08-27

    IPC分类号: H01J37256

    CPC分类号: G01N23/22 H01J2237/2817

    摘要: Methods of inspecting integrated circuit substrates include the steps of directing a beam of electrons into a first conductive plug located within a first contact hole on an integrated circuit substrate and then measuring a quantity of electrons emitted from the first conductive plug to determine an absence or presence of an electrically insulating residue in the first contact hole. The quantity of electrons emitted from the first conductive plug by secondary electron emission can be measured in order to determine whether electrons are being accumulated within the conductive plug because an insulating residue is blocking passage of the electrons into an underlying conductive portion of the substrate. If an electrically insulating residue is present, then sufficient repulsive forces between the accumulated electrons will result in the secondary emission of excess electrons from an upper surface of the conductive plug as the conductive plug is being irradiated with the electron beam. A detector can then be used to measure the quantity of the emitted electrons against a threshold level, in order determine whether the quantity of electrons emitted by secondary emission is sufficient to indicate that an insulating residue is present in the contact hole.

    摘要翻译: 检查集成电路基板的方法包括以下步骤:将电子束引导到位于集成电路基板上的第一接触孔内的第一导电插塞中,然后测量从第一导电插塞发射的电子量以确定不存在或存在 的第一接触孔中的电绝缘残渣。 可以测量从第一导电插塞通过二次电子发射发射的电子的量,以便确定电子是否积聚在导电插塞内,因为绝缘残留物阻挡电子通过基底的下面的导电部分。 如果存在电绝缘的残留物,则当导电塞被电子束照射时,积聚的电子之间的足够的排斥力将导致从导电塞的上表面二次发射多余的电子。 然后可以使用检测器来测量发射的电子的量相对于阈值水平,以便确定由二次发射发射的电子的量是否足以表明在接触孔中存在绝缘残留物。

    Method for inspecting a wafer and apparatus for inspecting a wafer
    4.
    发明授权
    Method for inspecting a wafer and apparatus for inspecting a wafer 有权
    用于检查晶片的方法和用于检查晶片的装置

    公开(公告)号:US07126357B2

    公开(公告)日:2006-10-24

    申请号:US11101035

    申请日:2005-04-06

    申请人: Hyo-Cheon Kang

    发明人: Hyo-Cheon Kang

    IPC分类号: G01R31/305 H01L21/66

    CPC分类号: G01R31/307

    摘要: Disclosed are a method and apparatus for inspecting a wafer for electrical defects. A first electron beam is irradiated onto an area of the wafer including an inspection region to charge the area. A second electron beam is irradiated onto the inspection region to inspect the inspection region after focusing the second electron beam on the inspection region. A third electron beam is irradiated onto the area to discharge charges accumulated on the area. Therefore, the electrical defect of the wafer can be precisely detected with increased voltage contrasts for distinguishing the electrical defect. This method and apparatus have improved detection sensitivity and detection reliability over conventional methods.

    摘要翻译: 公开了一种用于检查晶片的电气缺陷的方法和装置。 将第一电子束照射到包括检查区域的晶片的区域上以对该区域充电。 将第二电子束照射到检查区域上,以便在将第二电子束聚焦在检查区域上之后检查检查区域。 将第三电子束照射到该区域上以放电积累在该区域上的电荷。 因此,可以通过增加的电压对比来精确地检测晶片的电气缺陷,以区分电气缺陷。 与常规方法相比,该方法和装置具有提高的检测灵敏度和检测可靠性。

    Method of determining the irregularities of a hole
    6.
    发明申请
    Method of determining the irregularities of a hole 有权
    确定孔的不规则性的方法

    公开(公告)号:US20050090999A1

    公开(公告)日:2005-04-28

    申请号:US10954254

    申请日:2004-09-29

    申请人: Hyo-Cheon Kang

    发明人: Hyo-Cheon Kang

    IPC分类号: H01L21/66 G01B15/08 G01B7/00

    CPC分类号: G01B15/08

    摘要: In a method of calculating irregularities of a hole, a center coordinate of an actual hole is set. Inner wall coordinates of the actual hole are obtained from the center coordinate of the actual hole. An area of the actual hole is determined based on the inner wall coordinates of the actual hole. A radius of a virtual hole is determined based on the area of the actual hole. A center coordinate of the virtual hole is determined based on the inner wall coordinates of the actual hole to obtain a circumference line of the virtual hole. A standard deviation of the inner wall coordinates of the actual hole relative to the circumference line of the virtual hole is calculated, thereby obtaining the irregularities of the actual hole.

    摘要翻译: 在计算孔的凹凸的方法中,设定实际孔的中心坐标。 实际孔的内壁坐标是从实际孔的中心坐标得到的。 基于实际孔的内壁坐标确定实际孔的面积。 基于实际孔的面积确定虚拟孔的半径。 基于实际孔的内壁坐标来确定虚拟孔的中心坐标,以获得虚拟孔的圆周线。 计算出实际孔相对于虚拟孔的圆周线的内壁坐标的标准偏差,从而获得实际孔的凹凸。

    Method for inspecting a wafer and apparatus for inspecting a wafer
    7.
    发明授权
    Method for inspecting a wafer and apparatus for inspecting a wafer 有权
    用于检查晶片的方法和用于检查晶片的装置

    公开(公告)号:US06913939B2

    公开(公告)日:2005-07-05

    申请号:US10750470

    申请日:2003-12-31

    申请人: Hyo-Cheon Kang

    发明人: Hyo-Cheon Kang

    IPC分类号: H01L21/66 G01R31/307

    CPC分类号: G01R31/307

    摘要: Disclosed are a method and apparatus for inspecting a wafer for electrical defects. A first electron beam is irradiated onto an area of the wafer including an inspection region to charge the area. A second electron beam is irradiated onto the inspection region to inspect the inspection region after focusing the second electron beam on the inspection region. A third electron beam is irradiated onto the area to discharge charges accumulated on the area. Therefore, the electrical defect of the wafer can be precisely detected with increased voltage contrasts for distinguishing the electrical defect. This method and apparatus have improved detection sensitivity and detection reliability over conventional methods.

    摘要翻译: 公开了一种用于检查晶片的电气缺陷的方法和装置。 将第一电子束照射到包括检查区域的晶片的区域上以对该区域充电。 将第二电子束照射到检查区域上,以便在将第二电子束聚焦在检查区域上之后检查检查区域。 将第三电子束照射到该区域上以放电积累在该区域上的电荷。 因此,可以通过增加的电压对比来精确地检测晶片的电气缺陷,以区分电气缺陷。 与常规方法相比,该方法和装置具有提高的检测灵敏度和检测可靠性。

    Method of determining the irregularities of a hole
    9.
    发明授权
    Method of determining the irregularities of a hole 有权
    确定孔的不规则性的方法

    公开(公告)号:US07398178B2

    公开(公告)日:2008-07-08

    申请号:US10954254

    申请日:2004-09-29

    申请人: Hyo-Cheon Kang

    发明人: Hyo-Cheon Kang

    IPC分类号: G01B5/28

    CPC分类号: G01B15/08

    摘要: In a method of calculating irregularities of a hole, a center coordinate of an actual hole is set. Inner wall coordinates of the actual hole are obtained from the center coordinate of the actual hole. An area of the actual hole is determined based on the inner wall coordinates of the actual hole. A radius of a virtual hole is determined based on the area of the actual hole. A center coordinate of the virtual hole is determined based on the inner wall coordinates of the actual hole to obtain a circumference line of the virtual hole. A standard deviation of the inner wall coordinates of the actual hole relative to the circumference line of the virtual hole is calculated, thereby obtaining the irregularities of the actual hole.

    摘要翻译: 在计算孔的凹凸的方法中,设定实际孔的中心坐标。 实际孔的内壁坐标是从实际孔的中心坐标得到的。 基于实际孔的内壁坐标确定实际孔的面积。 基于实际孔的面积确定虚拟孔的半径。 基于实际孔的内壁坐标来确定虚拟孔的中心坐标,以获得虚拟孔的圆周线。 计算实际孔相对于虚拟孔的圆周线的内壁坐标的标准偏差,从而获得实际孔的凹凸。