公开(公告)号：US20060036418A1

公开(公告)日：2006-02-16

申请号：US10916851

申请日：2004-08-12

Applicant: Jorge Pita ,  James Tan ,  Larry Fung ,  Ali Dogru

Inventor： Jorge Pita ,  James Tan ,  Larry Fung ,  Ali Dogru

IPC: G06G7/48

CPC classification number: E21B49/00

Abstract: A fully-parallelized, highly-efficient compositional implicit hydrocarbon reservoir simulator is provided. The simulator is capable of solving giant reservoir models, of the type frequently encountered in the Middle East and elsewhere in the world, with fast turnaround time. The simulator may be implemented in a variety of computer platforms ranging from shared-memory and distributed-memory supercomputers to commercial and self-made clusters of personal computers. The performance capabilities enable analysis of reservoir models in full detail, using both fine geological characterization and detailed individual definition of the hydrocarbon components present in the reservoir fluids.

公开(公告)号：US06583501B2

公开(公告)日：2003-06-24

申请号：US09499021

申请日：2000-02-07

Applicant: Tai Chong Chai ,  Thiam Beng Lim ,  Yong Chua Teo ,  James Tan ,  Ray Camenforte ,  Eric Neo ,  Daniel Yap

Inventor： Tai Chong Chai ,  Thiam Beng Lim ,  Yong Chua Teo ,  James Tan ,  Ray Camenforte ,  Eric Neo ,  Daniel Yap

IPC: H01L23495

CPC classification number: H01L23/49503 ,  H01L23/3107 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A lead-frame for connecting and supporting an integrated circuit chip with a chip accommodating zone with inwardly extending ears for supporting the chip including minimum shoulder area, and having open crack and delamination stopping regions.

公开(公告)号：US20190287099A1

公开(公告)日：2019-09-19

申请号：US15924234

申请日：2018-03-18

Applicant: JAMES TAN

Inventor： JAMES TAN

IPC: G06Q20/38 ,  H04L9/06 ,  G06F16/23 ,  G06Q20/06

Abstract: In this disclosure, a method for the update of a distributed ledger of a cryptocurrency is presented whereby transaction data need only be broadcasted once in the cryptocurrency network, thereby reducing the bandwidth consumption of the consensus nodes in the network. This is achieved with a two-stage process where in the first stage, a consensus is reached on the transactions that were received from every consensus node in the network. In the second stage, each consensus node uses an identical predefined protocol to obtain a subset of transactions from the total set reached in the first stage, with the predefined protocol being any systematic and deterministic way of obtaining the subset of transactions that are valid such that no cryptocurrency address is overdrawn. A consensus is then reached by the network on the state of the updated ledger after inclusion of this subset of transactions in the distributed ledger.

公开(公告)号：US07375416B2

公开(公告)日：2008-05-20

申请号：US11406357

申请日：2006-04-19

Applicant: Danny Vallejo Retuta ,  Hien Boon Tan ,  Susanto Tanary ,  Anthony Yi Sheng Sun ,  Soon Huat James Tan

Inventor： Danny Vallejo Retuta ,  Hien Boon Tan ,  Susanto Tanary ,  Anthony Yi Sheng Sun ,  Soon Huat James Tan

IPC: H01L23/48

CPC classification number: H01L21/4842 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/49548 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/351 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A semiconductor package includes a plurality of first leads, each with a top outer portion removed from the lead and an outer end, and a plurality of second leads, each with a bottom outer portion removed from the lead and an outer end. The first and second leads alternate with each other along an edge of the package. Also, the outer ends of the first leads form a first row along the edge of the package and the outer ends of the second leads form a second row along the edge of the package. In one embodiment, the first and second rows are parallel to each other and an encapsulant covers at least a portion of the first and second leads.

Abstract translation: 半导体封装包括多个第一引线，每个第一引线具有从引线除去的顶部外部部分和外端，以及多个第二引线，每个引线具有从引线除去的底部外部部分和外部端部。 第一和第二引线沿着封装的边缘彼此交替。 此外，第一引线的外端沿着封装的边缘形成第一排，并且第二引线的外端沿着封装的边缘形成第二排。 在一个实施例中，第一和第二行彼此平行，并且密封剂覆盖第一和第二引线的至少一部分。

公开(公告)号：US20190236563A1

公开(公告)日：2019-08-01

申请号：US15881775

申请日：2018-01-28

Applicant: James Tan

Inventor： James Tan

IPC: G06Q20/06 ,  H04L29/06 ,  G06Q20/38

CPC classification number: G06Q20/0658 ,  G06Q20/3829 ,  G06Q2220/00 ,  H04L63/0272 ,  H04L63/0442 ,  H04L63/061

Abstract: In this disclosure, a method for the system of operation of a decentralized staking pool within a proof-of-stake cryptocurrency framework is presented. Stakeholders of a staking pool do not send their stakes to the staking pool. Instead, their association with the staking pool is validated and recorded by other nodes in the cryptocurrency network. Stakeholders who cannot afford expensive computing infrastructure may still participate via the staking pool in a high-throughput and dense network capable of processing tens of thousands of transactions per second with fast transaction confirmation times not limited by long message relay times over a broad and sparse network. After a staking pool has been accepted into the network, it may start validating transactions and participating in the consensus of the distributed ledger, with regular updates of its list of stakeholders to the network, as well as the crediting of transaction fees to its stakeholders.

公开(公告)号：US07476569B2

公开(公告)日：2009-01-13

申请号：US12113968

申请日：2008-05-02

Applicant: Danny Vallejo Retuta ,  Hien Boon Tan ,  Susanto Tanary ,  Anthony Yi Sheng Sun ,  Soon Huat James Tan

Inventor： Danny Vallejo Retuta ,  Hien Boon Tan ,  Susanto Tanary ,  Anthony Yi Sheng Sun ,  Soon Huat James Tan

IPC: H01L23/48

CPC classification number: H01L21/4842 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/49548 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/351 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A semiconductor package includes a plurality of first leads, each with a top outer portion removed from the lead and an outer end, and a plurality of second leads, each with a bottom outer portion removed from the lead and an outer end. The first and second leads alternate with each other along an edge of the package. Also, the outer ends of the first leads form a first row along the edge of the package and the outer ends of the second leads form a second row along the edge of the package. In one embodiment, the first and second rows are parallel to each other and an encapsulant covers at least a portion of the first and second leads.

Abstract translation: 半导体封装包括多个第一引线，每个第一引线具有从引线除去的顶部外部部分和外端，以及多个第二引线，每个引线具有从引线除去的底部外部部分和外部端部。 第一和第二引线沿着封装的边缘彼此交替。 此外，第一引线的外端沿着封装的边缘形成第一排，并且第二引线的外端沿着封装的边缘形成第二排。 在一个实施例中，第一和第二行彼此平行，并且密封剂覆盖第一和第二引线的至少一部分。

公开(公告)号：US20080199985A1

公开(公告)日：2008-08-21

申请号：US12113968

申请日：2008-05-02

Applicant: Danny Vallejo Retuta ,  Hien Boon Tan ,  Susanto Tanary ,  Anthony Yi Sheng Sun ,  Soon Huat James Tan

Inventor： Danny Vallejo Retuta ,  Hien Boon Tan ,  Susanto Tanary ,  Anthony Yi Sheng Sun ,  Soon Huat James Tan

IPC: H01L21/00

CPC classification number: H01L21/4842 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/49548 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/351 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A semiconductor package includes a plurality of first leads, each with a top outer portion removed from the lead and an outer end, and a plurality of second leads, each with a bottom outer portion removed from the lead and an outer end. The first and second leads alternate with each other along an edge of the package. Also, the outer ends of the first leads form a first row along the edge of the package and the outer ends of the second leads form a second row along the edge of the package. In one embodiment, the first and second rows are parallel to each other and an encapsulant covers at least a portion of the first and second leads.

Abstract translation: 半导体封装包括多个第一引线，每个第一引线具有从引线除去的顶部外部部分和外端，以及多个第二引线，每个引线具有从引线除去的底部外部部分和外部端部。 第一和第二引线沿着封装的边缘彼此交替。 此外，第一引线的外端沿着封装的边缘形成第一排，并且第二引线的外端沿着封装的边缘形成第二排。 在一个实施例中，第一和第二行彼此平行，并且密封剂覆盖第一和第二引线的至少一部分。

公开(公告)号：US06621151B1

公开(公告)日：2003-09-16

申请号：US09497421

申请日：2000-02-07

Applicant: Tai Chong Chai ,  Thiam Beng Lim ,  Yong Chua Teo ,  James Tan ,  Raymundo Camenforte ,  Eric Neo ,  Daniel Yap

Inventor： Tai Chong Chai ,  Thiam Beng Lim ,  Yong Chua Teo ,  James Tan ,  Raymundo Camenforte ,  Eric Neo ,  Daniel Yap

IPC: H01L2348

CPC classification number: H01L23/49503 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/29007 ,  H01L2224/32014 ,  H01L2224/32055 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A lead-frame for connecting and supporting an integrated circuit having an apertured frame with dimensions smaller than the corresponding dimensions of the chip so that chip-pad shoulder can be eliminated and the chip attach fillet is made remote from the chip corner.

Abstract translation: 一种用于连接和支撑集成电路的引线框架，该集成电路具有尺寸小于芯片的相应尺寸的有孔框架，使得可以消除芯片焊盘肩部并且芯片附接圆角远离芯片角落。