Stacked Die Packages
    7.
    发明申请
    Stacked Die Packages 有权
    堆叠模具包

    公开(公告)号:US20080054435A1

    公开(公告)日:2008-03-06

    申请号:US11846665

    申请日:2007-08-29

    IPC分类号: H01L23/02 H01L21/00

    摘要: A stacked die semiconductor package that includes a substrate with a plurality of adhesive portions arranged in a manner to create at least one gap between the adhesive portions. The package also includes a first semiconductor chip having a non-active surface in contact with the adhesive portions, and an active surface being electrically connected to the substrate. In the package, a second semiconductor chip the non-active surface of the second semiconductor chip is attached to the non-active surface of the first semiconductor chip by a layer of adhesive therebetween. The active surface of the second semiconductor chip is electrically connected to the substrate. An encapsulant material covers the first and second semiconductor chips and their associated electrical connections. The encapsulating material fills the at least one gap between the plurality of adhesive portions and thereby encapsulates the second semiconductor chip and its associated electrical connection.

    摘要翻译: 一种堆叠半导体封装,其包括具有以在粘合剂部分之间形成至少一个间隙的方式布置的多个粘合剂部分的基板。 封装还包括具有与粘合剂部分接触的非活性表面的第一半导体芯片,以及与该基板电连接的有源表面。 在封装中,第二半导体芯片的第二半导体芯片的第二半导体芯片的非有效表面通过它们之间的粘合剂层附着到第一半导体芯片的非有效表面。 第二半导体芯片的有源表面与基板电连接。 密封剂材料覆盖第一和第二半导体芯片及其相关联的电连接。 封装材料填充多个粘合剂部分之间的至少一个间隙,从而封装第二半导体芯片及其相关联的电连接。