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    METHOD FOR FABRICATING A SUBSTRATE PROVIDED WITH TWO ACTIVE AREAS WITH DIFFERENT SEMICONDUCTOR MATERIALS
    1.
    发明申请
    METHOD FOR FABRICATING A SUBSTRATE PROVIDED WITH TWO ACTIVE AREAS WITH DIFFERENT SEMICONDUCTOR MATERIALS 有权
    用不同半导体材料制作具有两个活性区域的基板的方法

    公开(公告)号：US20120108019A1

    公开(公告)日：2012-05-03

    申请号：US13280694

    申请日：2011-10-25

    申请人： Jean-Michel HARTMANN

    发明人： Jean-Michel HARTMANN

    IPC分类号： H01L21/336

    CPC分类号： H01L21/8258 ,  H01L21/76283 ,  H01L21/84 ,  H01L29/165

    摘要： A layer of second semiconductor material is deposited on the layer of first semiconductor material of a substrate. Two active areas are then defined by means of selective elimination of the first and second semiconductor materials. One of the two active areas is then covered by a protective material. The layer of second semiconductor material is then eliminated by means of selective elimination of material. A first active area comprising a main surface made from a first semiconductor material, and a second active area comprising a main surface made from second semiconductor material are thus obtained.

    摘要翻译： 在衬底的第一半导体材料层上沉积一层第二半导体材料。 然后通过选择性地消除第一和第二半导体材料来限定两个有效区域。 然后，两个活动区域之一被保护材料覆盖。 然后通过选择性消除材料来消除第二半导体材料层。 由此获得包括由第一半导体材料制成的主表面的第一有源区和包括由第二半导体材料制成的主表面的第二有源区。

    METHOD FOR PRODUCING STACKED AND SELF-ALIGNED COMPONENTS ON A SUBSTRATE
    2.
    发明申请
    METHOD FOR PRODUCING STACKED AND SELF-ALIGNED COMPONENTS ON A SUBSTRATE 有权
    在衬底上生产堆叠和自对准组件的方法

    公开(公告)号：US20100099233A1

    公开(公告)日：2010-04-22

    申请号：US12577379

    申请日：2009-10-12

    申请人： Romain Wacquez ,  Philippe Coronel ,  Vincent Destefanis ,  Jean-Michel Hartmann

    发明人： Romain Wacquez ,  Philippe Coronel ,  Vincent Destefanis ,  Jean-Michel Hartmann

    IPC分类号： H01L21/762

    CPC分类号： H01L21/84 ,  H01L21/76264 ,  H01L21/8221

    摘要： The invention relates to a method for producing stacked and self-aligned components on a substrate, comprising the following steps: forming a stack of layers on one face of the substrate, the stack comprising a first sacrificial layer, a second sacrificial layer and a superficial layer, selective etching of a zone of the first sacrificial layer, the second sacrificial layer and the superficial layer forming a bridge above the etched zone of the first sacrificial layer, depositing resin in the etched zone of the first sacrificial layer and on the superficial layer, lithography of the resin to leave remaining at least one zone of resin in the etched zone of the first sacrificial layer, in alignment with at least one resin zone on the superficial layer, replacing the eliminated resin in the etched zone of the first sacrificial layer and on the superficial layer with a material for confining the remaining resin, eliminating the remaining resin zones in the etched zone of the first sacrificial layer and on the superficial layer to provide zones dedicated to the production of components, forming elements of components in the dedicated zones, selective etching of a zone of the second sacrificial layer, the superficial layer forming a bridge above the etched zone of the second sacrificial layer.

    摘要翻译： 本发明涉及一种用于在衬底上制备堆叠和自对准部件的方法，包括以下步骤：在衬底的一个面上形成一叠层，所述堆叠包括第一牺牲层，第二牺牲层和表面 层，选择性蚀刻第一牺牲层的区域，第二牺牲层和表层在第一牺牲层的蚀刻区上形成桥，在第一牺牲层的蚀刻区和表层上沉积树脂 在所述第一牺牲层的所述蚀刻区中保留至少一个树脂区域，以与所述表面层上的至少一个树脂区域对准，替换所述第一牺牲层的所述蚀刻区域中被去除的树脂， 并且在表面层上具有用于限制剩余树脂的材料，消除了第一次牺牲的蚀刻区域中剩余的树脂区域 提供专用于生产部件的区域，在专用区域中形成部件的元件，选择性蚀刻第二牺牲层的区域，在第二蚀刻区域的蚀刻区域之上形成桥接的表面层 牺牲层。

    Method for fabricating a substrate provided with two active areas with different semiconductor materials
    3.
    发明授权
    Method for fabricating a substrate provided with two active areas with different semiconductor materials 有权
    制造具有两个具有不同半导体材料的有源区的衬底的方法

    公开(公告)号：US08486810B2

    公开(公告)日：2013-07-16

    申请号：US13280694

    申请日：2011-10-25

    申请人： Jean-Michel Hartmann

    发明人： Jean-Michel Hartmann

    IPC分类号： H01L21/20 ,  H01L21/36

    CPC分类号： H01L21/8258 ,  H01L21/76283 ,  H01L21/84 ,  H01L29/165

    摘要： A layer of second semiconductor material is deposited on the layer of first semiconductor material of a substrate. Two active areas are then defined by means of selective elimination of the first and second semiconductor materials. One of the two active areas is then covered by a protective material. The layer of second semiconductor material is then eliminated by means of selective elimination of material. A first active area comprising a main surface made from a first semiconductor material, and a second active area comprising a main surface made from second semiconductor material are thus obtained.

    摘要翻译： 在衬底的第一半导体材料层上沉积一层第二半导体材料。 然后通过选择性地消除第一和第二半导体材料来限定两个有效区域。 然后，两个活动区域之一被保护材料覆盖。 然后通过选择性消除材料来消除第二半导体材料层。 由此获得包括由第一半导体材料制成的主表面的第一有源区和包括由第二半导体材料制成的主表面的第二有源区。

    Method for producing stacked and self-aligned components on a substrate
    4.
    发明授权
    Method for producing stacked and self-aligned components on a substrate 有权
    在基板上制造层叠和自对准部件的方法

    公开(公告)号：US08110460B2

    公开(公告)日：2012-02-07

    申请号：US12577379

    申请日：2009-10-12

    申请人： Romain Wacquez ,  Philippe Coronel ,  Vincent Destefanis ,  Jean-Michel Hartmann

    发明人： Romain Wacquez ,  Philippe Coronel ,  Vincent Destefanis ,  Jean-Michel Hartmann

    IPC分类号： H01L21/8238

    CPC分类号： H01L21/84 ,  H01L21/76264 ,  H01L21/8221

    摘要： A method for producing stacked and self-aligned components on a substrate, including: providing a substrate made of monocrystalline silicon having one face enabling production of components, forming a stack of layers on the face of the substrate, selective etching by a gaseous mixture comprising gaseous HCl conveyed by a carrier gas and at a temperature between 450° C. and 900° C., depositing resin, implementing lithography of the resin, replacing resin eliminated during the lithography with a material for confining remaining resin, and forming elements of the components.

    摘要翻译： 一种用于在衬底上制备堆叠和自对准部件的方法，包括：提供由单晶硅制成的衬底，其具有能够生产部件的一个面，在衬底的表面上形成一叠层，通过气体混合物进行选择性蚀刻，所述气体混合物包括 通过载气输送的气态HCl，在450℃和900℃之间的温度下，沉积树脂，实现树脂的光刻，在光刻期间用用于限制剩余树脂的材料替代消除的树脂，并形成元素 组件。

    Process for fabricating semiconductor structures useful for the production of semiconductor-on-insulator substrates, and its applications
    5.
    发明申请
    Process for fabricating semiconductor structures useful for the production of semiconductor-on-insulator substrates, and its applications 审中-公开
    用于制造用于制造绝缘体上半导体基板的半导体结构的方法及其应用

    公开(公告)号：US20090087961A1

    公开(公告)日：2009-04-02

    申请号：US12236980

    申请日：2008-09-24

    申请人： Jean-Michel HARTMANN ,  Laurent VANDROUX

    发明人： Jean-Michel HARTMANN ,  Laurent VANDROUX

    IPC分类号： H01L21/02

    CPC分类号： H01L21/2007 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262

    摘要： The invention relates to a process for fabricating a semiconductor structure, which comprises: a step a) of providing an Si substrate having a front face and a rear face; and a step b) that includes the epitaxial deposition, on the front face of the Si substrate, of a thick Ge layer, of an SiGe virtual substrate or of a multilayer comprising at least one thick Ge layer or at least one SiGe virtual substrate, and which is characterized in that it further includes the deposition, on the rear face of the Si substrate, of a layer or a plurality of layers generating, on this rear face, flexural stresses that compensate for the flexural stresses that are exerted on the front face of said substrate after step b).The invention also relates to a process for fabricating semiconductor-on-insulator substrates implementing the above process.Applications in microelectronics and optoelectronics.

    摘要翻译： 本发明涉及一种制造半导体结构的方法，包括：a）提供具有正面和背面的Si衬底; 以及步骤b），其包括在Si衬底的前表面上的厚Ge层，SiGe虚拟衬底或包括至少一个厚Ge层或至少一个SiGe虚拟衬底的多层的外延沉积， 并且其特征在于，其还包括在Si衬底的后表面上沉积一层或多层，在该后表面上产生补偿施加在前面上的弯曲应力的弯曲应力 在步骤b）之后的所述衬底的表面。 本发明还涉及一种制造实现上述工艺的绝缘体上半导体衬底的方法。 微电子学与光电子学应用。