公开(公告)号：US06881675B2

公开(公告)日：2005-04-19

申请号：US10146864

申请日：2002-05-15

申请人： Jeng-Yang Pan ,  Chin-Te Huang ,  Chen-Yi Huang ,  Sheng-Wen Chen

发明人： Jeng-Yang Pan ,  Chin-Te Huang ,  Chen-Yi Huang ,  Sheng-Wen Chen

IPC分类号： H01L21/02 ,  H01L21/302 ,  H01L21/469

CPC分类号： H01L21/02087 ,  H01L21/02074 ,  H01L21/0209 ,  Y10T29/41

摘要： A method and system for reducing wafer edge residue following a chemical mechanical polishing operation. A semiconductor wafer can be polished utilizing a chemical mechanical polishing apparatus. Thereafter, an acid etch operation may be performed to remove a residue, such as tungsten (W), collected on the semiconductor wafer as a result of the chemical mechanical polishing operation. A spin etch operation removes residue from the edges of the semiconductor wafer following chemical mechanical polishing of the semiconductor wafer.

摘要翻译： 在化学机械抛光操作之后减少晶片边缘残留物的方法和系统。 可以利用化学机械抛光装置对半导体晶片进行抛光。 此后，作为化学机械抛光操作的结果，可以进行酸蚀刻操作以除去在半导体晶片上收集的诸如钨（W）的残留物。 旋转蚀刻操作在半导体晶片的化学机械抛光之后从半导体晶片的边缘去除残留物。

公开(公告)号：US20060205217A1

公开(公告)日：2006-09-14

申请号：US11078187

申请日：2005-03-10

申请人： Jeng-Yang Pan ,  Chin-Te Huang ,  Chen-Yi Huang ,  Sheng-Wen Chen

发明人： Jeng-Yang Pan ,  Chin-Te Huang ,  Chen-Yi Huang ,  Sheng-Wen Chen

IPC分类号： H01L21/306 ,  C23F1/00 ,  H01L21/302

CPC分类号： H01L21/3212 ,  C23F3/06

摘要： A method and system for reducing wafer edge residue following a chemical mechanical polishing operation. A semiconductor wafer can be polished utilizing a chemical mechanical polishing apparatus. Thereafter, an acid etch operation may be performed to remove a residue, such as tungsten (W), collected on the semiconductor wafer as a result of the chemical mechanical polishing operation. A spin etch operation removes residue from the edges of the semiconductor wafer following chemical mechanical polishing of the semiconductor wafer.

公开(公告)号：US06875705B2

公开(公告)日：2005-04-05

申请号：US10235193

申请日：2002-09-04

申请人： Chao-Jie Tsai ,  Jeng Yang Pan ,  Chin-Nan Wu ,  Meng-Chang Liu ,  Su-Yu Yeh

发明人： Chao-Jie Tsai ,  Jeng Yang Pan ,  Chin-Nan Wu ,  Meng-Chang Liu ,  Su-Yu Yeh

IPC分类号： H01L21/285 ,  H01L21/302 ,  H01L21/3213 ,  H01L21/461

CPC分类号： H01L21/32134 ,  H01L21/28518

摘要： A method for forming salicides with lower sheet resistance and increased sheet resistance uniformity over a semiconductor process wafer including providing a semiconductor process wafer having exposed silicon containing areas at a process surface; depositing a metal layer including at least one of cobalt and titanium over the process surface; carrying out at least one thermal annealing process to react the metal layer and silicon to form a metal silicide over the silicon containing areas; and, wet etching unsilicided areas of the metal layer with a wet etching solution including phosphoric acid (H3PO4), nitric acid (HNO3), and a carboxylic acid to leave salicides covering silicon containing areas at the process surface.

摘要翻译： 一种用于在半导体工艺晶片上形成具有较低的薄层电阻和增加的薄层电阻均匀性的硫化物的方法，包括提供在处理表面具有暴露的含硅区域的半导体工艺晶片; 在工艺表面上沉积包括钴和钛中的至少一种的金属层; 执行至少一个热退火工艺以使金属层和硅反应以在含硅区域上形成金属硅化物; 并用含有磷酸（H 3 PO 4），硝酸（HNO 3）和羧酸的湿蚀刻溶液湿法蚀刻金属层的无硅区域，以留下在工艺表面覆盖含硅区域的水杨酸盐。

公开(公告)号：US06794615B2

公开(公告)日：2004-09-21

申请号：US10013089

申请日：2001-12-07

申请人： Jeng-Yang Pan ,  Hung-Fa Chen

发明人： Jeng-Yang Pan ,  Hung-Fa Chen

IPC分类号： F27D1100

CPC分类号： H01L21/68

摘要： Semiconductor wafer tray positioning, such as can be used in rapid thermal processing (RTP), rapid thermal annealing (RTA), and other semiconductor fabrication processes, is disclosed. A housing, such as a quartz tube, to receive a wafer tray includes at least four positioning kits. Each positioning kit includes a primary outside edge and an inside edge. The primary outside edge at least substantially corresponds to an interior sidewall of the housing. The inside edge is opposite of the primary outside edge, and has a groove that at least substantially corresponds to a part of a frame of the wafer tray. The groove is receptive to the part of the frame of the wafer tray, to assist maintaining the wafer tray in a stable position when the tray is completely positioned in the housing.

摘要翻译： 半导体晶片托盘定位，例如可用于快速热处理（RTP），快速热退火（RTA）等半导体制造工艺。 用于接收晶片托盘的诸如石英管的壳体包括至少四个定位套件。 每个定位套件包括主外边缘和内边缘。 主外边缘至少基本上对应于壳体的内侧壁。 内边缘与主外边缘相对，并且具有至少基本对应于晶片托盘的框架的一部分的凹槽。 凹槽容纳晶片托架的框架的一部分，以便当托盘完全定位在壳体中时辅助将晶片托盘保持在稳定的位置。

公开(公告)号：US06530103B2

公开(公告)日：2003-03-11

申请号：US09886810

申请日：2001-06-21

申请人： Jeng-Yang Pan ,  Chia-Chun Wu ,  Wen-Fang Tang ,  Su-Yu Yeh ,  Huai-Tei Yang

发明人： Jeng-Yang Pan ,  Chia-Chun Wu ,  Wen-Fang Tang ,  Su-Yu Yeh ,  Huai-Tei Yang

IPC分类号： B08B1102

CPC分类号： B08B1/04 ,  B08B3/02 ,  Y10T279/11

摘要： A method for eliminating wafer breakage during a wafer transfer process in a grinding apparatus by a wafer transfer pad and an apparatus for conducting such method are disclosed. In the method, a surface of the vacuum pad, or the wafer transfer pad, that is formed of sintered ceramic is first cleaned by contacting a rotating brush and a spray of cleaning solvent. The invention further discloses an apparatus for eliminating wafer breakage during the wafer transfer process by a vacuum pad by incorporating a pressure regulating valve situated in the vacuum conduit such that a vacuum pressure applied can be regulated at a rate not higher than 30 psi/sec. to the surface of the wafer transfer pad.

摘要翻译： 公开了一种通过晶片传送垫和用于进行这种方法的装置在研磨装置中的晶片转移处理期间消除晶片断裂的方法。 在该方法中，首先通过旋转刷和清洁溶剂喷雾来清洁由烧结陶瓷形成的真空垫或晶片传送垫的表面。 本发明还公开了一种用于通过结合位于真空管道中的压力调节阀，通过真空垫在晶片转移过程中消除晶片断裂的装置，使得施加的真空压力可以以不高于30psi / sec的速率进行调节。 到晶片传送垫的表面。