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    Method for automatic generation of finite element mesh from IC layout data
    1.
    发明申请
    Method for automatic generation of finite element mesh from IC layout data 有权
    从IC布局数据自动生成有限元网格的方法

    公开(公告)号：US20070239419A1

    公开(公告)日：2007-10-11

    申请号：US11399893

    申请日：2006-04-07

    申请人： Fereydoon Dadkhah ,  John Dikeman ,  Gregory Hutchinson

    发明人： Fereydoon Dadkhah ,  John Dikeman ,  Gregory Hutchinson

    IPC分类号： G06F17/50

    CPC分类号： G06T17/20 ,  G06F17/5018 ,  G06F2217/80

    摘要： The present invention includes a method for performing a thermal analysis, including the steps of determining size and placement of each of a plurality of drivers on an integrated circuit device. The determined size and placement of each driver is stored as layout data and the layout data is converted into input for a finite element analysis program. The input is applied to the finite element analysis program, and the finite element analysis program is used to construct a finite element mesh of the integrated circuit device from the input. Additionally, material properties are assigned to the finite element mesh, and a thermal analysis is performed of the finite element mesh to generate data in a thermal analysis report.

    摘要翻译： 本发明包括一种用于执行热分析的方法，包括以下步骤：确定集成电路装置上的多个驱动器中的每一个的大小和布置。 确定每个驱动程序的大小和位置作为布局数据存储，并将布局数据转换为有限元分析程序的输入。 输入应用于有限元分析程序，有限元分析程序用于从输入构建集成电路器件的有限元网格。 另外，材料属性被分配给有限元网格，并且在有限元网格中执行热分析以在热分析报告中生成数据。

    Flip-chip interconnect with increased current-carrying capability
    2.
    发明申请
    Flip-chip interconnect with increased current-carrying capability 审中-公开
    倒装芯片互连具有增加的载流能力

    公开(公告)号：US20050046024A1

    公开(公告)日：2005-03-03

    申请号：US10961446

    申请日：2004-10-08

    申请人： Pankaj Mithal ,  William Higdon ,  Mark Gose ,  John Dikeman ,  Frank Stepniak

    发明人： Pankaj Mithal ,  William Higdon ,  Mark Gose ,  John Dikeman ,  Frank Stepniak

    IPC分类号： H01L23/485 ,  H01L23/528 ,  H01L21/44

    CPC分类号： H01L24/02 ,  H01L23/528 ,  H01L24/10 ,  H01L2224/0401 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14

    摘要： A metal runner that improves the current-carrying capability of solder bumps used to electrically connect a surface-mount circuit device to a substrate. The runner comprises at least one leg portion and a pad portion, with the pad portion having a continuous region and a plurality of separate electrical paths leading to and from the continuous region. The electrical paths are delineated in the pad portion by nonconductive regions defined in the pad portion, with at least some of the nonconductive regions extending into the leg portion. The multiple electrical paths split the current flow to and from the solder bump, distributing the current around the perimeter of the solder bump in a manner that reduces current density in regions of the solder bump where electromigration is most likely.

    摘要翻译： 金属流道，其提高用于将表面贴装电路器件电连接到衬底的焊料凸块的载流能力。 流道包括至少一个支腿部分和垫部分，其中该焊盘部分具有连续区域和连续区域的多个分开的电路径。 在焊盘部分中通过限定在焊盘部分中的非导电区域描绘电路径，其中至少一些非导电区域延伸到腿部。 多个电路径将电流流向和从焊料凸块分开，以在减少电子迁移最有可能的焊料凸块区域中的电流密度的方式将电流分布在焊料凸块的周边周围。