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公开(公告)号:US08915380B2
公开(公告)日:2014-12-23
申请号:US13518480
申请日:2010-12-23
IPC分类号: B01D17/032 , E03F5/16 , B01D17/02 , C02F1/40
CPC分类号: B01D17/0211 , B01D17/0214 , B01D2221/02 , C02F1/40 , E03F5/16
摘要: A separator 252 for immiscible liquids comprises a tank having an inlet, a separation chamber and an outlet chamber 262, with the inlet 12 feeding effluent into the separation chamber 28 at or below a maximum acceptable flow rate. The effluent is separated into a more dense and less dense fractions in the separation chamber 28. The separation chamber 28 is in communication with the outlet chamber 262, where the more dense fraction exits. An outlet 260 for the less dense fraction is in communication with the separation chamber 28 and has a lowermost exit level at which the less dense fluid exits. The more dense fluid cannot rise to the level of the lowermost level, and the height of the less dense fluid is such that it will exit through the outlet as the more dense fluid passes over the weir.
摘要翻译: 用于不混溶液体的分离器252包括具有入口,分离室和出口室262的罐,入口12以最大可接受的流速或低于最大可接受的流速将流出物送入分离室28。 流出物在分离室28中被分离成更致密和较不致密的馏分。分离室28与出口室262连通,其中更致密的馏分离开。 用于较不致密部分的出口260与分离室28连通并且具有最低出口水平,较不致密的流体在该出口水平处出口。 较稠密的流体不能上升到最低水平的水平,并且较不稠密的流体的高度使得当较稠密的流体越过堰时,它将通过出口离开。
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公开(公告)号:US08589629B2
公开(公告)日:2013-11-19
申请号:US12413124
申请日:2009-03-27
申请人: Jonathan Owen , Guhan Krishnan , Carl D. Dietz , Douglas Richard Beard , William K. Lewchuk , Alexander Branover
发明人: Jonathan Owen , Guhan Krishnan , Carl D. Dietz , Douglas Richard Beard , William K. Lewchuk , Alexander Branover
IPC分类号: G06F12/00
CPC分类号: G06F12/126 , G06F12/0804 , G06F12/084 , G06F12/0888
摘要: A system and method for data allocation in a shared cache memory of a computing system are contemplated. Each cache way of a shared set-associative cache is accessible to multiple sources, such as one or more processor cores, a graphics processing unit (GPU), an input/output (I/O) device, or multiple different software threads. A shared cache controller enables or disables access separately to each of the cache ways based upon the corresponding source of a received memory request. One or more configuration and status registers (CSRs) store encoded values used to alter accessibility to each of the shared cache ways. The control of the accessibility of the shared cache ways via altering stored values in the CSRs may be used to create a pseudo-RAM structure within the shared cache and to progressively reduce the size of the shared cache during a power-down sequence while the shared cache continues operation.
摘要翻译: 预期在计算系统的共享高速缓冲存储器中进行数据分配的系统和方法。 共享组相关高速缓存的每个缓存方式可以被多个源访问,诸如一个或多个处理器核,图形处理单元(GPU),输入/输出(I / O)设备或多个不同的软件线程。 共享高速缓存控制器基于所接收的存储器请求的相应源,启用或禁用对每个高速缓存路径的访问。 一个或多个配置和状态寄存器(CSR)存储用于改变对每个共享缓存方式的可访问性的编码值。 可以通过改变CSR中的存储值来控制共享缓存方式的可访问性,以在共享高速缓存内创建伪RAM结构,并且在断电序列期间逐渐减小共享高速缓存的大小,而共享高速缓存共享 缓存继续运行。
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公开(公告)号:US08435635B2
公开(公告)日:2013-05-07
申请号:US13056592
申请日:2009-07-27
申请人: A. Paul Alivisatos , Jonathan Owen
发明人: A. Paul Alivisatos , Jonathan Owen
IPC分类号: B32B5/16
CPC分类号: B82Y30/00 , B82Y40/00 , C09K11/883 , Y10T428/2991 , Y10T428/2993 , Y10T428/2995 , Y10T428/2996 , Y10T428/2998
摘要: A method is disclosed. The method includes obtaining a precursor nanoparticle comprising a base material and a first ligand attached to the base material, and reacting the precursor nanoparticle with a reactant comprising a silicon bond, thereby removing the first ligand.
摘要翻译: 公开了一种方法。 该方法包括获得包含基材和连接到基材的第一配体的前体纳米颗粒,并使前体纳米颗粒与包含硅键的反应物反应,由此除去第一配体。
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公开(公告)号:US20120166890A1
公开(公告)日:2012-06-28
申请号:US12977338
申请日:2010-12-23
IPC分类号: G06F11/08
CPC分类号: G06F11/08
摘要: A first in, first out (FIFO) queue includes logic to provide detection of operational errors in the FIFO queue. The FIFO queue includes entries to store data written to the FIFO queue and signature bits, each signature bit corresponding to one of the entries. A test pattern and a read signature register includes a number of bits greater than a depth of the FIFO queue. A comparator compares the test pattern to the read signature register and output an error signal indicating whether the test pattern matches the read signature register.
摘要翻译: 先进先出(FIFO)队列包括提供对FIFO队列中的操作错误的检测的逻辑。 FIFO队列包括用于存储写入FIFO队列的数据和签名位,每个签名位对应于其中一个条目。 测试模式和读取签名寄存器包括大于FIFO队列深度的位数。 比较器将测试模式与读取签名寄存器进行比较,并输出指示测试模式是否匹配读取签名寄存器的错误信号。
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公开(公告)号:US20070232254A1
公开(公告)日:2007-10-04
申请号:US11482211
申请日:2006-07-07
申请人: Paul Mackey , Paul Miranda , Larry Hewitt , Jonathan Owen
发明人: Paul Mackey , Paul Miranda , Larry Hewitt , Jonathan Owen
CPC分类号: G06F1/3203 , G06F1/3237 , G06F1/3287 , Y02D10/128 , Y02D10/171 , Y02D50/20
摘要: A first portion of a communication link is operated in a power savings mode at the same time that a second portion of the communication link is operated in a normal operational mode. For the first portion, a refresh mode is entered from the power savings mode in which one or more training patterns are transmitted over the first portion, while the second portion remains in the normal operational mode. An indication when to activate and deactivate the refresh mode may be sent over the second portion of the communication link. The refresh mode may be periodically entered from the power savings mode based on an interval register specifying the amount of time the communication link should remain in the power savings mode before a refresh occurs. In addition, the amount of time spent in the refresh mode may be programmable.
摘要翻译: 在通信链路的第二部分以正常操作模式操作的同时,通信链路的第一部分以省电模式操作。 对于第一部分,从功率节省模式输入刷新模式,其中在第一部分上发送一个或多个训练模式,而第二部分保持在正常操作模式。 激活和去激活刷新模式的指示可以在通信链路的第二部分上发送。 可以基于指定在刷新发生之前通信链路应该保持在省电模式的时间量的间隔寄存器,从省电模式周期性地进入刷新模式。 此外,在刷新模式下花费的时间量可以是可编程的。
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公开(公告)号:US20060267374A1
公开(公告)日:2006-11-30
申请号:US11137023
申请日:2005-05-25
申请人: Craig Jackson , Jonathan Owen
发明人: Craig Jackson , Jonathan Owen
IPC分类号: B60J5/00
CPC分类号: B60J5/06 , E05F15/43 , E05F15/431 , E05F2015/436 , E05Y2600/45 , E05Y2900/531 , E05Y2900/546 , E05Y2900/548
摘要: A power-actuated closure system is disclosed. The system includes a power-actuated closure panel having a leading edge. One or more non-contact optical sensing system(s) is/are affixed to the power-actuated closure panel. The sensing system is adapted to detect the presence of an obstruction in proximity to and in advance of the leading edge of the closure panel. The system also includes a control system that selectively controls the motion of the closure panel in response to signals received from the sensing system.
摘要翻译: 公开了一种动力闭合系统。 该系统包括具有前缘的动力闭合面板。 一个或多个非接触光学感测系统固定到动力驱动的闭合面板上。 感测系统适于在闭合面板的前缘附近和之前检测障碍物的存在。 该系统还包括控制系统,其响应于从感测系统接收的信号选择性地控制闭合面板的运动。
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公开(公告)号:US08645639B2
公开(公告)日:2014-02-04
申请号:US13600614
申请日:2012-08-31
申请人: Guhan Krishnan , Antonio Asaro , Don Cherepacha , Thomas R. Kunjan , Joerg Winkler , Ralf Flemming , Maurice B. Steinman , Jonathan Owen , John Kalamatianos
发明人: Guhan Krishnan , Antonio Asaro , Don Cherepacha , Thomas R. Kunjan , Joerg Winkler , Ralf Flemming , Maurice B. Steinman , Jonathan Owen , John Kalamatianos
IPC分类号: G06F13/18
CPC分类号: G06F13/161
摘要: A hierarchical memory request stream arbitration technique merges coherent memory request streams from multiple memory request sources and arbitrates the merged coherent memory request stream with requests from a non-coherent memory request stream. In at least one embodiment of the invention, a method of generating a merged memory request stream from a plurality of memory request streams includes merging coherent memory requests into a first serial memory request stream. The method includes selecting, by a memory controller circuit, a memory request for placement in the merged memory request stream from at least the first serial memory request stream and a merged non-coherent request stream. The merged non-coherent memory request stream is based on an indicator of a previous memory request selected for placement in the merged memory request stream.
摘要翻译: 分级存储器请求流仲裁技术将来自多个存储器请求源的相干存储器请求流合并,并且根据来自非相干存储器请求流的请求对合并的相干存储器请求流进行仲裁。 在本发明的至少一个实施例中,从多个存储器请求流生成合并存储器请求流的方法包括将相干存储器请求合并到第一串行存储器请求流中。 该方法包括由存储器控制器电路从至少第一串行存储器请求流和合并的非相干请求流中选择存储器请求,以供放置在合并的存储器请求流中。 合并的非相干存储器请求流基于选择用于放置在合并的存储器请求流中的先前存储器请求的指示符。
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公开(公告)号:US08583971B2
公开(公告)日:2013-11-12
申请号:US12977338
申请日:2010-12-23
IPC分类号: G11C29/00
CPC分类号: G06F11/08
摘要: A first in, first out (FIFO) queue includes logic to provide detection of operational errors in the FIFO queue. The FIFO queue includes entries to store data written to the FIFO queue and signature bits, each signature bit corresponding to one of the entries. A test pattern and a read signature register includes a number of bits greater than a depth of the FIFO queue. A comparator compares the test pattern to the read signature register and output an error signal indicating whether the test pattern matches the read signature register.
摘要翻译: 先进先出(FIFO)队列包括提供对FIFO队列中的操作错误的检测的逻辑。 FIFO队列包括用于存储写入FIFO队列的数据和签名位,每个签名位对应于其中一个条目。 测试模式和读取签名寄存器包括大于FIFO队列深度的位数。 比较器将测试模式与读取签名寄存器进行比较,并输出指示测试模式是否匹配读取签名寄存器的错误信号。
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公开(公告)号:US08266389B2
公开(公告)日:2012-09-11
申请号:US12431874
申请日:2009-04-29
申请人: Guhan Krishnan , Antonio Asaro , Don Cherepacha , Thomas R. Kunjan , Joerg Winkler , Ralf Flemming , Maurice B. Steinman , Jonathan Owen , John Kalamatianos
发明人: Guhan Krishnan , Antonio Asaro , Don Cherepacha , Thomas R. Kunjan , Joerg Winkler , Ralf Flemming , Maurice B. Steinman , Jonathan Owen , John Kalamatianos
IPC分类号: G06F13/18
CPC分类号: G06F13/161
摘要: A hierarchical memory request stream arbitration technique merges coherent memory request streams from multiple memory request sources and arbitrates the merged coherent memory request stream with requests from a non-coherent memory request stream. In at least one embodiment of the invention, a method of generating a merged memory request stream from a plurality of memory request streams includes merging coherent memory requests into a first serial memory request stream. The method includes selecting, by a memory controller circuit, a memory request for placement in the merged memory request stream from at least the first serial memory request stream and a merged non-coherent request stream. The merged non-coherent memory request stream is at least partially based on an indicator of a previous memory request selected for placement in the merged memory request stream.
摘要翻译: 分级存储器请求流仲裁技术将来自多个存储器请求源的相干存储器请求流合并,并且根据来自非相干存储器请求流的请求对合并的相干存储器请求流进行仲裁。 在本发明的至少一个实施例中,从多个存储器请求流生成合并存储器请求流的方法包括将相干存储器请求合并到第一串行存储器请求流中。 该方法包括由存储器控制器电路从至少第一串行存储器请求流和合并的非相干请求流中选择存储器请求,以供放置在合并的存储器请求流中。 合并的非相干存储器请求流至少部分地基于选择用于放置在合并的存储器请求流中的先前存储器请求的指示符。
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公开(公告)号:US20080149553A1
公开(公告)日:2008-06-26
申请号:US11941745
申请日:2007-11-16
IPC分类号: B01D24/48
CPC分类号: B01D17/005 , B01D17/0208 , B01D17/0211 , B01D17/0214 , B01D17/04 , C02F1/40 , C02F2103/002
摘要: A separator provides improvements for better separation of an effluent into constituent parts and greater ease of use. A tapered basket provides improved flow and better filtration. A baffle directs effluent into the basket with greater force. An asymmetrical flange prevents mis-orientation the basket and baffle. An improved oil valve provides a locking mechanism to prevent dislodging of the valve during cleaning. An alternative valve uses a sensor to sense an oil/water interface and close the oil valve appropriately. A top seal prevents leakage of effluent at connection points with the lid of the housing. An underground unit allows below floor level installation of the separator. A bidirectional unit can be reversed to provide flow in either direction. A dual purpose tank can be used to store both separated oil and oil from operations for common removal.
摘要翻译: 分离器提供改进以便将流出物更好地分离成组成部分并且更容易使用。 锥形篮提供改进的流动和更好的过滤。 挡板将流出物以更大的力引导到篮子中。 不对称的凸缘防止篮和挡板错位。 改进的油阀提供锁定机构以防止在清洁期间阀的移动。 替代阀使用传感器来感测油/水界面并适当关闭油阀。 顶部密封件防止在与壳体的盖的连接点处的流出物的泄漏。 一个地下单元允许隔板的地板下方安装。 双向单元可以反向以在任一方向上提供流动。 双用途罐可用于存储分离的油和油,以进行常规拆卸操作。
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