Electrically programmable fuse and fabrication method
    1.
    发明授权
    Electrically programmable fuse and fabrication method 有权
    电可编程保险丝和制造方法

    公开(公告)号:US08378447B2

    公开(公告)日:2013-02-19

    申请号:US13085632

    申请日:2011-04-13

    IPC分类号: H01L23/52

    摘要: An electrically programmable fuse includes an anode, a cathode, and a fuse link conductively connecting the cathode with the anode, which is programmable by applying a programming current. The anode and the fuse link each include a polysilicon layer and a silicide layer formed on the polysilicon layer, and the cathode includes the polysilicon layer and a partial silicide layer formed on a predetermined portion of the polysilicon layer of the cathode located adjacent to a cathode junction where the cathode and the fuse link meet.

    摘要翻译: 电可编程保险丝包括阳极,阴极和导电地连接阴极与阳极的熔断体,其可通过施加编程电流来编程。 阳极和熔丝链路各自包括形成在多晶硅层上的多晶硅层和硅化物层,并且阴极包括多晶硅层和形成在阴极的多晶硅层的预定部分上的部分硅化物层,其位于阴极附近 阴极和熔断体连接处的连接处。

    ELECTRICALLY PROGRAMMABLE FUSE AND FABRICATION METHOD
    3.
    发明申请
    ELECTRICALLY PROGRAMMABLE FUSE AND FABRICATION METHOD 有权
    电可编程保险丝和制造方法

    公开(公告)号:US20110186963A1

    公开(公告)日:2011-08-04

    申请号:US13085632

    申请日:2011-04-13

    IPC分类号: H01L23/525

    摘要: An electrically programmable fuse includes an anode, a cathode, and a fuse link conductively connecting the cathode with the anode, which is programmable by applying a programming current. The anode and the fuse link each include a polysilicon layer and a silicide layer formed on the polysilicon layer, and the cathode includes the polysilicon layer and a partial silicide layer formed on a predetermined portion of the polysilicon layer of the cathode located adjacent to a cathode junction where the cathode and the fuse link meet.

    摘要翻译: 电可编程保险丝包括阳极,阴极和导电地连接阴极与阳极的熔断体,其可通过施加编程电流来编程。 阳极和熔丝链路各自包括形成在多晶硅层上的多晶硅层和硅化物层,并且阴极包括多晶硅层和形成在阴极的多晶硅层的预定部分上的部分硅化物层,其位于阴极附近 阴极和熔断体连接处的连接处。

    THERMALLY CONTROLLED REFRACTORY METAL RESISTOR
    9.
    发明申请
    THERMALLY CONTROLLED REFRACTORY METAL RESISTOR 有权
    热控制的金属电阻器

    公开(公告)号:US20120146186A1

    公开(公告)日:2012-06-14

    申请号:US12962722

    申请日:2010-12-08

    IPC分类号: H01L27/06 H01L21/02

    摘要: A structure and method of fabricating the structure includes a semiconductor substrate having a top surface defining a horizontal direction and a plurality of interconnect levels stacked from a lowermost level proximate the top surface of the semiconductor substrate to an uppermost level furthest from the top surface. Each of the interconnect levels include vertical metal conductors physically connected to one another in a vertical direction perpendicular to the horizontal direction. The vertical conductors in the lowermost level being physically connected to the top surface of the substrate, and the vertical conductors forming a heat sink connected to the semiconductor substrate. A resistor is included in a layer immediately above the uppermost level. The vertical conductors being aligned under a downward vertical resistor footprint of the resistor, and each interconnect level further include horizontal metal conductors positioned in the horizontal direction and being connected to the vertical conductors.

    摘要翻译: 制造该结构的结构和方法包括:半导体衬底,其具有限定水平方向的顶表面和从最接近半导体衬底的顶表面的最底层到距离顶表面最远的最高水平层叠的多个互连层。 每个互连层包括在垂直于水平方向的垂直方向上彼此物理连接的垂直金属导体。 最底层的垂直导体物理地连接到衬底的顶表面,垂直导体形成连接到半导体衬底的散热片。 一个电阻器被包含在最上层的上方的层中。 垂直导体在电阻器的向下垂直电阻器占位面下对准,并且每个互连级别还包括位于水平方向上并且连接到垂直导体的水平金属导体。