公开(公告)号：US06281078B1

公开(公告)日：2001-08-28

申请号：US08993344

申请日：1997-12-18

申请人： Kent Kuohua Chang ,  Yuesong He ,  John Jianshi Wang ,  Ken Au

发明人： Kent Kuohua Chang ,  Yuesong He ,  John Jianshi Wang ,  Ken Au

IPC分类号： H01L21336

CPC分类号： H01L27/11521 ,  H01L21/28273 ,  H01L27/115

摘要： Polystringers that cause NAND-type memory core cells to malfunction are covered by ONO fence material. ONO fence is removed so that polystringers may then be removed more readily. A SiON layer, tungsten silicide layer, second polysilicon layer, ONO dielectric, and first polysilicon layer are successively removed from between NAND-type flash memory core cells leaving ONO fence that shields some first polysilicon layer material from removal. The device is next exposed to an hydrogen-fluoride solution to remove oxide-based materials, particularly ONO fence. Thereafter, the polystringers are exposed and may thus be removed more readily.

摘要翻译： 导致NAND型存储器核心单元故障的Polystringers被ONO栅栏材料覆盖。 ONO围栏被移除，从而可以更容易地去除多边形。 从NAND型闪速存储器核心单元之间连续地去除SiON层，硅化钨层，第二多晶硅层，ONO电介质和第一多晶硅层，留下ONO栅栏，屏蔽了一些第一多晶硅层材料的去除。 然后将该装置暴露于氟化氢溶液以除去氧化物基材料，特别是ONO栅栏。 此后，暴露多股线，因此可以更容易地被去除。

公开(公告)号：US06140246A

公开(公告)日：2000-10-31

申请号：US993444

申请日：1997-12-18

申请人： Kent Kuohua Chang ,  Ken Au ,  John Jianshi Wang

发明人： Kent Kuohua Chang ,  Ken Au ,  John Jianshi Wang

IPC分类号： H01L21/20 ,  H01L21/205 ,  H01L21/28 ,  H01L21/306 ,  H01L21/314 ,  H01L21/316 ,  H01L21/302

CPC分类号： H01L21/02126 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/02326 ,  H01L21/02337 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02491 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/28273 ,  H01L21/30604 ,  H01L21/3144 ,  H01L21/31608 ,  H01L21/3167

摘要： A polysilicon-based floating gate is formed so as to be resistant to oxidation that occurs during multiple thermo-cycles in fabrication. Accordingly, edge erase times in NOR-type memory devices may be minimized. Additionally, manufacture of oxidation resistant floating gates reduces variations in edge erase times among multiple NOR-type memory devices. A layer of amorphous silicon is deposited on a silicon substrate by directing silane, a phosphene and helium gas mixture, and ammonia at the surface of the silicon substrate thereby doping the amorphous silicon in situ. The amorphous silicon layer is then etched so as to overlap slightly with regions that will later correspond to the source and drain regions. Next, a lower oxide layer of an ONO dielectric is deposited and the device is heated. A thermo-cycle is eliminated by heating the amorphous silicon during formation of the oxide layer rather than immediately following its deposition. Later, the nitride and oxide layers of the ONO dielectric, a second polysilicon layer, a tungsten silicide layer, and SiON layers are successively formed.

摘要翻译： 形成基于多晶硅的浮栅，以便在制造中的多个热循环期间耐氧化。 因此，NOR型存储器件中的边沿擦除时间可以最小化。 此外，抗氧化浮动栅极的制造减少了多个NOR型存储器件之间的边缘擦除时间的变化。 通过在硅衬底的表面处引导硅烷，磷化氢和氦气混合物以及氨来沉积在硅衬底上的非晶硅层，从而原位掺杂非晶硅。 然后蚀刻非晶硅层，以便稍后与稍后对应于源极和漏极区的区域重叠。 接下来，沉积ONO电介质的低氧化物层，并加热该器件。 通过在形成氧化物层期间加热非晶硅而不是在其沉积之后立即消除热循环。 随后，依次形成ONO电介质，第二多晶硅层，硅化钨层和SiON层的氮化物层和氧化物层。

公开(公告)号：US5994239A

公开(公告)日：1999-11-30

申请号：US993343

申请日：1997-12-18

申请人： Kent Kuohua Chang ,  Hao Fang ,  Ken Au ,  David Chi

发明人： Kent Kuohua Chang ,  Hao Fang ,  Ken Au ,  David Chi

IPC分类号： H01L21/762 ,  H01L21/00

CPC分类号： H01L21/28273 ,  H01L21/76202 ,  H01L27/11521

摘要： Polystringers that cause NAND-type memory core cells to malfunction are removed. A SiON layer, tungsten silicide layer, second polysilicon layer, ONO dielectric, and first polysilicon layer are successively removed from between NAND-type flash memory core cells leaving ONO fence that shields some first polysilicon layer material from removal. Next, the device is exposed to oxygen gas in a high temperature environment to oxidize the surface of the device, and in particular to remove the polystringers.

摘要翻译： 导致NAND型存储器核心单元发生故障的聚束器被去除。 从NAND型闪速存储器核心单元之间连续地去除SiON层，硅化钨层，第二多晶硅层，ONO电介质和第一多晶硅层，留下ONO栅栏，屏蔽了一些第一多晶硅层材料的去除。 接下来，该装置在高温环境中暴露于氧气以氧化装置的表面，并且特别是去除多边形。