公开(公告)号：US20060249794A1

公开(公告)日：2006-11-09

申请号：US11122666

申请日：2005-05-04

Applicant: Young Teh ,  Yong Lee ,  Chung Lai ,  Wenhe Lin ,  Khee Lim ,  Wee Tan ,  John Sudijono ,  Hui Koh ,  Liang Hsia

Inventor： Young Teh ,  Yong Lee ,  Chung Lai ,  Wenhe Lin ,  Khee Lim ,  Wee Tan ,  John Sudijono ,  Hui Koh ,  Liang Hsia

IPC: H01L29/772 ,  H01L21/8238

CPC classification number: H01L21/823807 ,  H01L21/823864

Abstract: An example process to remove spacers from the gate of a NMOS transistor. A stress creating layer is formed over the NMOS and PMOS transistors and the substrate. In an embodiment, the spacers on gate are removed so that stress layer is closer to the channel of the device. The stress creating layer is preferably a tensile nitride layer. The stress creating layer is preferably a contact etch stop liner layer. In an embodiment, the gates, source and drain region have an silicide layer thereover before the stress creating layer is formed. The embodiment improves the performance of the NMOS transistors.

Abstract translation: 从NMOS晶体管的栅极去除间隔物的示例性过程。 在NMOS和PMOS晶体管和衬底上形成应力产生层。 在一个实施例中，栅极上的间隔物被去除，使得应力层更靠近器件的通道。 应力产生层优选为拉伸氮化物层。 应力产生层优选为接触蚀刻停止衬层。 在一个实施例中，栅极，源极和漏极区域在形成应力产生层之前具有硅化物层。 该实施例改善了NMOS晶体管的性能。

公开(公告)号：US20070056380A1

公开(公告)日：2007-03-15

申请号：US11162295

申请日：2005-09-06

Applicant: Victor Chan ,  Khee Lim

Inventor： Victor Chan ,  Khee Lim

IPC: G01B7/16

CPC classification number: G01R31/2648

Abstract: Methods of characterizing a mechanical stress level in a stressed layer of a transistor and a mechanical stress characterizing test structure are disclosed. In one embodiment, the test structure includes a first test transistor including a first stress level; and at least one second test transistor having a substantially different second stress level. A testing circuit can then be used to characterize the mechanical stress level by comparing performance of the first test transistor and the at least one second test transistor. The type of test structure depends on the integration scheme used. In one embodiment, at least one second test transistor is provided with a substantially neutral stress level and/or an opposite stress level from the first stress level. The substantially neutral stress level may be provided by either rotating the transistor, removing the stressed layer causing the stress level or de-stressing the stressed layer causing the stress layer.

Abstract translation: 公开了在晶体管的应力层中表征机械应力水平的方法和机械应力表征测试结构。 在一个实施例中，测试结构包括包括第一应力水平的第一测试晶体管; 以及至少一个具有基本上不同的第二应力水平的第二测试晶体管。 然后可以通过比较第一测试晶体管和至少一个第二测试晶体管的性能来测试电路来表征机械应力水平。 测试结构的类型取决于所使用的集成方案。 在一个实施例中，至少一个第二测试晶体管具有基本上中性的应力水平和/或与第一应力水平相反的应力水平。 基本中性的应力水平可以通过旋转晶体管来提供，去除施加应力的应力层，或者使应力层的应力层解除应力层。

公开(公告)号：US20070013904A1

公开(公告)日：2007-01-18

申请号：US11182440

申请日：2005-07-15

Applicant: Chee Chia ,  Joh Ng ,  Khee Lim

Inventor： Chee Chia ,  Joh Ng ,  Khee Lim

IPC: G01N21/00

CPC classification number: G01N21/255 ,  G01J3/50 ,  G01J3/501 ,  G01J3/51 ,  G01J3/513 ,  G01J3/524

Abstract: In one embodiment, apparatus for characterizing a target is provided with a plurality of light sources that are positioned to illuminate a target. The light sources emit different wavelengths of light. A color sensor is positioned to receive and sense different wavelengths of light reflected from the target. A control system is operably associated with the plurality of light sources and the color sensor to A) in a calibration mode, operate the light sources and separately regulate drive signals of light sources emitting different wavelengths of light, in response to outputs of the color sensor, and B) in an operational mode, i) operate the light sources using the regulated drive signals, and ii) characterize the target in response to data output from the color sensor. A textile characterization system is also disclosed.

Abstract translation: 在一个实施例中，用于表征目标的装置设置有被定位成照射目标的多个光源。 光源发出不同波长的光。 定位颜色传感器以接收和感测从目标反射的不同波长的光。 控制系统与校准模式中的多个光源和颜色传感器可操作地相关联，以响应于颜色传感器的输出来操作光源并且分别调节发射不同波长的光的光源的驱动信号 和B）处于操作模式，i）使用调节的驱动信号来操作光源，以及ii）响应于从颜色传感器输出的数据来表征目标。 还公开了纺织品表征系统。

公开(公告)号：US20070138564A1

公开(公告)日：2007-06-21

申请号：US11304455

申请日：2005-12-15

Applicant: Khee Lim ,  Victor Chan ,  Eng Lim ,  Wenhe Lin ,  Jamin Fen

Inventor： Khee Lim ,  Victor Chan ,  Eng Lim ,  Wenhe Lin ,  Jamin Fen

IPC: H01L21/8238 ,  H01L29/78

CPC classification number: H01L21/823807 ,  H01L21/3003 ,  H01L21/76802 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76895 ,  H01L21/823864 ,  H01L29/7843

Abstract: A method for forming a device with both PFET and NFET transistors using a PFET compressive etch stop liner and a NFET tensile etch stop liner and two anneals in a deuterium containing atmosphere. The method comprises: providing a NFET transistor in a NFET region and a PFET transistor in a PFET region. We form a NFET tensile contact etch-stop liner over the NFET region. Then we perform a first deuterium anneal. We form a PFET compressive etch stop liner over the PFET region. We form a (ILD) dielectric layer with contact openings over the substrate. We perform a second deuterium anneal. The temperature of the second deuterium anneal is less than the temperature of the first deuterium anneal.

Abstract translation: 使用PFET压缩蚀刻停止衬垫和NFET拉伸蚀刻停止衬垫以及在含氘气氛中的两个退火来形成具有PFET和NFET晶体管的器件的方法。 该方法包括：在PFET区域中的NFET区域中提供NFET晶体管和PFET晶体管。 我们在NFET区域上形成NFET拉伸接触蚀刻停止衬垫。 然后我们进行第一次氘退火。 我们在PFET区域上形成PFET压电蚀刻停止衬垫。 我们在衬底上形成具有接触开口的（ILD）电介质层。 我们进行第二次氘退火。 第二次氘退火的温度小于第一次氘退火的温度。

公开(公告)号：US20070046942A1

公开(公告)日：2007-03-01

申请号：US11216476

申请日：2005-08-31

Applicant: Joh Ng ,  Khee Lim ,  Chee Chia ,  Selvan Maniam

Inventor： Joh Ng ,  Khee Lim ,  Chee Chia ,  Selvan Maniam

IPC: G01N21/00

CPC classification number: G01N21/251 ,  A47L15/4297 ,  D06F39/004 ,  G01N21/534

Abstract: A meter for measuring the turbidity of a fluid includes a light source for directing a light beam through a fluid under test towards a reflective surface and a sensor for detecting light reflected from the reflective surface and passing back through the fluid under test. The meter outputs a signal indicative of the turbidity of the fluid under test.

Abstract translation: 用于测量流体浊度的仪表包括用于将光束引导通过待测流体的光源到反射表面，以及用于检测从反射表面反射并从被测流体返回的光的传感器。 仪表输出一个表示被测流体浊度的信号。

公开(公告)号：US20060252194A1

公开(公告)日：2006-11-09

申请号：US11122667

申请日：2005-05-04

Applicant: Khee Lim ,  Wenhe Lin ,  Chung Lai ,  Yong Lee ,  Liang Hsia ,  Young Teh ,  John Sudijono ,  Wee Tan ,  Hui Koh

Inventor： Khee Lim ,  Wenhe Lin ,  Chung Lai ,  Yong Lee ,  Liang Hsia ,  Young Teh ,  John Sudijono ,  Wee Tan ,  Hui Koh

IPC: H01L21/8238

CPC classification number: H01L21/823807 ,  H01L21/823864

Abstract: An example method embodiment forms spacers that create tensile stress on the substrate on both the PFET and NFET regions. We form PFET and NFET gates and form tensile spacers on the PFET and NFET gates. We implant first ions into the tensile PFET spacers to form neutralized stress PFET spacers. The neutralized stress PFET spacers relieve the tensile stress created by the tensile stress spacers on the substrate. This improves device performance.

Abstract translation: 示例性方法实施例形成在PFET和NFET区域上在衬底上产生拉伸应力的间隔物。 我们形成PFET和NFET栅极，并在PFET和NFET栅极上形成拉伸间隔物。 我们将第一离子注入拉伸的PFET间隔物中以形成中和的应力PFET间隔物。 中和的应力PFET间隔物减轻了由衬底上的拉伸应力间隔物产生的拉伸应力。 这提高了设备​​性能。