公开(公告)号：US20120217654A1

公开(公告)日：2012-08-30

申请号：US13292609

申请日：2011-11-09

申请人： Sang-Hoon SHIN ,  Kwan-Weon Kim

发明人： Sang-Hoon SHIN ,  Kwan-Weon Kim

IPC分类号： H01L27/10 ,  H01L21/78 ,  H01L21/50

CPC分类号： H01L22/20 ,  G11C5/04 ,  G11C29/08 ,  H01L21/561 ,  H01L22/14 ,  H01L24/94 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06593 ,  H01L2225/06596 ,  H01L2224/81

摘要： A semiconductor device includes a wafer comprising a chip that passes a test and a chip that does not pass a test, one or more first stacked chips that are stacked over the chip that passes a test, and one or more second stacked chips that are stacked over the chip that does not pass a test, wherein the second stacked chips comprise at least one between an chip that does not pass a test and a dummy chip.

摘要翻译： 半导体器件包括：晶片，其包括通过测试的芯片和不通过测试的芯片，堆叠在通过测试的芯片上的一个或多个第一堆叠芯片和堆叠的一个或多个第二堆叠芯片 在芯片上不通过测试，其中第二堆叠芯片包括不通过测试的芯片和虚设芯片之间的至少一个芯片。

公开(公告)号：US20120007631A1

公开(公告)日：2012-01-12

申请号：US13033845

申请日：2011-02-24

申请人： Ja Beom KOO ,  Kwan Weon KIM

发明人： Ja Beom KOO ,  Kwan Weon KIM

IPC分类号： H03K19/003

CPC分类号： G11C7/1051 ,  G11C7/1057 ,  G11C7/1072 ,  G11C8/08 ,  G11C29/02 ,  G11C29/022 ,  G11C29/028 ,  G11C29/50008 ,  G11C2207/2254

摘要： An integrated circuit for controlling data output impedance includes an address decoder, a selection signal decoder, and a transfer control unit. The address decoder is configured to decode an address signal and generate a selection mode signal and a first adjustment mode signal. The selection signal decoder is configured to decode a selection signal and generate an enable signal and a disable signal. The transfer control unit is configured to transfer a pull-up signal and a pull-down signal as a selection pull-up signal and a selection pull-down signal.

摘要翻译： 用于控制数据输出阻抗的集成电路包括地址解码器，选择信号解码器和传送控制单元。 地址解码器被配置为解码地址信号并产生选择模式信号和第一调整模式信号。 选择信号解码器被配置为对选择信号进行解码并产生使能信号和禁用信号。 传送控制单元被配置为传送上拉信号和下拉信号作为选择上拉信号和选择下拉信号。

公开(公告)号：US20100157696A1

公开(公告)日：2010-06-24

申请号：US12470836

申请日：2009-05-22

申请人： Seung Wook KWAK ,  Kwan Weon KIM

发明人： Seung Wook KWAK ,  Kwan Weon KIM

IPC分类号： G11C7/00 ,  G11C8/00

CPC分类号： G11C7/1006 ,  G11C7/02 ,  G11C7/1048

摘要： A semiconductor memory apparatus includes a data bus inversion (DBI) section configured to receive a plurality of input data and decide whether to invert or output, without an inversion, the plurality of input data depending upon logic levels of the plurality of data, and further configured to generate a plurality of inversion data based on the decision; and a data output section configured to receive the plurality of inversion data, invert or output, without an inversion the plurality of inversion data in response to a mode signal, and generate a plurality of output data.

摘要翻译： 一种半导体存储装置，包括：数据总线反相（DBI）部分，被配置为接收多个输入数据，并根据多个数据的逻辑电平决定是否反转输出多个输入数据， 被配置为基于所述决定生成多个反转数据; 以及数据输出部，被配置为响应于模式信号而不反转或反转所述多个反转数据来反转或输出所述多个反转数据，并且生成多个输出数据。

公开(公告)号：US20090058458A1

公开(公告)日：2009-03-05

申请号：US12026465

申请日：2008-02-05

申请人： Kwan Weon Kim

发明人： Kwan Weon Kim

IPC分类号： H03K19/003 ,  H03M1/66

CPC分类号： G11C7/1051 ,  G11C7/1057 ,  H03M1/1057 ,  H03M1/808 ,  H04L25/0278

摘要： A digital-to-analogue converting circuit includes a driver leg having a plurality of resistance elements between a power supply voltage terminal and a ground voltage terminal, wherein at least one of the plurality of resistance elements is a variable resistor, and a code level changing unit for outputting a level-changed code to a control terminal of the variable resistor based on an activation of a digital code, wherein the level-changed code is produced by converting a level of the digital code.

摘要翻译： 数模转换电路包括在电源电压端和地电压端之间具有多个电阻元件的驱动器支脚，其中多个电阻元件中的至少一个是可变电阻器，并且代码电平变化 单元，用于基于数字代码的激活将电平变化的代码输出到可变电阻器的控制端子，其中通过转换数字代码的电平来产生电平变化的代码。

公开(公告)号：US07443738B2

公开(公告)日：2008-10-28

申请号：US10878831

申请日：2004-06-28

申请人： Seung Wook Kwack ,  Kwan Weon Kim

发明人： Seung Wook Kwack ,  Kwan Weon Kim

IPC分类号： G11C7/10

CPC分类号： G11C7/1066 ,  G11C7/1051

摘要： Provided is directed to a circuit for controlling data and a data strobe driver in a semiconductor memory device, including: a first delay unit for outputting a data signal with a variable delay; a DQ driver for outputting a data signal according to the data signal passed through the first delay unit and a driver select signal; a second delay unit for outputting a data strobe signal with a variable delay; and a DQS driver for outputting the data strobe signal passed through the second delay unit by being driven according to the driver select signal.

摘要翻译： 本发明涉及一种用于控制数据的电路和半导体存储器件中的数据选通驱动器，包括：用于输出具有可变延迟的数据信号的第一延迟单元; 用于根据通过第一延迟单元的数据信号输出数据信号的DQ驱动器和驱动器选择信号; 第二延迟单元，用于输出具有可变延迟的数据选通信号; 以及DQS驱动器，用于根据驱动器选择信号来驱动通过第二延迟单元的数据选通信号。

公开(公告)号：US20070285294A1

公开(公告)日：2007-12-13

申请号：US11647482

申请日：2006-12-29

申请人： Kwan Weon Kim

发明人： Kwan Weon Kim

IPC分类号： H03M1/78

CPC分类号： G11C5/143

摘要： An apparatus for generating a reference voltage of a semiconductor integrated circuit includes a resistance control unit that adjusts at least one an adjustment code such that at least one set of resistors, which have resistances determined according to the at least one adjustment code have predetermined resistances, a voltage level control unit that generates a selection code for selecting the level of a final reference voltage under external control and outputs the generated selection code, and a reference voltage generating unit that converts a power supply voltage according to the adjustment code and the selection code and outputs the final reference voltage.

摘要翻译： 一种用于产生半导体集成电路的参考电压的装置包括：电阻控制单元，其调整至少一个调整代码，使得至少一组具有根据至少一个调整代码确定的电阻的电阻器具有预定电阻， 电压电平控制单元，其生成用于选择外部控制下的最终参考电压的电平的选择码，并输出所生成的选择码;以及参考电压生成单元，其根据调整码和选择码转换电源电压 并输出最终参考电压。

公开(公告)号：US07227403B2

公开(公告)日：2007-06-05

申请号：US11108493

申请日：2005-04-18

申请人： Kwan Weon Kim

发明人： Kwan Weon Kim

IPC分类号： G05F1/00

CPC分类号： H02M3/07 ,  G11C5/145

摘要： Disclosed is an internal voltage generator, which includes a detecting means for detecting a level of an internal voltage, an oscillator for generating a driving pulse signal in response to an output signal of the detecting means, a first driving unit for outputting a first pulse signal after receiving the driving pulse signal, a second driving unit for outputting a second pulse signal after receiving the driving pulse signal, and a pumping unit for changing a potential level of the internal voltage after selectively receiving one of the first pulse signal and the second pulse signal.

摘要翻译： 公开了一种内部电压发生器，其包括用于检测内部电压电平的检测装置，响应于检测装置的输出信号产生驱动脉冲信号的振荡器，第一驱动单元，用于输出第一脉冲信号 在接收到驱动脉冲信号之后的第二驱动单元，用于在接收到驱动脉冲信号之后输出第二脉冲信号;以及泵送单元，用于在选择性地接收第一脉冲信号和第二脉冲之一之后改变内部电压的电位电平 信号。

公开(公告)号：US06859412B1

公开(公告)日：2005-02-22

申请号：US10744993

申请日：2003-12-23

申请人： Seung Wook Kwack ,  Kwan Weon Kim

发明人： Seung Wook Kwack ,  Kwan Weon Kim

IPC分类号： G11C11/407 ,  G11C7/10 ,  G11C8/06 ,  G11C11/401

CPC分类号： G11C7/1057 ,  G11C7/1045 ,  G11C7/1051

摘要： A circuit for controlling driver strengths of a data and a data strobe in a semiconductor device comprising: a control signal generating unit which generates a first control signal in response to a first address code, generates a second control signal in response to a second address code, and generates a third control signal in response to a third address code; a data driver strength control unit which is selected in response to the first control signal, controls a driver strength of an input data in response to the second control signal, and finely adjusts the driver strength of the input data in response to the third control signal; and a data strobe driver strength control unit which is selected in response to the first control signal, controls a driver strength of an input data strobe in response to the second control signal, and finely adjusts the driver strength of the input data strobe in response to the third control signal.

摘要翻译： 一种用于控制半导体器件中的数据和数据选通的驱动器强度的电路，包括：控制信号产生单元，其响应于第一地址码产生第一控制信号，响应于第二地址码产生第二控制信号 并且响应于第三地址码产生第三控制信号; 响应于第一控制信号选择的数据驱动器强度控制单元响应于第二控制信号控制输入数据的驱动器强度，并且响应于第三控制信号精细地调整输入数据的驱动器强度 ; 以及响应于第一控制信号选择的数据选通驱动器强度控制单元，响应于第二控制信号控制输入数据选通的驱动器强度，并且响应于第二控制信号精确地调整输入数据选通的驱动器强度 第三控制信号。

公开(公告)号：US06717884B2

公开(公告)日：2004-04-06

申请号：US10198926

申请日：2002-07-22

申请人： Kwan-Weon Kim

发明人： Kwan-Weon Kim

IPC分类号： G11C800

CPC分类号： G11C7/1087 ,  G11C5/066 ,  G11C7/1072 ,  G11C7/1078 ,  G11C11/4082 ,  G11C2207/107

摘要： A synchronous memory device is capable of reducing the number of address pins by changing address input. The synchronous memory device includes at least one common pin receiving a first signal and a second signal, latch circuits coupled to the common pin, wherein the latch circuit latches the first and second signals and one of the latch circuits selectively outputs the first or second signal in response to first or second internal clock pulses, and a clock pulse generator for receiving an external clock signal and for producing the first and second internal clock pulses from the external clock signal.

摘要翻译： 同步存储器件能够通过改变地址输入来减少地址引脚的数量。 同步存储器件包括至少一个公共引脚，接收第一信号和第二信号，锁存电路耦合到公共引脚，其中锁存电路锁存第一和第二信号，其中一个锁存电路有选择地输出第一或第二信号 响应于第一或第二内部时钟脉冲，以及时钟脉冲发生器，用于接收外部时钟信号，并用于从外部时钟信号产生第一和第二内部时钟脉冲。

公开(公告)号：US08120416B2

公开(公告)日：2012-02-21

申请号：US12166085

申请日：2008-07-01

申请人： Kwan-Weon Kim ,  Jun-Ho Lee ,  Kun-Woo Park ,  Chang-Kyu Choi ,  Yong-Ju Kim ,  Sung-Woo Han ,  Jun-Woo Lee

发明人： Kwan-Weon Kim ,  Jun-Ho Lee ,  Kun-Woo Park ,  Chang-Kyu Choi ,  Yong-Ju Kim ,  Sung-Woo Han ,  Jun-Woo Lee

IPC分类号： H04B1/10

CPC分类号： H03K19/00369

摘要： A semiconductor integrated circuit can include a first voltage pad, a second voltage pad, and a voltage stabilizing unit that is connected between the first voltage pad and the second voltage pad. The first voltage pad can be connected to a first internal circuit, and the second voltage pad can be connected to a second internal circuit.

摘要翻译： 半导体集成电路可以包括连接在第一电压焊盘和第二电压焊盘之间的第一电压焊盘，第二电压焊盘和稳压单元。 第一电压焊盘可以连接到第一内部电路，并且第二电压焊盘可以连接到第二内部电路。