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15 条记录 (耗时 0.028 秒)

    Data compression and management
    1.
    发明授权
    Data compression and management 有权
    数据压缩和管理

    公开(公告)号：US09148172B2

    公开(公告)日：2015-09-29

    申请号：US13531090

    申请日：2012-06-22

    申请人： Troy A. Manning ,  Troy D. Larsen ,  Martin L. Culley ,  Jeffrey L. Meader ,  Steve G. Bard ,  Dean C. Eyres

    发明人： Troy A. Manning ,  Troy D. Larsen ,  Martin L. Culley ,  Jeffrey L. Meader ,  Steve G. Bard ,  Dean C. Eyres

    IPC分类号： H03M7/30

    CPC分类号： G06F3/0608 ,  G06F3/0661 ,  G06F3/0673 ,  H03M7/30 ,  H03M7/60 ,  H03M7/6082

    摘要： The present disclosure includes apparatuses and methods for data compression and management. A number of methods include receiving a number of data segments corresponding to a managed unit amount of data, determining a respective compressibility of each of the number of data segments, compressing each of the number of data segments in accordance with its respective determined compressibility, forming a compressed managed unit that includes compressed and/or uncompressed data segments corresponding to the number of data segments corresponding to the managed unit amount of data, and forming a page of data that comprises at least the compressed managed unit.

    摘要翻译： 本公开包括用于数据压缩和管理的装置和方法。 多种方法包括接收对应于被管理单元数据量的多个数据段，确定多个数据段中的每一个的相应可压缩性，根据其各自确定的压缩性来压缩数据段中的每一个，形成 压缩的被管理单元，其包括对应于与被管理单元数据量对应的数据段的数量的压缩和/或未压缩数据段，以及形成至少包括压缩的被管理单元的数据页。

    DATA COMPRESSION AND MANAGEMENT
    4.
    发明申请
    DATA COMPRESSION AND MANAGEMENT 有权
    数据压缩与管理

    公开(公告)号：US20130342375A1

    公开(公告)日：2013-12-26

    申请号：US13531090

    申请日：2012-06-22

    申请人： Troy A. Manning ,  Troy D. Larsen ,  Martin L. Culley ,  Jeffrey L. Meader ,  Steve G. Bard ,  Dean C. Eyres

    发明人： Troy A. Manning ,  Troy D. Larsen ,  Martin L. Culley ,  Jeffrey L. Meader ,  Steve G. Bard ,  Dean C. Eyres

    IPC分类号： H03M7/30

    CPC分类号： G06F3/0608 ,  G06F3/0661 ,  G06F3/0673 ,  H03M7/30 ,  H03M7/60 ,  H03M7/6082

    摘要： The present disclosure includes apparatuses and methods for data compression and management. A number of methods include receiving a number of data segments corresponding to a managed unit amount of data, determining a respective compressibility of each of the number of data segments, compressing each of the number of data segments in accordance with its respective determined compressibility, forming a compressed managed unit that includes compressed and/or uncompressed data segments corresponding to the number of data segments corresponding to the managed unit amount of data, and forming a page of data that comprises at least the compressed managed unit.

    摘要翻译： 本公开包括用于数据压缩和管理的装置和方法。 多种方法包括接收对应于被管理单元数据量的多个数据段，确定多个数据段中的每一个的相应可压缩性，根据其各自确定的压缩性来压缩数据段中的每一个，形成 压缩的被管理单元，其包括对应于与被管理单元数据量对应的数据段的数量的压缩和/或未压缩数据段，以及形成至少包括压缩的被管理单元的数据页。

    Disk controller architecture to allow on-the-fly error correction and write disruption detection
    6.
    发明授权
    Disk controller architecture to allow on-the-fly error correction and write disruption detection 有权
    磁盘控制器架构允许即时纠错和写入中断检测

    公开(公告)号：US07761770B2

    公开(公告)日：2010-07-20

    申请号：US11478244

    申请日：2006-06-29

    申请人： Troy D. Larsen ,  Adam T. Arnell ,  Martin L. Culley ,  Don W. Wallentine ,  Facil T. Feye

    发明人： Troy D. Larsen ,  Adam T. Arnell ,  Martin L. Culley ,  Don W. Wallentine ,  Facil T. Feye

    IPC分类号： H03M13/00

    CPC分类号： G11B20/18 ,  H03M13/2909 ,  H03M13/293

    摘要： Error correction in a disk drive is performed by error correction circuitry which accepts data read from a data storage medium. The error correction circuitry performs both block error correction in a first data domain and sector error correction in a second data domain. A sector FIFO buffer is used to facilitate the error correction in real time, or “on-the-fly.” The sector FIFO buffer also enables conversion of the corrected data to the first data domain. The error correction circuitry also generates an ECC block comprising a plurality of sectors and writes the ECC block. The circuitry generates a tag prior to writing the ECC block and adds the tag to each of a plurality of sectors. During a read operation, the circuitry detects a write disruption when the tags for all of the plurality of sectors in the ECC block are not identical.

    摘要翻译： 磁盘驱动器中的错误校正由接收从数据存储介质读取的数据的纠错电路执行。 纠错电路执行第一数据域中的块错误校正和第二数据域中的扇区纠错。 扇区FIFO缓冲器用于实时或“即时”地进行纠错。扇区FIFO缓冲器还能够将校正数据转换为第一数据域。 纠错电路还生成包括多个扇区的ECC块并写入ECC块。 电路在写入ECC块之前生成标签，并将标签添加到多个扇区中的每一个。 在读取操作期间，当ECC块中的所有多个扇区的标签不相同时，电路检测到写入中断。

    Automated, fault tolerant, zone sector mark generation method
    7.
    发明授权
    Automated, fault tolerant, zone sector mark generation method 失效
    自动，容错，区域扇区标记生成方法

    公开(公告)号：US5406426A

    公开(公告)日：1995-04-11

    申请号：US107452

    申请日：1993-08-17

    申请人： Martin L. Culley ,  Marvin DeForest

    发明人： Martin L. Culley ,  Marvin DeForest

    IPC分类号： G11B20/10 ,  G11B20/12 ,  G11B27/10 ,  G11B27/19 ,  G11B27/30 ,  G11B5/09

    CPC分类号： G11B27/3027 ,  G11B27/19

    摘要： The present invention includes a method, apparatus and disk format for implementation of the same to provide fault tolerant detection of ID fields for data sectors in order to eliminate errors caused by mis-alignment and mis-detection of hard sector marks. Logic is provided to initiate a time-out count at the completion of a hard sector count. The time-out count is specified to be a period of time within which a hard sector mark should be detected. If the time out count counts down and a hard sector mark is not detected, then a possible error situation arises and the fault tolerant process is initiated to compensate for the lack of detection of a hard sector mark. Thus, at the end of the time-out count, a small burst count is started. This small burst count is of a shorter duration than the original burst count utilized, but is long enough to bring the head assembly to the location in the sector at the beginning of the user data at which time the hard sector count is initiated to count down the user data locations for that hard sector. Thus, the beginning of the user data area will always be determined and errors due to ill-defined user data areas caused by mis-detection of an hard sector mark are avoided.

    摘要翻译： 本发明包括用于实现该方法，装置和盘格式以提供用于数据扇区的ID字段的容错检测，以便消除由于硬扇区标记的错误对准和错误检测而导致的错误。 提供逻辑以在完成硬扇区计数时启动超时计数。 超时计数被指定为应检测硬扇区标记的时间段。 如果超时计数倒计时，并且没有检测到硬扇区标记，则出现可能的错误情况，并启动容错过程以补偿缺少硬扇区标记的检测。 因此，在超时计数结束时，开始小的脉冲串计数。 这个小脉冲串计数的持续时间比原来的脉冲串计数要短，但是长度足以使头部组件在用户数据开始时到达扇区中的位置，此时硬扇区计数开始计数 该硬盘扇区的用户数据位置。 因此，将始终确定用户数据区域的开始，并避免由于硬扇区标记的错误检测而引起的不明确的用户数据区域的错误。

    MEMORY ADDRESS TRANSLATION
    10.
    发明申请
    MEMORY ADDRESS TRANSLATION 有权
    存储地址翻译

    公开(公告)号：US20120179853A1

    公开(公告)日：2012-07-12

    申请号：US12985787

    申请日：2011-01-06

    申请人： Troy A. Manning ,  Martin L. Culley ,  Troy D. Larsen

    发明人： Troy A. Manning ,  Martin L. Culley ,  Troy D. Larsen

    IPC分类号： G06F12/10

    CPC分类号： G06F12/1045 ,  G06F12/0246 ,  G06F12/0292 ,  G06F12/1009 ,  G06F12/1027 ,  G06F2212/1004 ,  G06F2212/7201 ,  Y02D10/13

    摘要： The present disclosure includes devices, systems, and methods for memory address translation. One or more embodiments include a memory array and a controller coupled to the array. The array includes a first table having a number of records, wherein each record includes a number of entries, wherein each entry includes a physical address corresponding to a data segment stored in the array and a logical address. The controller includes a second table having a number of records, wherein each record includes a number of entries, wherein each entry includes a physical address corresponding to a record in the first table and a logical address. The controller also includes a third table having a number of records, wherein each record includes a number of entries, wherein each entry includes a physical address corresponding to a record in the second table and a logical address.

    摘要翻译： 本公开包括用于存储器地址转换的装置，系统和方法。 一个或多个实施例包括存储器阵列和耦合到阵列的控制器。 阵列包括具有多个记录的第一表，其中每个记录包括多个条目，其中每个条目包括对应于阵列中存储的数据段的物理地址和逻辑地址。 控制器包括具有多个记录的第二表，其中每个记录包括多个条目，其中每个条目包括对应于第一表中的记录的物理地址和逻辑地址。 控制器还包括具有多个记录的第三表，其中每个记录包括多个条目，其中每个条目包括对应于第二表中的记录的物理地址和逻辑地址。