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12 条记录 (耗时 0.013 秒)

    Microelectronic structure having a hydrogen barrier layer
    1.
    发明授权
    Microelectronic structure having a hydrogen barrier layer 有权
    具有氢阻挡层的微电子结构

    公开(公告)号：US07276300B2

    公开(公告)日：2007-10-02

    申请号：US10476579

    申请日：2002-04-22

    申请人： Zvonimir Gabric ,  Walter Hartner ,  Matthias Krönke ,  Günther Schindler

    发明人： Zvonimir Gabric ,  Walter Hartner ,  Matthias Krönke ,  Günther Schindler

    IPC分类号： B32B9/00

    CPC分类号： H01L28/55 ,  H01L23/564 ,  H01L27/11502 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The invention relates to a microelectronic structure which provides improved protection of a hydrogen-sensitive dielectric against hydrogen contamination. According to the invention, the hydrogen sensitive dielectric (14) is covered at lest by an intermediate oxide (18), where material thickness is at lest five times the thickness of the hydrogen-sensitive dielectric. The intermediate oxide (18) simultaneously acts as an internal dielectric and is metabolized on its surface for this purpose. The intermediate oxide (18), which has a sufficient thickness absorbers the hydrogen that may be released during the deposition of a hydrogen barrier layer (22, 26), thus protecting the hydrogen-sensitive dielectric (14).

    摘要翻译： 本发明涉及一种微电子结构，其提供对氢敏感介质的改善的防止氢污染的保护。 根据本发明，氢敏电介质（14）几乎被中间氧化物（18）覆盖，其中材料厚度是氢敏电介质厚度的五倍。 中间氧化物（18）同时作为内部电介质，为此目的在其表面上代谢。 具有足够厚度的中间氧化物（18）吸收在氢阻挡层（22,26）的沉积过程中可释放的氢，从而保护感应电介质（14）。

    Method for structuring a silicon layer
    2.
    发明授权
    Method for structuring a silicon layer 失效
    硅层结构的方法

    公开(公告)号：US07439186B2

    公开(公告)日：2008-10-21

    申请号：US10463565

    申请日：2003-06-16

    申请人： Matthias Krönke ,  Laura Lazar

    发明人： Matthias Krönke ,  Laura Lazar

    IPC分类号： H01L21/302

    CPC分类号： H01L21/32137 ,  H01L21/3065 ,  H01L27/10888 ,  H01L27/10894

    摘要： A method for structuring a silicon layer applies lacquer mask onto the silicon layer, and the silicon layer is selectively etched relative to the lacquer mask using an etching gas mixture comprising SF6, HBr and He/O2. The openings etched into the silicon layer with this method comprise especially steep sidewalls. Over and above this, the etching selectivity relative to a lacquer mask is clearly improved.

    摘要翻译： 用于构造硅层的方法在硅层上施加漆掩模，并且使用包含SF 6，HBr和He / O的蚀刻气体混合物相对于漆掩模选择性地蚀刻硅层 > 2 。 利用该方法蚀刻到硅层中的开口尤其是陡峭的侧壁。 除此之外，相对于漆面的蚀刻选择性明显提高。

    Method for producing a semiconductor structure, and use of the method
    4.
    发明授权
    Method for producing a semiconductor structure, and use of the method 失效
    半导体结构的制造方法以及使用该方法

    公开(公告)号：US06809019B2

    公开(公告)日：2004-10-26

    申请号：US10261849

    申请日：2002-09-30

    申请人： Walter Hartner ,  Matthias Krönke

    发明人： Walter Hartner ,  Matthias Krönke

    IPC分类号： H01L213205

    CPC分类号： H01L28/91

    摘要： A method for producing a semiconductor structure includes applying at least one first layer, etching the first layer using a masking layer such that fences are produced, and, after removal of the masking layer and application of an auxiliary layer, the auxiliary layer and the fences are removed jointly except for a predetermined extent of the auxiliary layer. The present invention also relates to use of the method for producing spacers in a semiconductor structure.

    摘要翻译： 一种制造半导体结构的方法包括：施加至少一个第一层，使用掩模层蚀刻第一层以产生栅栏，并且在去除掩模层和施加辅助层之后，辅助层和栅栏 除了辅助层的预定范围外联合除去。 本发明还涉及在半导体结构中制造间隔物的方法的用途。

    Method for fabricating contacts for integrated circuits, and semiconductor component having such contacts
    7.
    发明授权
    Method for fabricating contacts for integrated circuits, and semiconductor component having such contacts 有权
    用于制造用于集成电路的触点的方法，以及具有这种触点的半导体部件

    公开(公告)号：US07265405B2

    公开(公告)日：2007-09-04

    申请号：US10754439

    申请日：2004-01-09

    申请人： Kae-Horng Wang ,  Ralf Staub ,  Matthias Krönke

    发明人： Kae-Horng Wang ,  Ralf Staub ,  Matthias Krönke

    IPC分类号： H01L29/94

    CPC分类号： H01L27/10888 ,  H01L21/76895 ,  H01L21/76897 ,  H01L27/10829

    摘要： One (or more) contacts are produced on one or more active areas of a semiconductor wafer, it being possible for one or more isolated control lines to be arranged on the active areas with which contact is to be made. The control lines may, for example, be gate lines. The semiconductor component is fabricated in the following way: application of a polysilicon layer to the semiconductor wafer, patterning of the polysilicon layer, in order to produce a polysilicon contact above the active area, the polysilicon contact at least partly covering the two control lines, application of a first insulator layer to the semiconductor wafer, with the polysilicon contact being embedded, partial removal of the first insulator layer, so that at least the upper surface of the polysilicon contact is uncovered, and application of a metal layer to the semiconductor wafer in order to make electrical contact with the polysilicon contact.

    摘要翻译： 在半导体晶片的一个或多个有源区上产生一个（或多个）触点，一个或多个隔离的控制线可以布置在与其进行接触的有源区上。 控制线可以例如是栅极线。 以下列方式制造半导体部件：向半导体晶片施加多晶硅层，构图多晶硅层，以在有源区上方产生多晶硅接触，多晶硅接触至少部分覆盖两个控制线， 将第一绝缘体层施加到半导体晶片，其中嵌入多晶硅接触部分地去除第一绝缘体层，使得至少多晶硅接触的上表面未被覆盖，以及向半导体晶片施加金属层 以便与多晶硅接触进行电接触。

    Method for fabricating contact-making connections
    8.
    发明授权
    Method for fabricating contact-making connections 有权
    制造接触连接方法

    公开(公告)号：US07183188B2

    公开(公告)日：2007-02-27

    申请号：US11033471

    申请日：2005-01-12

    申请人： Matthias Krönke ,  Joachim Patzer

    发明人： Matthias Krönke ,  Joachim Patzer

    IPC分类号： H01L21/3205 ,  H01L21/4763

    CPC分类号： H01L21/7684 ,  H01L21/76838 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76858

    摘要： The invention provides a method for fabricating contact-making connections, having the steps of: a) providing a substrate (101) with electronic circuit units (102a, 102b) arranged thereon, an intermediate layer (103) filling an interspace between the electronic circuit units (102a, 102b); an insulation layer (104) being deposited on the electronic circuit units (102a, 102b) and on the intermediate layer (103); a masking layer (105) being deposited on the insulation layer (104); and the masking layer (105) being patterned with a through-plating structure (106); b) patterning a contact-making region by means of the masking layer (105), a contact-making hole (112) being etched through the insulation layer (104) and the intermediate layer (103) as far as the substrate (101), a section of the substrate (101) being uncovered in accordance with the through-plating structure (106); c) filling the contact-making hole (112) with a through-plating material (108); d) polishing back the covering layer (107) deposited on the masking layer (105) as far as the masking layer (105); e) depositing a contact-making layer (109) on the masking layer (105) and the through-plating material, the contact-making layer (109) being electrically contact-connected with the through-plating material (108); and f) patterning the contact-making layer (109) together with the residual masking layer (105) in accordance with a structure of a contact-making layer mask (111) applied to the contact-making layer (109) in order to form interconnects as contact-making connections in a metallization plane (M).

    摘要翻译： 本发明提供了一种用于制造接触连接的方法，具有以下步骤：a）提供具有布置在其上的电子电路单元（102a，102b）的基板（101），填充中间层 电子电路单元（102a，102b）; 绝缘层（104）沉积在电子电路单元（102a，102b）上和中间层（103）上; 掩蔽层（105）沉积在绝缘层（104）上; 并且所述掩模层（105）用通孔结构（106）图案化; b）通过掩模层（105）图形化接触制造区域，通过绝缘层（104）和中间层（103）蚀刻到基底（101）的接触制造孔（112） 基板（101）的一部分根据贯通电镀结构（106）未覆盖; c）用穿孔材料（108）填充接触孔（112）; d）将沉积在掩蔽层（105）上的覆盖层（107）抛光至掩蔽层（105）; e）在所述掩蔽层（105）和所述通镀材料上沉积接触层（109），所述接触层（109）与所述通镀材料（108）电接触连接; 以及f）根据施加到接触层（109）的接触层掩模（111）的结构，使接触形成层（109）与残留掩模层（105）一起构图，以形成 作为金属化平面（M）中的接触连接。