公开(公告)号：US06818503B2

公开(公告)日：2004-11-16

申请号：US10186607

申请日：2002-07-01

申请人： Rainer Bruchhaus ,  Gerhard Enders ,  Walter Hartner ,  Igor Kasko ,  Matthias Krönke ,  Thomas Mikolajick ,  Nicolas Nagel ,  Michael Röhner ,  Volker Weinrich

发明人： Rainer Bruchhaus ,  Gerhard Enders ,  Walter Hartner ,  Igor Kasko ,  Matthias Krönke ,  Thomas Mikolajick ,  Nicolas Nagel ,  Michael Röhner ,  Volker Weinrich

IPC分类号： H01L218242

CPC分类号： H01L27/10855 ,  H01L28/60

摘要： A method of fabricating semiconductor memory devices is simplified by providing at least some plug regions, which are provided for contacting storage capacitor devices of a capacitor configuration, such that the plug regions have in each case a region that is elevated above the surface region of a passivation region.

摘要翻译： 通过提供至少一些插塞区域来简化制造半导体存储器件的方法，这些插塞区域被提供用于接触电容器配置的存储电容器器件，使得插塞区域在每种情况下都具有在 钝化区。

公开(公告)号：US06773986B2

公开(公告)日：2004-08-10

申请号：US10186662

申请日：2002-07-01

申请人： Rainer Bruchhaus ,  Gerhard Enders ,  Walter Hartner ,  Matthias Krönke ,  Thomas Mikolajick ,  Nicolas Nagel ,  Michael Röhner

发明人： Rainer Bruchhaus ,  Gerhard Enders ,  Walter Hartner ,  Matthias Krönke ,  Thomas Mikolajick ,  Nicolas Nagel ,  Michael Röhner

IPC分类号： H01L218242

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/55

摘要： To achieve a highest possible integration density in a semiconductor memory device having storage capacitors as storage elements, the method according to the invention forms the capacitor devices in substantially vertically extending fashion, to, as a result, achieve a substantially three-dimensional configuration and an configuration extending into the third dimension for the capacitor devices, a contact connection of the storage capacitors being formed after the production of the storage capacitors.

摘要翻译： 为了在具有存储电容器作为存储元件的半导体存储器件中实现最高可能的积分密度，根据本发明的方法以基本上垂直延伸的方式形成电容器器件，结果实现基本上三维配置和 配置延伸到用于电容器器件的第三维度中，在存储电容器的生产之后形成存储电容器的接触连接。

公开(公告)号：US06704219B2

公开(公告)日：2004-03-09

申请号：US10186645

申请日：2002-07-01

申请人： Rainer Bruchhaus ,  Gerhard Enders ,  Walter Hartner ,  Matthias Krönke ,  Thomas Mikolajick ,  Nicolas Nagel ,  Michael Röhner

发明人： Rainer Bruchhaus ,  Gerhard Enders ,  Walter Hartner ,  Matthias Krönke ,  Thomas Mikolajick ,  Nicolas Nagel ,  Michael Röhner

IPC分类号： G11C1122

CPC分类号： H01L27/11502 ,  H01L28/86

摘要： To manufacture FeRAM memories in a particularly space-saving fashion and, thus, increase the storage density, a manufacturing method forms at least some of the multiplicity of capacitor devices used as storage elements with a multiplicity of individual capacitors that are connected in parallel with one another. The individual capacitors have ferroelectric or paraelectric dielectric regions with different coercitive voltages such that there is a resulting multiplicity of storage states for each of the individual capacitors.

摘要翻译： 为了以特别节省空间的方式制造FeRAM存储器，因此增加存储密度，制造方法形成用作存储元件的多个电容器器件中的至少一些，其中多个单独的电容器与一个并联连接 另一个。 各个电容器具有不同强制电压的铁电或对称电介质区域，使得每个单独的电容器存在多个存储状态。

公开(公告)号：US06858492B2

公开(公告)日：2005-02-22

申请号：US10186597

申请日：2002-07-01

申请人： Rainer Bruchhaus ,  Gerhard Enders ,  Walter Hartner ,  Matthias Krönke ,  Thomas Mikolajick ,  Nicolas Nagel ,  Michael Röhner

发明人： Rainer Bruchhaus ,  Gerhard Enders ,  Walter Hartner ,  Matthias Krönke ,  Thomas Mikolajick ,  Nicolas Nagel ,  Michael Röhner

IPC分类号： H01L21/02 ,  H01L21/8246 ,  H01L27/115 ,  H01L21/8242

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/91

摘要： Capacitor devices are formed in an essentially vertically extending fashion in order to achieve an essentially three-dimensional configuration or a configuration extending into the third dimension. A contacting of plug regions is performed after producing the capacitor devices. Such capacitor devices provide an increased integration density in a semiconductor memory device.

摘要翻译： 电容器器件以基本上垂直延伸的方式形成，以便实现基本上三维配置或延伸到第三维度的配置。 在制造电容器装置之后，进行插塞区域的接触。 这种电容器器件在半导体存储器件中提供增加的集成密度。

公开(公告)号：US06495415B2

公开(公告)日：2002-12-17

申请号：US10027532

申请日：2001-12-26

申请人： Walter Hartner ,  Igor Kasko ,  Volker Weinrich ,  Frank Hintermaier ,  Günther Schindler ,  Hermann Wendt

发明人： Walter Hartner ,  Igor Kasko ,  Volker Weinrich ,  Frank Hintermaier ,  Günther Schindler ,  Hermann Wendt

IPC分类号： H01L218242

CPC分类号： B82Y30/00 ,  B82Y10/00 ,  H01L21/76838 ,  H01L27/10852 ,  H01L28/60

摘要： A method for fabricating a patterned layer from a layer material. The method includes steps of: providing a substrate with at least one target region and at least one migration region; applying a layer material; adding a material to the layer material; and performing a heat treatment such that the layer material migrates from the migration region to the target region and a layer which is self-aligned and self-patterned with respect to the target region is formed. The method has the advantage that the layer material, which can often only be etched with difficulty, does not have to be patterned directly. The desired structure of the layer is predetermined by preliminarily structuring the substrate into a target region and a migration region, and is produced by the migration of the layer material as a result of the heat treatment.

公开(公告)号：US06852240B2

公开(公告)日：2005-02-08

申请号：US09793350

申请日：2001-02-26

申请人： Walter Hartner ,  Günther Schindler ,  Volker Weinrich ,  Igor Kasko

发明人： Walter Hartner ,  Günther Schindler ,  Volker Weinrich ,  Igor Kasko

IPC分类号： H01L27/105 ,  H01L21/02 ,  H01L21/8246 ,  H01G13/00

CPC分类号： H01L28/55 ,  H01L28/60 ,  H01L28/75

摘要： A ferroelectric capacitor configuration is configured with at least two different coercitive voltages. A first electrode structure having a surface which forms at least two levels is firstly produced. A layer of ferroelectric material of varying thickness is deposited over the first electrode by spin coating. A second electrode structure is subsequently formed on the layer of ferroelectric material.

摘要翻译： 铁电电容器配置配置有至少两个不同的强制电压。 首先产生具有形成至少两个层的表面的第一电极结构。 通过旋涂在第一电极上沉积不同厚度的铁电材料层。 随后在铁电材料层上形成第二电极结构。

公开(公告)号：US06649483B2

公开(公告)日：2003-11-18

申请号：US09996959

申请日：2001-11-20

申请人： Walter Hartner ,  Volker Weinrich ,  Matthias Krönke

发明人： Walter Hartner ,  Volker Weinrich ,  Matthias Krönke

IPC分类号： H01L2120

CPC分类号： H01L28/40 ,  H01L21/76895 ,  H01L28/60 ,  H01L28/90

摘要： A method for fabricating a capacitor configuration in particular an FeRAM memory device includes the step of filling intermediate regions, which remain free after the formation of a capacitor device on a surface of a substrate, with at least one electrically insulating intermediate layer. The at least one electrically insulating intermediate layer is filled at least up to a level of a topmost layer of the capacitor device.

公开(公告)号：US07276300B2

公开(公告)日：2007-10-02

申请号：US10476579

申请日：2002-04-22

申请人： Zvonimir Gabric ,  Walter Hartner ,  Matthias Krönke ,  Günther Schindler

发明人： Zvonimir Gabric ,  Walter Hartner ,  Matthias Krönke ,  Günther Schindler

IPC分类号： B32B9/00

CPC分类号： H01L28/55 ,  H01L23/564 ,  H01L27/11502 ,  H01L2924/0002 ,  H01L2924/00

摘要： The invention relates to a microelectronic structure which provides improved protection of a hydrogen-sensitive dielectric against hydrogen contamination. According to the invention, the hydrogen sensitive dielectric (14) is covered at lest by an intermediate oxide (18), where material thickness is at lest five times the thickness of the hydrogen-sensitive dielectric. The intermediate oxide (18) simultaneously acts as an internal dielectric and is metabolized on its surface for this purpose. The intermediate oxide (18), which has a sufficient thickness absorbers the hydrogen that may be released during the deposition of a hydrogen barrier layer (22, 26), thus protecting the hydrogen-sensitive dielectric (14).

摘要翻译： 本发明涉及一种微电子结构，其提供对氢敏感介质的改善的防止氢污染的保护。 根据本发明，氢敏电介质（14）几乎被中间氧化物（18）覆盖，其中材料厚度是氢敏电介质厚度的五倍。 中间氧化物（18）同时作为内部电介质，为此目的在其表面上代谢。 具有足够厚度的中间氧化物（18）吸收在氢阻挡层（22,26）的沉积过程中可释放的氢，从而保护感应电介质（14）。

公开(公告)号：US06809019B2

公开(公告)日：2004-10-26

申请号：US10261849

申请日：2002-09-30

申请人： Walter Hartner ,  Matthias Krönke

发明人： Walter Hartner ,  Matthias Krönke

IPC分类号： H01L213205

CPC分类号： H01L28/91

摘要： A method for producing a semiconductor structure includes applying at least one first layer, etching the first layer using a masking layer such that fences are produced, and, after removal of the masking layer and application of an auxiliary layer, the auxiliary layer and the fences are removed jointly except for a predetermined extent of the auxiliary layer. The present invention also relates to use of the method for producing spacers in a semiconductor structure.

摘要翻译： 一种制造半导体结构的方法包括：施加至少一个第一层，使用掩模层蚀刻第一层以产生栅栏，并且在去除掩模层和施加辅助层之后，辅助层和栅栏 除了辅助层的预定范围外联合除去。 本发明还涉及在半导体结构中制造间隔物的方法的用途。

公开(公告)号：US06586348B2

公开(公告)日：2003-07-01

申请号：US09850585

申请日：2001-05-07

申请人： Walter Hartner ,  Günther Schindler ,  Frank Hintermaier ,  Volker Weinrich

发明人： Walter Hartner ,  Günther Schindler ,  Frank Hintermaier ,  Volker Weinrich

IPC分类号： H01L2131

CPC分类号： H01L21/02197 ,  H01L21/02356 ,  H01L21/31122 ,  H01L21/31691 ,  H01L21/32136 ,  H01L28/55

摘要： After an SBT layer is precipitated onto a substrate, the SBT layer is structured as a still amorphous layer. Only subsequently is it subjected to a crystallization process. Layers produced in this manner have a relatively high degree of dielectric strength and have no stoichiometric deviations on the etched edges.

摘要翻译： 在SBT层沉积到衬底上之后，SBT层被构造为静止非晶层。 只有随后才进行结晶过程。 以这种方式生产的层具有相对高的介电强度，并且在蚀刻的边缘上不具有化学计量偏差。