公开(公告)号：US07498789B2

公开(公告)日：2009-03-03

申请号：US11516538

申请日：2006-09-07

申请人： Ming-Han Lee

发明人： Ming-Han Lee

IPC分类号： G05F1/56

CPC分类号： H02M1/32 ,  H02M3/156

摘要： A switching regulator with over-current protection is disclosed. The invention comprises an error amplifier, a pulse width modulator, an over-current protection unit, a gate driver, a tank circuit and a load. According to the invention, the variation of the output current outside a chip is detected and controlled by monitoring the voltage level of the error signal for over-current protection, thus reducing power dissipation caused by an additive resistor and raising efficiency of voltage conversion.

摘要翻译： 公开了一种具有过电流保护功能的开关稳压器。 本发明包括误差放大器，脉宽调制器，过流保护单元，栅极驱动器，储能电路和负载。 根据本发明，通过监视用于过电流保护的误差信号的电压电平来检测和控制芯片外的输出​​电流的变化，从而降低由添加电阻引起的功率耗散并提高电压转换的效率。

公开(公告)号：US07402988B2

公开(公告)日：2008-07-22

申请号：US11360687

申请日：2006-02-24

申请人： Pao-Cheng Chiu ,  Chieh-Min Feng ,  Ming-Han Lee

发明人： Pao-Cheng Chiu ,  Chieh-Min Feng ,  Ming-Han Lee

IPC分类号： G05F1/24

CPC分类号： H02M3/157 ,  H02M3/1588 ,  Y02B70/1466

摘要： A switching regulator includes a reference voltage generator and a switching-regulating module. The reference voltage generator receives a digital control signal and generates a reference voltage according to the digital control signal. The switching-regulating module is connected to the reference voltage generator and generates an output voltage according to the reference voltage. The value of the digital control signal is gradually increased to make the reference voltage being gradually increased at the initial stage of the activation of the switching regulator.

摘要翻译： 开关调节器包括参考电压发生器和开关调节模块。 参考电压发生器接收数字控制信号并根据数字控制信号产生参考电压。 开关调节模块连接到参考电压发生器，并根据参考电压产生输出电压。 数字控制信号的值逐渐增加，使得参考电压在开关调节器的激活的初始阶段逐渐增加。

公开(公告)号：US20140027908A1

公开(公告)日：2014-01-30

申请号：US13559107

申请日：2012-07-26

申请人： Cheng-Hsiung Tsai ,  Chung-Ju Lee ,  Tsung-Jung Tsai ,  Hsiang-Huan Lee ,  Ming Han Lee

发明人： Cheng-Hsiung Tsai ,  Chung-Ju Lee ,  Tsung-Jung Tsai ,  Hsiang-Huan Lee ,  Ming Han Lee

IPC分类号： H01L21/768 ,  H01L23/535

CPC分类号： H01L23/5226 ,  H01L21/76802 ,  H01L21/7682 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76885 ,  H01L23/5222 ,  H01L23/528 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/00 ,  H01L2924/0002

摘要： A copper alloy layer is blanket deposited over a low k dielectric layer and in via openings within the low k dielectric layer. The blanket deposited layer is then anisotropically etch to form horizontal interconnects. The interconnects are annealed to form a metal oxide barrier lining. A second low k dielectric layer is then depositing over the horizontal interconnects. Air gaps can be formed between adjacent interconnects to lower parasitic capacitance therebetween.

摘要翻译： 铜合金层被覆盖在低k电介质层和低k电介质层内的通孔中。 然后将覆盖层沉积层各向异性地蚀刻以形成水平互连。 将互连件退火以形成金属氧化物屏障衬里。 然后第二低k电介质层在水平互连上沉积。 可以在相邻互连之间形成气隙，以降低它们之间的寄生电容。

公开(公告)号：US20110024908A1

公开(公告)日：2011-02-03

申请号：US12845852

申请日：2010-07-29

申请人： Hsiang-Huan Lee ,  Ming Han Lee ,  Ming-Shih Yeh ,  Chen-Hua Yu ,  Shau-Lin Shue

发明人： Hsiang-Huan Lee ,  Ming Han Lee ,  Ming-Shih Yeh ,  Chen-Hua Yu ,  Shau-Lin Shue

IPC分类号： H01L23/52 ,  H01L21/4763

CPC分类号： H01L23/53238 ,  H01L21/28562 ,  H01L21/76846 ,  H01L21/76867 ,  H01L21/76873 ,  H01L21/76883 ,  H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

摘要： The structures and methods described above provide mechanisms to improve interconnect reliability and resistivity. The interconnect reliability and resistivity are improved by using a composite barrier layer, which provides good step coverage, good copper diffusion barrier, and good adhesion with adjacent layers. The composite barrier layer includes an ALD barrier layer to provide good step coverage. The composite barrier layer also includes a barrier-adhesion-enhancing film, which contains at least an element or compound that contains Mn, Cr, V, Ti, or Nb to improve adhesion. The composite barrier layer may also include a Ta or Ti layer between the ALD barrier layer and the barrier-adhesion-enhancing layer.

摘要翻译： 上述结构和方法提供了提高互连可靠性和电阻率的机制。 通过使用复合阻挡层来提高互连的可靠性和电阻率，该复合阻挡层提供良好的台阶覆盖率，良好的铜扩散阻挡层和与相邻层的良好粘附性。 复合阻挡层包括ALD阻挡层以提供良好的阶梯覆盖。 复合阻挡层还包括至少包含含有Mn，Cr，V，Ti或Nb的元素或化合物以提高粘合性的阻隔增粘膜。 复合阻挡层还可以包括在ALD阻挡层和阻挡增粘层之间的Ta或Ti层。

公开(公告)号：US07782222B2

公开(公告)日：2010-08-24

申请号：US11307958

申请日：2006-02-28

申请人： Ming-Han Lee ,  Tzung-Ming Chen

发明人： Ming-Han Lee ,  Tzung-Ming Chen

IPC分类号： G08B23/00

CPC分类号： G05F1/56 ,  H02M3/155 ,  H02M2001/0045 ,  H02M2001/009

摘要： A voltage regulating power supply includes: a switching regulator powered by a supply voltage level, the switching regulator for generating a first output voltage in accordance to a first reference voltage; and a linear regulator coupled to the first output voltage, the linear regulator for generating a second output voltage in accordance to a second reference voltage; wherein a noise sensitive circuit draws power from the second output voltage.

摘要翻译： 电压调节电源包括：由电源电压供电的开关调节器，用于根据第一参考电压产生第一输出电压的开关调节器; 以及耦合到所述第一输出电压的线性调节器，所述线性调节器用于根据第二参考电压产生第二输出电压; 其中噪声敏感电路从第二输出电压获取功率。

公开(公告)号：US20100153877A1

公开(公告)日：2010-06-17

申请号：US12332850

申请日：2008-12-11

申请人： Mika Antero Rautava ,  Ming Han Lee ,  Guido Grassel

发明人： Mika Antero Rautava ,  Ming Han Lee ,  Guido Grassel

IPC分类号： G06F3/048

CPC分类号： G06F9/451

摘要： A user interface for switching between applications is provided. The user interface comprises control means for executing a first and a second application, for displaying the first application as a main application, for receiving a first input and in response thereto displaying the second application as a main application. The user interface also comprises control means for executing a plurality of applications, and control means for displaying one of said applications, for receiving a second input and for marking the displayed application as an alternate application.

摘要翻译： 提供用于在应用之间切换的用户界面。 用户界面包括用于执行第一和第二应用的控制装置，用于显示第一应用程序作为主应用程序，用于接收第一输入，并响应于此显示第二应用程序作为主要应用程序。 用户界面还包括用于执行多个应用的​​控制装置，以及用于显示所述应用程序之一的控制装置，用于接收第二输入并将所显示的应用程序标记为备选应用程序。

公开(公告)号：US07714755B2

公开(公告)日：2010-05-11

申请号：US11836771

申请日：2007-08-09

申请人： Ming-Han Lee

发明人： Ming-Han Lee

IPC分类号： H03M1/66

CPC分类号： H03M1/0604 ,  H03M1/742

摘要： A dynamic bias control circuit includes a current source, a first switch, a differential amplifier, and a third switch. The current source outputs a first current. The first switch is coupled to an output end of the current source for generating the first current. The differential amplifier includes a first input end for receiving a reference voltage and a second input end coupled to the first switch. The third switch is coupled to an output end of the differential amplifier and to the first end of the first switch for adjusting a voltage at the first end of the first switch according to a result outputted from the differential amplifier. A control end of the first switch is coupled to a second switch. The second switch is used for inputting a second current into the second switch, wherein the second current to the first current is a predetermined ratio.

摘要翻译： 动态偏置控制电路包括电流源，第一开关，差分放大器和第三开关。 电流源输出第一个电流。 第一开关耦合到电流源的输出端，用于产生第一电流。 差分放大器包括用于接收参考电压的第一输入端和耦合到第一开关的第二输入端。 第三开关耦合到差分放大器的输出端和第一开关的第一端，用于根据从差分放大器输出的结果调节第一开关的第一端的电压。 第一开关的控制端耦合到第二开关。 第二开关用于将第二电流输入到第二开关中，其中到第一电流的第二电流是预定比率。

公开(公告)号：US20090218693A1

公开(公告)日：2009-09-03

申请号：US12112405

申请日：2008-04-30

申请人： Hsiang-Huan Lee ,  Ming Han Lee ,  Ming-Shih Yeh ,  Chen-Hua Yu

发明人： Hsiang-Huan Lee ,  Ming Han Lee ,  Ming-Shih Yeh ,  Chen-Hua Yu

IPC分类号： H01L23/52 ,  H01L21/4763

CPC分类号： H01L21/76843 ,  H01L21/76846 ,  H01L23/485 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor contact structure includes a copper plug formed within a dual damascene, single damascene or other opening formed in a dielectric material and includes a composite barrier layer between the copper plug and the sidewalls and bottom of the opening. The composite barrier layer preferably includes an ALD TaN layer disposed on the bottom and along the sides of the opening although other suitable ALD layers may be used. A barrier material is disposed between the copper plug and the ALD layer. The barrier layer may be a Mn-based barrier layer, a Cr-based barrier layer, a V-based barrier layer, a Nb-based barrier layer, a Ti-based barrier layer, or other suitable barrier layers.

摘要翻译： 半导体接触结构包括形成在双镶嵌，单镶嵌或形成在电介质材料中的其它开口的铜塞，并且包括铜塞与开口的侧壁和底部之间的复合阻挡层。 复合阻挡层优选地包括设置在开口的底部和沿着开口的侧面的ALD TaN层，尽管可以使用其它合适的ALD层。 阻挡材料设置在铜塞和ALD层之间。 阻挡层可以是基于Mn的阻挡层，Cr基阻挡层，V基阻挡层，Nb基阻挡层，Ti基阻挡层或其它合适的阻挡层。

公开(公告)号：US20090117731A1

公开(公告)日：2009-05-07

申请号：US11934005

申请日：2007-11-01

申请人： Chen-Hua Yu ,  Shau-Lin Shue ,  Chien-Hsueh Shih ,  Ming-Shih Yeh ,  Ming-Han Lee

发明人： Chen-Hua Yu ,  Shau-Lin Shue ,  Chien-Hsueh Shih ,  Ming-Shih Yeh ,  Ming-Han Lee

IPC分类号： H01L21/4763

CPC分类号： H01L21/76844 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76856 ,  H01L21/76867 ,  H01L21/76873 ,  H01L21/76877 ,  H01L2221/1089

摘要： A semiconductor interconnection structure is manufactured as follows. First, a substrate with a first dielectric layer and a second dielectric layer is formed. Subsequently, an opening is formed in the second dielectric layer. A thin metal layer and a seed layer are formed in sequence on the surface of the second dielectric layer in the opening, wherein the metal layer comprises at least one metal species having phase segregation property of a second conductor. The wafer of the substrate is subjected to a thermal treatment, by which most of the metal species in the metal layer at a bottom of the opening is diffused to a top surface of the second conductor to form a metal-based oxide layer. Afterwards, the wafer is subjected to planarization, so as to remove the second conductor outside the opening.

摘要翻译： 如下制造半导体互连结构。 首先，形成具有第一介电层和第二介质层的基板。 随后，在第二电介质层中形成开口。 在开口中的第二电介质层的表面上依次形成薄金属层和种子层，其中金属层包含至少一种具有第二导体的相分离特性的金属物质。 对基板的晶片进行热处理，通过该热处理，开口底部的金属层中的大部分金属物质扩散到第二导体的顶表面，形成金属基氧化物层。 然后，对晶片进行平面化处理，以便将开口外的第二导体移除。

公开(公告)号：US20080291068A1

公开(公告)日：2008-11-27

申请号：US12123575

申请日：2008-05-20

申请人： Ming-Han Lee

发明人： Ming-Han Lee

IPC分类号： H03M1/00

CPC分类号： H03M1/0612 ,  H03M1/745

摘要： A current output circuit with bias control and a method thereof are provided. The current output circuit includes a current mirror circuit comprising a first transistor and a second transistor having respectively two drains, and a control circuit coupled to the current mirror circuit. The control circuit receives drain voltages of the first transistor and the second transistor, and adjusts a respective gate bias of the first transistor and the second transistor according to a respective drain voltage thereof.

摘要翻译： 提供具有偏置控制的电流输出电路及其方法。 电流输出电路包括电流镜电路，其包括第一晶体管和具有两个漏极的第二晶体管，以及耦合到电流镜电路的控制电路。 控制电路接收第一晶体管和第二晶体管的漏极电压，并根据其漏极电压来调整第一晶体管和第二晶体管的各自的栅极偏置。