公开(公告)号：US08558566B2

公开(公告)日：2013-10-15

申请号：US13089093

申请日：2011-04-18

申请人： Po-Shen Lai ,  Paul A. Lassa ,  Paul C. Paternoster

发明人： Po-Shen Lai ,  Paul A. Lassa ,  Paul C. Paternoster

IPC分类号： G01R31/3187 ,  G01R31/02 ,  G01R31/28 ,  G01R31/319 ,  G01R31/3185

CPC分类号： G01R31/2884 ,  G01R31/318511 ,  G01R31/318558 ,  G01R31/31924

摘要： A multi-interface integrated circuit in which, during the chip's lifetime in use, only one interface is active at a time. However, special test logic powers up all of the on-chip interface modules at once, so that a complete test cycle can be performed. All of the interfaces are exercised in one test program. Since some pads are inactive in some interface modes, mask bits are used to select which pads are monitored during which test cycles.

摘要翻译： 一种多接口集成电路，其中在芯片使用寿命期间，一次只有一个接口处于活动状态。 但是，特殊的测试逻辑可以一次启动所有片上接口模块，从而可以执行完整的测试周期。 所有接口都在一个测试程序中执行。 由于某些接口模式下某些焊盘无效，因此使用掩码位来选择在哪个测试周期内监视哪些焊盘。

公开(公告)号：US07928746B1

公开(公告)日：2011-04-19

申请号：US11966147

申请日：2007-12-28

申请人： Po-Shen Lai ,  Paul A. Lassa ,  Paul C. Paternoster

发明人： Po-Shen Lai ,  Paul A. Lassa ,  Paul C. Paternoster

IPC分类号： G01R31/3187

CPC分类号： G01R31/2884 ,  G01R31/318511 ,  G01R31/318558 ,  G01R31/31924

摘要： A multi-interface integrated circuit in which, during the chip's lifetime in use, only one interface is active at a time. However, special test logic powers up all of the on-chip interface modules at once, so that a complete test cycle can be performed. All of the interfaces are exercised in one test program. Since some pads are inactive in some interface modes, mask bits are used to select which pads are monitored during which test cycles.

摘要翻译： 一种多接口集成电路，其中在芯片使用寿命期间，一次只有一个接口处于活动状态。 但是，特殊的测试逻辑可以一次启动所有片上接口模块，从而可以执行完整的测试周期。 所有接口都在一个测试程序中执行。 由于某些接口模式下某些焊盘无效，因此使用掩码位来选择在哪个测试周期内监视哪些焊盘。

公开(公告)号：US20110283055A1

公开(公告)日：2011-11-17

申请号：US13089093

申请日：2011-04-18

申请人： Po-Shen Lai ,  Paul A. Lassa ,  Paul C. Paternoster

发明人： Po-Shen Lai ,  Paul A. Lassa ,  Paul C. Paternoster

IPC分类号： G06F12/00

CPC分类号： G01R31/2884 ,  G01R31/318511 ,  G01R31/318558 ,  G01R31/31924

摘要： A multi-interface integrated circuit in which, during the chip's lifetime in use, only one interface is active at a time. However, special test logic powers up all of the on-chip interface modules at once, so that a complete test cycle can be performed. All of the interfaces are exercised in one test program. Since some pads are inactive in some interface modes, mask bits are used to select which pads are monitored during which test cycles.

摘要翻译： 一种多接口集成电路，其中在芯片使用寿命期间，一次只有一个接口处于活动状态。 但是，特殊的测试逻辑可以一次启动所有片上接口模块，从而可以执行完整的测试周期。 所有接口都在一个测试程序中执行。 由于某些接口模式下某些焊盘无效，因此使用掩码位来选择在哪个测试周期内监视哪些焊盘。

公开(公告)号：US08102062B1

公开(公告)日：2012-01-24

申请号：US11966012

申请日：2007-12-28

申请人： Paul A. Lassa ,  Paul C. Paternoster ,  Po-Shen Lai

发明人： Paul A. Lassa ,  Paul C. Paternoster ,  Po-Shen Lai

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC分类号： H01L25/0657 ,  H01L23/49855 ,  H01L23/50 ,  H01L24/06 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/06135 ,  H01L2224/06155 ,  H01L2224/06515 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1438 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Methods and systems for forming a variety of integrated circuits, having quite different interfaces and packages, from a single manufactured die. Preferably the die has bond pads for at least a first mode of operation positioned along only two of its four sides, and these bond pads are sufficient to construct a multi-chip module in which the die is functional in the first mode of operation. Many of the pads on these two sides are duplicated on third and/or fourth sides, except that power management circuitry prevents wasteful capacitive current onto whichever of the duplicated pads is not connected out. Optionally the third and/or fourth sides can be used for connections needed for a mode which is not available with two sides only.

摘要翻译： 用于从单个制造的模具形成具有完全不同的界面和封装的各种集成电路的方法和系统。 优选地，管芯具有至少第一操作模式的接合焊盘，其仅沿着其四个侧面中的两个定位，并且这些接合焊盘足以构造其中裸片在第一操作模式中起作用的多芯片模块。 除了电源管理电路防止浪费的电容电流到无连接的重叠焊盘之外，这两侧的许多焊盘在第三和/或第四侧都被复制。 可选地，第三和/或第四侧可以用于仅在两侧不可用的模式所需的连接。