摘要:
A device, method, and system are disclosed. In one embodiment the device includes a router to transmit data packets between multiple host controllers and one or more peripheral devices. The router can receive a data packet from a host controller and transmit the data packet to a peripheral device across a data transmission path. The peripheral device is coupled to the first data transmission path through a first universal multi-transport medium (UMTM) connector. The connector includes an optical coupling capable of transporting the first data packet within an optical signal and an electrical coupling capable of transporting the first data packet within an electrical signal.
摘要:
In general, in one aspect, the disclosure describes a processor that includes an instruction store to store instructions of at least a portion of at least one program and multiple engines coupled to the shared instruction store. The engines provide multiple execution threads and include an instruction cache to cache a subset of the at least the portion of the at least one program from the instruction store, with different respective portions of the engine's instruction cache being allocated to different respective ones of the engine threads.
摘要:
A method according to one embodiment may include storing data in a send buffer. A transmission header may be created, in which the transmission header may include a pointer to the data in the send buffer. Packets may be transmitted, in which the packets include the transmission header and the data linked to the transmission header by the pointer, wherein the packets are transmitted without copying the data to create the packets. Of course, many alternatives, variations and modifications are possible without materially departing from this embodiment.
摘要:
In general, in one aspect, the disclosure describes a processor that includes an instruction store to store instructions of at least a portion of at least one program and multiple engines coupled to the shared instruction store. The engines provide multiple execution threads and include an instruction cache to cache a subset of the at least the portion of the at least one program from the instruction store, with different respective portions of the engine's instruction cache being allocated to different respective ones of the engine threads.
摘要:
A system and method of scheduling packets in a multi-threaded, multiprocessor network architecture provides enhanced speed and performance. The architecture involves a scheduler thread that transitions between queues in response to a depletion of queues by a weighted amount, a plurality of transmit threads that deplete the queues by the size of packets transmitted and a plurality of receive threads that initialize the weights for idle queues.
摘要:
According to some embodiments, systems an apparatuses may have a communication path to exchange information packets. A processor may process information packets. A buffer pool cache local to the processor may store free buffer handles for information packets when the buffer pool cache local to the processor is not full. A non-local memory may store the free buffer handles for information packets when the buffer pool cache local to the processor is full.
摘要:
Methods and apparatus for implementing active interconnect link power management using an adaptive low-power link-state entry policy. The power state of an interconnect link or fabric is changed in response to applicable conditions determined by low-power link-state entry policy logic in view of runtime traffic on the interconnect link or fabric. The low-power link-state policy logic may be configured to include consideration of operating system input and Quality of Service (QoS) requirements for applications and devices employing the link or fabric, and device latency tolerance requirements.
摘要:
A data processing node includes a local clock, a slave port and a time synchronization module. The slave port enables the data processing node to be connected through a node interconnect structure to a parent node that is operating in a time synchronized manner with a fabric time of the node interconnect structure. The time synchronization module is coupled to the local clock and the slave port. The time synchronization module is configured for collecting parent-centric time synchronization information and for using a local time provided by the local clock and the parent-centric time synchronization information for allowing one or more time-based functionality of the data processing node to be implemented in accordance with the fabric time.
摘要:
Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A method for managing flow across the multi-protocol I/O interconnect may include providing, by a first port of a switching fabric of a multi-protocol interconnect to a second port of the switching fabric, a first credit grant packet and a second credit grant packet as indications of unoccupied space of a buffer associated with a path between the first port and a second port, and simultaneously routing a first data packet of a first protocol and a second data packet of a second protocol, different from the first protocol, on the path from the second port to the first port based at least in part on receipt by the second port of the first and second credit grant packets. Other embodiments may be described and claimed.
摘要:
Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A method for multi-protocol tunneling may include establishing a first communication path between ports of a switching fabric of a multi-protocol interconnect of a computer apparatus in response to a peripheral device being connected to the computer apparatus, establishing a second communication path between the switching fabric and a protocol-specific controller, and routing, by the multi-protocol interconnect, packets of a protocol of the peripheral device from the peripheral device to the protocol-specific controller over the first and second communication paths. Other embodiments may be described and claimed.