HARDWARE ASSISTANCE FOR PAGE TABLE COHERENCE WITH GUEST PAGE MAPPINGS
    1.
    发明申请
    HARDWARE ASSISTANCE FOR PAGE TABLE COHERENCE WITH GUEST PAGE MAPPINGS 有权
    与页面映射相关的页面表的硬件辅助

    公开(公告)号:US20120278588A1

    公开(公告)日:2012-11-01

    申请号:US13545772

    申请日:2012-07-10

    IPC分类号: G06F12/10

    摘要: Some embodiments of the present invention include a memory management unit (MMU) configured to, in response to a write access targeting a guest page mapping of a guest virtual page number (GVPN) to a guest physical page number (GPPN) within a guest page table, identify a first page mapping that associates the GVPN with a physical page number (PPN). The MMU is also configured to determine whether a traced write indication is associated with the first page mapping and, if so, record update information identifying the targeted guest page mapping. The update information is used to reestablish coherence between the guest page mapping and the first page mapping. The MMU is further configured to perform the write access.

    摘要翻译: 本发明的一些实施例包括存储器管理单元(MMU),其被配置为响应于将来宾虚拟页码(GVPN)的访客页面映射定向到访客页面内的访客物理页码(GPPN)的写入访问 表,标识将GVPN与物理页号(PPN)相关联的第一页映射。 MMU还被配置为确定跟踪的写指示是否与第一页映射相关联,并且如果是,则记录标识目标访客页映射的更新信息。 更新信息用于重新建立访客页面映射和第一页映射之间的一致性。 MMU还被配置为执行写访问。

    Hardware assistance for shadow page table coherence with guest page mappings
    2.
    发明授权
    Hardware assistance for shadow page table coherence with guest page mappings 有权
    影子页表硬件辅助与访客页面映射的一致性

    公开(公告)号:US08219779B2

    公开(公告)日:2012-07-10

    申请号:US13297114

    申请日:2011-11-15

    IPC分类号: G06F12/06

    摘要: Some embodiments of the present invention include a memory management unit (MMU) configured to, in response to a write access targeting a guest page mapping of a guest virtual page number (GVPN) to a guest physical page number (GPPN) within a guest page table, identify a shadow page mapping that associates the GVPN with a physical page number (PPN). The MMU is also configured to determine whether a traced write indication is associated with the shadow page mapping and, if so, record update information identifying the targeted guest page mapping. The update information is used to reestablish coherence between the guest page mapping and the shadow page mapping. The MMU is further configured to perform the write access.

    摘要翻译: 本发明的一些实施例包括存储器管理单元(MMU),其被配置为响应于将来宾虚拟页码(GVPN)的访客页面映射定向到访客页面内的访客物理页码(GPPN)的写入访问 表,标识将GVPN与物理页码(PPN)相关联的影子页面映射。 MMU还被配置为确定跟踪的写入指示是否与阴影页面映射相关联,并且如果是,则记录标识目标访客页面映射的更新信息。 更新信息用于重新建立访客页面映射和阴影页面映射之间的一致性。 MMU还被配置为执行写访问。

    Virtualization system using hardware assistance for shadow page table coherence
    3.
    发明授权
    Virtualization system using hardware assistance for shadow page table coherence 有权
    虚拟化系统使用硬件帮助影子页表一致性

    公开(公告)号:US08443156B2

    公开(公告)日:2013-05-14

    申请号:US12413379

    申请日:2009-03-27

    IPC分类号: G06F12/00

    摘要: One embodiment of the present invention includes a method for maintaining a shadow page table in at least partial correspondence with guest page mappings of a guest computation. The method marking with a traced write indication at least those entries of the shadow page table that map physical memory locations which themselves encode the guest page mappings, the marking identifying, for a hardware facility, a subset of memory access targets for which updates are to be recorded in a guest write buffer accessible to the virtualization system. Responsive to a coherency-inducing operation of the guest computation, the method reads from the guest write buffer and introduces corresponding updates into the shadow page table.

    摘要翻译: 本发明的一个实施例包括一种用于维护与来宾计算的访客页面映射至少部分对应的影子页表的方法。 具有跟踪的写入指示的方法标记至少是阴影页表的那些条目,其映射其自身编码访客页面映射的物理存储器位置,标记为硬件设施标识用于更新的存储器访问目标的子集 记录在虚拟化系统可访问的访客写入缓冲区中。 响应于客人计算的一致性诱导操作,该方法从访客写缓冲器读取并将相应的更新引入到影子页表中。

    SOFTWARE CRYPTOPROCESSOR
    4.
    发明申请
    SOFTWARE CRYPTOPROCESSOR 有权
    软件CRYPTOPROCESSOR

    公开(公告)号:US20130067245A1

    公开(公告)日:2013-03-14

    申请号:US13614935

    申请日:2012-09-13

    IPC分类号: G06F12/14

    摘要: Security of information—both code and data—stored in a computer's system memory is provided by an agent loaded into and at run time resident in a CPU cache. Memory writes from the CPU are encrypted by the agent before writing and reads into the CPU are decrypted by the agent before they reach the CPU. The cache-resident agent also optionally validates the encrypted information stored in the system memory. Support for I/O devices and cache protection from unsafe DMA of the cache by devices is also provided.

    摘要翻译: 存储在计算机系统存储器中的代码和数据的安全性由加载到驻留在CPU缓存中的运行时的代理提供。 来自CPU的存储器写入由代理程序在写入之前进行加密,并且在代理程序到达CPU之前,读入CPU将被解密。 缓存驻留代理还可选地验证存储在系统存储器中的加密信息。 还提供对I / O设备的支持以及设备对缓存的不安全DMA的高速缓存保护。

    HARDWARE ASSISTANCE FOR SHADOW PAGE TABLE COHERENCE WITH GUEST PAGE MAPPINGS
    5.
    发明申请
    HARDWARE ASSISTANCE FOR SHADOW PAGE TABLE COHERENCE WITH GUEST PAGE MAPPINGS 有权
    与页面映射相关的页面表的硬件辅助

    公开(公告)号:US20100250895A1

    公开(公告)日:2010-09-30

    申请号:US12413426

    申请日:2009-03-27

    IPC分类号: G06F12/10 G06F12/00 G06F12/08

    摘要: Some embodiments of the present invention include an execution unit of a processor and a memory management unit interposed between the execution unit and an interface to memory suitable for storage of both guest page tables maintained by a guest operating system and shadow page tables maintained generally in correspondence with the guest page tables by virtualization software. The memory management unit is configured to walk in-memory data structures that encode the shadow page tables, to access entries of the shadow page tables and, based thereon or on a cached representation of page mappings therein, to perform virtual-to-physical address translations relative to memory targets of instructions executed by the execution unit. The memory management unit is responsive to a shadowed write indication coded in association with either an entry of the shadow page tables or a cached representation of a page mapping therein used to perform the virtual-to-physical address translation for a write-type one of the instructions that targets an entry of one of the guest page tables. The memory management unit is configured to complete the memory access of the write-type instruction that targets the guest page table entry and to store in a buffer, information sufficient to allow the virtualization software to later update an entry of the shadow page tables in correspondence therewith.

    摘要翻译: 本发明的一些实施例包括处理器的执行单元和插入在执行单元和适于存储由客户操作系统维护的两个访客页表的存储器的存储器的存储器管理单元和通常维护在一起的对应页面表 与虚拟化软件的客户页面表。 存储器管理单元被配置为步行编码阴影页表的存储器内数据结构,以访问影子页表的条目,并且基于或基于其中的缓存的页面映射表示来执行虚拟到物理地址 相对于由执行单元执行的指令的存储器目标的转换。 存储器管理单元响应于与阴影页表的条目或其中映射的页面的高速缓存表示相关联地编码的阴影写入指示,其中用于执行虚拟到物理地址转换的写入类型之一 指定一个访客页表的条目的指令。 存储器管理单元被配置为完成针对访客页表条目的写入型指令的存储器访问并且存储在缓冲器中,足以允许虚拟化软件随后更新对应的影子页表的条目的信息 随之而来。

    SWITCHING BETWEEN MULTIPLE SOFTWARE ENTITIES USING DIFFERENT OPERATING MODES OF A PROCESSOR
    6.
    发明申请
    SWITCHING BETWEEN MULTIPLE SOFTWARE ENTITIES USING DIFFERENT OPERATING MODES OF A PROCESSOR 有权
    使用不同操作模式的处理器之间切换多个软件实体

    公开(公告)号:US20090100250A1

    公开(公告)日:2009-04-16

    申请号:US12339778

    申请日:2008-12-19

    IPC分类号: G06F9/455 G06F9/318

    CPC分类号: G06F9/45554

    摘要: The computer program includes a virtualization software that is executable on the new processor in the legacy mode. The new processor includes a legacy instruction set for a legacy operating mode and a new instruction set for a new operation mode. The switching includes switching from the new instruction set to the legacy instruction set and switching paging tables. Each of the new operating mode and the legacy operating mode has separate paging tables. The switch routine is incorporated in a switch page that is locked in physical memory. The switch page has a first section to store a part of switching instructions conforming to the new instruction set and a second section to store another part of the switching instructions conforming to the legacy instruction set.

    摘要翻译: 该计算机程序包括在传统模式下可在新处理器上执行的虚拟化软件。 新处理器包括用于传统操作模式的传统指令集和用于新操作模式的新指令集。 切换包括从新指令集切换到传统指令集和切换寻呼表。 每个新的操作模式和传统操作模式都有独立的分页表。 开关程序被并入被锁定在物理存储器中的开关页面中。 开关页面具有存储符合新指令集的切换指令的一部分的第一部分和存储符合传统指令集的切换指令的另一部分的第二部分。

    Method and apparatus for managing registers in a binary translator
    7.
    发明授权
    Method and apparatus for managing registers in a binary translator 有权
    用于管理二进制翻译器中的寄存器的方法和装置

    公开(公告)号:US07260815B1

    公开(公告)日:2007-08-21

    申请号:US10610218

    申请日:2003-06-30

    IPC分类号: G06F9/44

    CPC分类号: G06F9/45516 G06F9/45504

    摘要: The invention relates to managing registers during a binary translation mode in a virtual computing system. A set of registers is saved to memory before beginning to execute a series of blocks of translated code, and the contents of the set of registers are restored from memory later. A status register is maintained for tracking the status of each register within the set, the status indicating whether the contents are valid and whether the contents are saved in memory. Before the execution of each block, a determination is made as to whether the actions taken within the block relative to the registers are compatible with the current status of the registers. If the actions are not compatible, additional registers are saved to memory or restored from memory, so that the translation block can be executed.

    摘要翻译: 本发明涉及在虚拟计算系统中的二进制翻译模式期间管理寄存器。 在开始执行一系列翻译代码块之前,将一组寄存器保存到存储器中,然后从存储器中恢复寄存器组的内容。 维护状态寄存器用于跟踪集合内每个寄存器的状态,指示内容是否有效的状态以及内容是否保存在存储器中。 在每个块的执行之前,确定在块内相对于寄存器采取的动作是否与寄存器的当前状态兼容。 如果操作不兼容,则会将其他寄存器保存到存储器或从存储器还原,以便可以执行转换块。

    Hardware assistance for page table coherence with guest page mappings
    8.
    发明授权
    Hardware assistance for page table coherence with guest page mappings 有权
    与访客页面映射的页表一致性的硬件辅助

    公开(公告)号:US08762684B2

    公开(公告)日:2014-06-24

    申请号:US13545772

    申请日:2012-07-10

    IPC分类号: G06F12/10 G06F12/14

    摘要: Some embodiments of the present invention include a memory management unit (MMU) configured to, in response to a write access targeting a guest page mapping of a guest virtual page number (GVPN) to a guest physical page number (GPPN) within a guest page table, identify a first page mapping that associates the GVPN with a physical page number (PPN). The MMU is also configured to determine whether a traced write indication is associated with the first page mapping and, if so, record update information identifying the targeted guest page mapping. The update information is used to reestablish coherence between the guest page mapping and the first page mapping. The MMU is further configured to perform the write access.

    摘要翻译: 本发明的一些实施例包括存储器管理单元(MMU),其被配置为响应于将来宾虚拟页码(GVPN)的访客页面映射定向到访客页面内的访客物理页码(GPPN)的写入访问 表,标识将GVPN与物理页号(PPN)相关联的第一页映射。 MMU还被配置为确定跟踪的写指示是否与第一页映射相关联,并且如果是,则记录标识目标访客页映射的更新信息。 更新信息用于重新建立访客页面映射和第一页映射之间的一致性。 MMU还被配置为执行写访问。

    Bypassing guest page table walk for shadow page table entries not present in guest page table
    9.
    发明授权
    Bypassing guest page table walk for shadow page table entries not present in guest page table 有权
    绕过客人页面表进行访客页表中不存在的影子页表项

    公开(公告)号:US08015388B1

    公开(公告)日:2011-09-06

    申请号:US11499125

    申请日:2006-08-04

    IPC分类号: G06F12/00

    摘要: A method and system are provided that does not perform a page walk on the guest page tables if the shadow page table entry corresponding to the guest virtual address for accessing the virtual memory indicates that a corresponding mapping from the guest virtual address to a guest physical address is not present in the guest page tables. A marker or indicator is stored in the shadow page table entries to indicate that a mapping corresponding to the guest virtual address of the shadow page table entry is not present in the guest page table.

    摘要翻译: 提供一种方法和系统,如果与用于访问虚拟存储器的访客虚拟地址相对应的影子页表项指示从guest虚拟地址到客体物理地址的对应映射,则不访客页面表上不执行页面行进 不存在于访客页表中。 标记或指示符存储在影子页表项中,表示与访客页表中不存在与影子页表条目的来宾虚拟地址对应的映射。

    Virtualization system for computers that use address space indentifiers
    10.
    发明授权
    Virtualization system for computers that use address space indentifiers 有权
    使用地址空间标识符的计算机的虚拟化系统

    公开(公告)号:US07409487B1

    公开(公告)日:2008-08-05

    申请号:US10609877

    申请日:2003-06-30

    IPC分类号: G06F12/00 G06F9/26 G06F21/00

    摘要: A virtual computer system including multiple virtual machines (VMs) is implemented in a physical computer system that uses address space identifiers (ASIDs). Each VM includes a virtual translation look-aside buffer (TLB), in which guest software, executing on the VM, may insert address translations, with each translation including an ASID. For each ASID used by guest software, a virtual machine monitor (VMM), or other software unit, assigns a unique shadow ASID for use in corresponding address translations in a hardware TLB. If a unique shadow ASID is not available for a newly used guest ASID, the VMM reassigns a shadow ASID from a prior guest ASID to the new guest ASID, purging any entries in the hardware TLB corresponding to the prior guest ASID. Assigning unique shadow ASIDs limits the need for TLB purges upon switching between the multiple VMs, reducing the number of TLB miss faults, and consequently improving overall processing efficiency.

    摘要翻译: 在使用地址空间标识符(ASID)的物理计算机系统中实现包括多个虚拟机(VM)的虚拟计算机系统。 每个虚拟机包括虚拟翻译后备缓冲器(TLB),其中在VM上执行的客户机软件可以插入地址转换,每个转换包括ASID。 对于访客软件使用的每个ASID,虚拟机监视器(VMM)或其他软件单元分配一个唯一的影子ASID,用于硬件TLB中相应的地址转换。 如果唯一的影子ASID不适用于新使用的客户机ASID,则VMM将从先前客户机ASID的影子ASID重新分配给新的客户机ASID,清除与先前客户机ASID相对应的硬件TLB中的任何条目。 分配唯一的影子ASID限制了在多个VM之间切换时对TLB清除的需求,减少了TLB未命中故障的数量,从而提高了整体处理效率。