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    HIGH DENSITY SRAM CELL WITH HYBRID DEVICES
    2.
    发明申请
    HIGH DENSITY SRAM CELL WITH HYBRID DEVICES 有权
    高密度SRAM单元与混合器件

    公开(公告)号：US20090108374A1

    公开(公告)日：2009-04-30

    申请号：US11928418

    申请日：2007-10-30

    Applicant: Robert C. Wong ,  Haining Sam Yang

    Inventor： Robert C. Wong ,  Haining Sam Yang

    IPC: H01L27/11 ,  H01L21/8244

    CPC classification number: H01L27/1104 ,  H01L27/11

    Abstract: Hybrid SRAM circuit, hybrid SRAM structures and method of fabricating hybrid SRAMs. The SRAM structures include first and second cross-coupled inverters coupled to first and second pass gate devices. The pull-down devices of the inverters are FinFETs while the pull-up devices of the inverters and the pass gate devices are planar FETs or pull-down and pull-up devices of the inverters are FinFETs while the pass gate devices are planar FETs.

    Abstract translation: 混合SRAM电路，混合SRAM结构和制造混合SRAM的方法。 SRAM结构包括耦合到第一和第二通道栅极器件的第一和第二交叉耦合反相器。 逆变器的下拉器件是FinFET，而反相器的上拉器件和通栅器件是平面FET，反相器的下拉和上拉器件是FinFET，而栅极器件是平面FET。

    LOW LEAKAGE MIM CAPACITOR
    3.
    发明申请
    LOW LEAKAGE MIM CAPACITOR 有权

    公开(公告)号：US20080064179A1

    公开(公告)日：2008-03-13

    申请号：US11932677

    申请日：2007-10-31

    Applicant: Sam Yang

    Inventor： Sam Yang

    IPC: H01L21/20

    CPC classification number: H01L27/10805 ,  G11C11/404 ,  G11C2211/4016 ,  H01L21/76895 ,  H01L27/10852 ,  H01L28/56 ,  H01L28/91 ,  Y10S257/906 ,  Y10S438/957

    Abstract: Capacitor structures for use in integrated circuits and methods of their manufacture. The capacitor structures include a bottom electrode, a top electrode and a dielectric layer interposed between the bottom electrode and the top electrode. The capacitor structures further include a metal oxide buffer layer interposed between the dielectric layer and at least one of the bottom and top electrodes. Each metal oxide buffer layer acts to improve capacitance and reduce capacitor leakage. The capacitors are suited for use as memory cells and apparatus incorporating such memory cells, as well as other integrated circuits.

    LOW LEAKAGE MIM CAPACITOR
    4.
    发明申请
    LOW LEAKAGE MIM CAPACITOR 审中-公开
    低漏电容电容器

    公开(公告)号：US20080057664A1

    公开(公告)日：2008-03-06

    申请号：US11932551

    申请日：2007-10-31

    Applicant: Sam Yang

    Inventor： Sam Yang

    IPC: H01L21/20

    CPC classification number: H01L27/10805 ,  G11C11/404 ,  G11C2211/4016 ,  H01L21/76895 ,  H01L27/10852 ,  H01L28/56 ,  H01L28/91 ,  Y10S257/906 ,  Y10S438/957

    Abstract: Capacitor structures for use in integrated circuits and methods of their manufacture. The capacitor structures include a bottom electrode, a top electrode and a dielectric layer interposed between the bottom electrode and the top electrode. The capacitor structures further include a metal oxide buffer layer interposed between the dielectric layer and at least one of the bottom and top electrodes. Each metal oxide buffer layer acts to improve capacitance and reduce capacitor leakage. The capacitors are suited for use as memory cells and apparatus incorporating such memory cells, as well as other integrated circuits.

    Abstract translation: 用于集成电路的电容器结构及其制造方法。 电容器结构包括底电极，顶电极和置于底电极和顶电极之间的电介质层。 电容器结构还包括置于电介质层和底电极和顶电极中的至少一个之间的金属氧化物缓冲层。 每个金属氧化物缓冲层起着改善电容和减少电容器泄漏的作用。 这些电容器适用于作为存储单元和并入这种存储单元的装置以及其他集成电路。

    Metal oxynitride capacitor barrier layer
    5.
    发明授权
    Metal oxynitride capacitor barrier layer 失效

    公开(公告)号：US07002202B2

    公开(公告)日：2006-02-21

    申请号：US10688823

    申请日：2003-10-17

    Applicant: Sam Yang ,  Vishnu K. Agarwal

    Inventor： Sam Yang ,  Vishnu K. Agarwal

    IPC: H01L27/108

    CPC classification number: H01L28/56 ,  H01L27/10852 ,  H01L28/75

    Abstract: Capacitor structures for use in integrated circuits and methods of their manufacture. The capacitor structures include a bottom electrode, a top electrode and a dielectric layer interposed between the bottom electrode and the top electrode. The capacitor structures further include a metal oxynitride barrier layer interposed between the dielectric layer and at least one of the bottom and top electrodes. Each metal oxynitride barrier layer acts to reduce undesirable oxidation of its associated electrode. Each metal oxynitride barrier layer can further aid in the repairing of oxygen vacancies in a metal oxide dielectric. The capacitors are suited for use as memory cells and apparatus incorporating such memory cells, as well as other integrated circuits.

    Flame retardant thermoplastic resin composition
    6.
    发明申请
    Flame retardant thermoplastic resin composition 有权
    阻燃热塑性树脂组合物

    公开(公告)号：US20050245648A1

    公开(公告)日：2005-11-03

    申请号：US10520842

    申请日：2002-09-30

    Applicant: Jong Lim ,  Sam Yang

    Inventor： Jong Lim ,  Sam Yang

    IPC: C08K5/521 ,  C08K5/523 ,  C08K5/5399 ,  C08L23/28 ,  C08L25/02 ,  C08L25/04 ,  C08L27/12 ,  C08L33/00 ,  C08L33/06 ,  C08L51/04 ,  C08L69/00 ,  C08K5/49

    CPC classification number: C08K5/5399 ,  C08K5/523 ,  C08L25/02 ,  C08L27/12 ,  C08L33/06 ,  C08L51/04 ,  C08L69/00 ,  C08L2666/02

    Abstract: The flame retardant thermoplastic resin composition of the present invention comprises (A) 45˜95 parts by weight of a polycarbonate resin; (B) 1˜50 parts by weight of a rubber modified vinyl graft copolymer; (C) 0˜50 parts by weight of a vinyl copolymer; (D) 1˜30 parts by weight of a mixture of organic phosphorous compounds consisting of (d1) 1˜50% by weight of a oligomeric compound of cyclic phosphazene and (d2) 99˜50% by weight of an oligomeric phosphoric acid ester compound, per 100 parts by weight of the sum of (A), (B) and (C); and (E) 0.05˜5 parts by weight of a fluorinated polyolefin resin per 100 parts by weight of the sum of (A), (B) and (C).

    Abstract translation: 本发明的阻燃性热塑性树脂组合物包含（A）45〜95重量份的聚碳酸酯树脂; （B）1〜50重量份橡胶改性乙烯基接枝共聚物; （C）0〜50重量份的乙烯基共聚物; （D）1〜30重量份由（d 1→1）1〜50重量％的环状磷腈的低聚化合物和（d 2 N 2）组成的有机磷化合物的混合物， （A），（B）和（C）的总和100重量份的低聚磷酸酯化合物99〜50重量％ 和（E）每100重量份（A），（B）和（C）的总和为0.05〜5重量份的氟化聚烯烃树脂。

    Technique for high efficiency metalorganic chemical vapor deposition
    7.
    发明授权
    Technique for high efficiency metalorganic chemical vapor deposition 失效

    公开(公告)号：US06921710B2

    公开(公告)日：2005-07-26

    申请号：US10757638

    申请日：2004-01-13

    Applicant: Weimin Li ,  Sam Yang

    Inventor： Weimin Li ,  Sam Yang

    IPC: B05C11/00 ,  C23C16/18 ,  H01L21/02 ,  H10L21/20

    CPC classification number: C23C16/45523 ,  C23C16/18 ,  H01L28/65

    Abstract: A technique for more efficiently forming conductive elements, such as conductive layers and electrodes, using chemical vapor deposition. A conductive precursor gas, such as a platinum precursor gas, having organic compounds to improve step coverage is introduced into a chemical vapor deposition chamber. A reactant is also introduced into the chamber that reacts with residue organic compounds on the conductive element so as to remove the organic compounds from the nucleating sites to thereby permit more efficient subsequent chemical vapor deposition of conductive elements.

    Method for forming a ruthenium metal layer
    8.
    发明申请
    Method for forming a ruthenium metal layer 失效
    钌金属层的形成方法

    公开(公告)号：US20050074980A1

    公开(公告)日：2005-04-07

    申请号：US10658868

    申请日：2003-09-08

    Applicant: Sam Yang

    Inventor： Sam Yang

    IPC: C23C16/40 ,  C23C16/56 ,  H01L21/02 ,  H01L21/285 ,  H01L21/8242 ,  H01L27/108 ,  H01L21/302 ,  H01L21/461

    CPC classification number: H01L29/495 ,  C23C16/40 ,  C23C16/56 ,  H01L21/28556 ,  H01L27/108 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10888 ,  H01L28/65 ,  H01L28/90

    Abstract: A method for forming a ruthenium metal layer comprises combining a ruthenium precursor with a measured amount of oxygen to form a ruthenium oxide layer. The ruthenium oxide is annealed in the presence of a hydrogen-rich gas to react the oxygen in the ruthenium oxide with hydrogen, which results in a ruthenium metal layer. By varying the oxygen flow rate during the formation of ruthenium oxide, a ruthenium metal layer having various degrees of smooth and rough textures can be formed.

    Abstract translation: 形成钌金属层的方法包括将钌前体与测量量的氧组合以形成氧化钌层。 氧化钌在富氢气体的存在下进行退火，以使氧化钌中的氧与氢反应，这导致钌金属层。 通过改变形成氧化钌期间的氧气流速，可以形成具有不同程度的光滑粗糙纹理的钌金属层。

    Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers
    9.
    发明授权
    Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers 失效
    含有钌和钨的层的形成方法和集成电路结构

    公开(公告)号：US06833576B2

    公开(公告)日：2004-12-21

    申请号：US10002779

    申请日：2001-10-29

    Applicant: Vishnu K. Agarwal ,  Garo Derderian ,  Gurtej S. Sandhu ,  Weimin M. Li ,  Mark Visokay ,  Cem Basceri ,  Sam Yang

    Inventor： Vishnu K. Agarwal ,  Garo Derderian ,  Gurtej S. Sandhu ,  Weimin M. Li ,  Mark Visokay ,  Cem Basceri ,  Sam Yang

    IPC: H01L27108

    CPC classification number: H01L28/84 ,  H01L21/31637 ,  H01L28/55 ,  H01L28/65

    Abstract: Capacitors having increased capacitance include an enhanced-surface-area (rough-surfaced) electrically conductive layer or other layers that are compatible with the high-dielectric constant materials. In one approach, an enhanced-surface-area electrically conductive layer for such capacitors is formed by processing a ruthenium oxide layer at high temperature at or above 500° C. and low pressure 75 torr or below, most desirably 5 torr or below, to produce a roughened ruthenium layer having a textured surface with a mean feature size of at least about 100 Angstroms. The initial ruthenium oxide layer may be provided by chemical vapor deposition techniques or sputtering techniques or the like. The layer may be formed over an underlying electrically conductive layer. The processing may be performed in an inert ambient or in a reducing ambient. A nitrogen-supplying ambient or nitrogen-supplying reducing ambient may be used during the processing or afterwards to passivate the ruthenium for improved compatibility with high-dielectric-constant dielectric materials. Processing in an oxidizing ambient may also be performed to passivate the roughened layer. The roughened layer of ruthenium may be used to form an enhanced-surface-area electrically conductive layer. The resulting enhanced-surface-area electrically conductive layer may form a plate of a storage capacitor in an integrated circuit, such as in a memory cell of a DRAM or the like. In another approach, a tungsten nitride layer is provided as an first electrode of such a capacitor. The capacitor, or at least the tungsten nitride layer, is annealed to increase the capacitance of the capacitor.

    Abstract translation: 具有增加的电容的电容器包括增强的表面积（粗糙表面）导电层或与高介电常数材料相容的其它层。 在一种方法中，用于这种电容器的增强表面积导电层是通过在高温或高于500℃，低压75托或更低，最理想的5托或更低的高温下处理氧化钌层形成的， 产生具有至少约100埃的平均特征尺寸的纹理表面的粗糙钌层。 初始氧化钌层可以通过化学气相沉积技术或溅射技术等来提供。 该层可以形成在下面的导电层上。 处理可以在惰性环境或还原环境中进行。 可以在处理期间或之后使用供氮环境或供氮还原环境以钝化钌以改善与高介电常数电介质材料的相容性。 氧化环境中的处理也可以进行以钝化粗糙层。 可以使用粗糙化的钌层来形成增强表面积的导电层。 所形成的增强表面积导电层可以在诸如DRAM等的存储单元中的集成电路中形成存储电容器的板。 在另一种方法中，提供氮化钨层作为这种电容器的第一电极。 电容器或至少氮化钨层被退火以增加电容器的电容。

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