公开(公告)号：US07430131B2

公开(公告)日：2008-09-30

申请号：US11199841

申请日：2005-08-09

Applicant: Massimo Grasso ,  Sergio Morini

Inventor： Massimo Grasso ,  Sergio Morini

IPC: H02M1/00

CPC classification number: H02M3/335 ,  H02M1/36 ,  Y10S323/901

Abstract: A startup circuit for providing a startup voltage from a high voltage DC bus voltage to an application circuit including an integrated circuit package for at least a control circuit for driving at least one power switch of the application circuit; a dropping resistor in the integrated circuit package having a first terminal for coupling to the high voltage DC bus and for dropping the high voltage DC bus voltage to a reduced voltage level at a second terminal; and a low voltage regulator in the package coupled to the second terminal for providing a startup regulated low voltage DC output at a preset level for powering at least one part of the application circuit during startup of the application circuit. The application circuit may be, for example, a switching mode power supply.

Abstract translation: 一种用于将高压DC总线电压的启动电压提供给应用电路的启动电路，所述应用电路包括用于至少一个用于驱动所述应用电路的至少一个电源开关的控制电路的集成电路封装; 所述集成电路封装中的降压电阻器具有用于耦合到所述高压DC总线的第一端子和用于在所述第二端子处将所述高压DC总线电压降低到降低的电压电平; 以及耦合到所述第二端子的所述封装中的低电压调节器，用于在启动所述应用电路的过程中提供预设电平的启动调节的低电压DC输出，以对所述应用电路的至少一部分供电。 应用电路可以是例如开关模式电源。

公开(公告)号：US20070096256A1

公开(公告)日：2007-05-03

申请号：US11538457

申请日：2006-10-04

Applicant: Sergio Morini

Inventor： Sergio Morini

IPC: H01L29/00

CPC classification number: H01L21/761 ,  H01L27/0218 ,  H01L27/0629 ,  H01L29/1087 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2924/13091 ,  H01L2924/19107 ,  H01L2924/00

Abstract: An integrated circuit for feeding data acquisition circuits is provided. The integrated circuit including an inverter application having a half-bridge driver for driving high and low side switches connected in a half bridge, a data acquisition circuit formed in monolithic high voltage technology, and a Low Voltage Floating Supply (LVFS) circuit for providing voltage to the data acquisition circuit, the LVFS circuit being formed in a floating n-epi pocket biased with a voltage that is lower than a maximum value of a voltage present in the n-epi pocket.

Abstract translation: 提供了一种用于馈送数据采集电路的集成电路。 该集成电路包括具有用于驱动连接在半桥中的高低侧开关的半桥驱动器的逆变器应用，以单片高压技术形成的数据采集电路和用于提供电压的低电压浮充电路（LVFS）电路 在数据采集电路中，LVFS电路形成在浮动n外延口袋中，其电压低于存在于n-epi口袋中的电压的最大值。

公开(公告)号：US08384157B2

公开(公告)日：2013-02-26

申请号：US11746949

申请日：2007-05-10

Applicant: Sergio Morini

Inventor： Sergio Morini

IPC: H01L27/12

CPC classification number: H01L28/20 ,  H01L27/0802

Abstract: An integrated circuit that includes a resistor module with improved linearity is disclosed. The resistor module includes a diffused resistor body of a first conductivity type; a first terminal and a second terminal, each making direct electrical contact with the diffused resistor body; a doped well of a second conductivity type substantially surrounding the diffused resistor body on all but one major surface of the diffused resistor body, the doped well having contact regions; a first amplifier connected to the first terminal and to one contact region of the doped well; and a second amplifier connected to the second terminal and to another contact region of the well, such that the first amplifier and the second amplifier are connected for power supply only to the first terminal and second terminal, respectively. The first and second amplifiers may be unity gain buffer amplifiers or inverting opamps.

Abstract translation: 公开了一种包括具有改进的线性度的电阻器模块的集成电路。 电阻模块包括第一导电类型的扩散电阻体; 第一端子和第二端子，各自与扩散电阻体直接电接触; 所述掺杂阱具有接触区域，所述第二导电类型的掺杂阱基本上围绕所述扩散电阻体的除了一个主表面的扩散电阻体外围; 连接到所述第一端子和所述掺杂阱的一个接触区域的第一放大器; 以及连接到所述第二端子和所述阱的另一接触区域的第二放大器，使得所述第一放大器和所述第二放大器分别连接用于仅供电到所述第一端子和第二端子。 第一和第二放大器可以是单位增益缓冲放大器或反相运算放大器。

公开(公告)号：US20060033556A1

公开(公告)日：2006-02-16

申请号：US11199841

申请日：2005-08-09

Applicant: Massimo Grasso ,  Sergio Morini

Inventor： Massimo Grasso ,  Sergio Morini

IPC: G05F1/10

CPC classification number: H02M3/335 ,  H02M1/36 ,  Y10S323/901

Abstract: A startup circuit for providing a startup voltage from a high voltage DC bus voltage to an application circuit comprising an integrated circuit package for at least a control circuit for driving at least one power switch of the application circuit; a dropping resistor in the integrated circuit package having a first terminal for coupling to the high voltage DC bus and for dropping the high voltage DC bus voltage to a reduced voltage level at a second terminal; further comprising a low voltage regulator in the package coupled to the second terminal for providing a startup regulated low voltage DC output at a preset level for powering at least one part of the application circuit during startup of the application circuit. The application circuit may be, for example, a switching mode power supply.

Abstract translation: 一种用于将高压DC总线电压的启动电压提供给应用电路的启动电路，所述应用电路包括至少用于驱动所述应用电路的至少一个电源开关的控制电路的集成电路封装; 所述集成电路封装中的降压电阻器具有用于耦合到所述高压DC总线的第一端子和用于在所述第二端子处将所述高压DC总线电压降低到降低的电压电平; 还包括在所述封装中的与所述第二端子耦合的低压调节器，用于提供预设电平的起动调节低压DC输出，以在所述应用电路启动期间为所述施加电路的至少一部分供电。 应用电路可以是例如开关模式电源。

公开(公告)号：US08013612B2

公开(公告)日：2011-09-06

申请号：US12249116

申请日：2008-10-10

Applicant: Sergio Morini ,  Marco Giandalia ,  David Respigo ,  Stefano Ruzza ,  Massimo Grasso

Inventor： Sergio Morini ,  Marco Giandalia ,  David Respigo ,  Stefano Ruzza ,  Massimo Grasso

IPC: G01R31/02

CPC classification number: G01R31/025 ,  G01R31/34 ,  G01R31/42

Abstract: An integrated ground fault detection circuit in accordance with an embodiment of the present application includes a shunt resistor provided on a positive rail of a DC bus, a high voltage pocket including a sensory circuit connected to the shunt resistor and operable to detect a fault condition indicating a short circuit and a transmitter section operable to continuously transmit a fault condition signal indicating the fault condition and a low voltage pocket including a receiver operable to receive the fault condition signal from the sensory circuit and a logic unit, connected to the receiver, and operable to provide a fault output signal indicating the presence of a fault condition based on the fault condition signal.

Abstract translation: 根据本申请的实施例的集成接地故障检测电路包括设置在DC总线的正极轨上的分流电阻器，包括连接到分流电阻器的感觉电路的高压口袋，并且可操作以检测指示 短路和发送器部分，其可操作以连续发送指示故障状况的故障状态信号;以及低压口袋，包括可接收来自感觉电路的故障状态信号的接收器和连接到接收器的逻辑单元，并且可操作 基于故障状态信号提供指示存在故障状况的故障输出信号。

公开(公告)号：US07619450B2

公开(公告)日：2009-11-17

申请号：US12190811

申请日：2008-08-13

Applicant: Massimo Grasso ,  Sergio Morini

Inventor： Massimo Grasso ,  Sergio Morini

IPC: H03L7/00

CPC classification number: H02M3/335 ,  H02M1/36 ,  Y10S323/901

Abstract: A startup circuit for providing a startup voltage from a high voltage DC bus voltage to an application circuit, the startup circuit comprising an integrated circuit package for at least a control circuit for driving at least one power switch of the application circuit having a low voltage terminal; a dropping resistor in the integrated circuit package having a first terminal for coupling to the high voltage DC bus and a second terminal, the dropping resistor dropping the high voltage DC bus voltage to a reduced voltage and providing the reduced voltage at the second terminal; further comprising a low voltage regulator coupled to the second terminal for using the reduced voltage for enabling generation of a regulated startup low voltage DC output at a preset level at the low voltage terminal for powering at least one part of the application circuit during startup of the application circuit, wherein the high voltage DC bus voltage is the only voltage source provided externally to the integrated circuit package.

Abstract translation: 一种用于将高压DC总线电压的启动电压提供给应用电路的启动电路，所述启动电路包括至少一个用于驱动具有低电压端子的应用电路的至少一个电源开关的控制电路的集成电路封装 ; 所述集成电路封装中具有用于耦合到高压DC总线的第一端子和第二端子的降压电阻器，所述降压电阻器将所述高压DC总线电压降低到降低的电压并在所述第二端子处提供降低的电压; 还包括耦合到所述第二端子的低电压调节器，用于使用所述降低的电压，以在所述低电压端子处能够在预定电平下产生调节的启动低压DC输出，以在所述低电压端子的启动期间向所述应用电路的至少一部分供电 应用电路，其中高压DC总线电压是在集成电路封装外部提供的唯一电压源。

公开(公告)号：US20080278213A1

公开(公告)日：2008-11-13

申请号：US11746949

申请日：2007-05-10

Applicant: Sergio Morini

Inventor： Sergio Morini

IPC: H03D3/00

CPC classification number: H01L28/20 ,  H01L27/0802

Abstract: An integrated circuit that includes a resistor module with improved linearity is disclosed. The resistor module includes a diffused resistor body of a first conductivity type; a first terminal and a second terminal, each making direct electrical contact with the diffused resistor body; a doped well of a second conductivity type substantially surrounding the diffused resistor body on all but one major surface of the diffused resistor body, the doped well having contact regions; a first amplifier connected to the first terminal and to one contact region of the doped well; and a second amplifier connected to the second terminal and to another contact region of the well, such that the first amplifier and the second amplifier are connected for power supply only to the first terminal and second terminal, respectively. The first and second amplifiers may be unity gain buffer amplifiers or inverting opamps.

Abstract translation: 公开了一种包括具有改进的线性度的电阻器模块的集成电路。 电阻模块包括第一导电类型的扩散电阻体; 第一端子和第二端子，各自与扩散电阻体直接电接触; 所述掺杂阱具有接触区域，所述第二导电类型的掺杂阱基本上围绕所述扩散电阻体的除了一个主表面的扩散电阻体外围; 连接到所述第一端子和所述掺杂阱的一个接触区域的第一放大器; 以及连接到所述第二端子和所述阱的另一接触区域的第二放大器，使得所述第一放大器和所述第二放大器分别连接用于仅供电到所述第一端子和第二端子。 第一和第二放大器可以是单位增益缓冲放大器或反相运算放大器。

公开(公告)号：US20070247240A1

公开(公告)日：2007-10-25

申请号：US11697878

申请日：2007-04-09

Applicant: Sergio Morini ,  Raffaele Cannizzaro

Inventor： Sergio Morini ,  Raffaele Cannizzaro

IPC: H03K3/03

CPC classification number: H03K3/0315 ,  H03K5/133 ,  H03L7/0995

Abstract: A ring oscillator for generating an output signal, comprising a plurality of serially connected main elements for selectively delaying a signal input thereto, each of the plurality of main elements having two circuit paths, a first path including at least one time-delay element for delaying a signal input thereto and a second circuit path bypassing the first circuit path; and a multiplexor (MUX) having a first input coupled to the first circuit path including the at least one time-delay element and a second input coupled to the second circuit path, the MUX selecting the first or second inputs of a plurality of inputs and outputting an output signal.

Abstract translation: 一种用于产生输出信号的环形振荡器，包括多个串联连接的主元件，用于选择性地延迟输入到其中的信号，所述多个主元件中的每一个具有两个电路路径，第一路径包括至少一个用于延迟的延时元件 输入的信号和绕过第一电路路径的第二电路; 以及多路复用器（MUX），其具有耦合到包括所述至少一个时间延迟元件的所述第一电路路径的第一输入和耦合到所述第二电路路径的第二输入，所述MUX选择多个输入的第一或第二输入，以及 输出输出信号。

公开(公告)号：US06809553B2

公开(公告)日：2004-10-26

申请号：US09975946

申请日：2001-10-15

Applicant: Sergio Morini ,  Massimo Grasso

Inventor： Sergio Morini ,  Massimo Grasso

IPC: H03K190175

CPC classification number: H03K5/1252 ,  H03K19/018571

Abstract: A circuit including a level shifting device such as a high voltage MOS device which is turned on to make an output transition, and feedback circuitry which responds to the transition to turn off the level shifting device. A circuit including two n-channel devices and two p-channel devices can sense when current greater than a threshold flows through both devices of one channel type to prevent false output transitions due to rapid changes in offset voltage, or both features can be provided. Level shifting devices can also be connected so none of the devices receives its acknowledge signal from the device to which it provides an acknowledge signal to avoid a standoff between two devices. For each device, the feedback circuitry can distinguish acknowledge signals so a device that stops transmitting in response to a signal that was not an acknowledge signal cam be restarted.

Abstract translation: 包括诸如高电压MOS器件的电平移位装置的电路，其被接通以进行输出转换，以及响应于转换以关闭电平移位装置的反馈电路。 包括两个n沟道器件和两个p沟道器件的电路可以在大于阈值的电流流过一个通道类型的两个器件时检测，以防止由于偏移电压的快速变化引起的误输出转换，或者可以提供两个特征。 电平移位装置也可以连接，所以没有一个装置从其提供确认信号的装置接收其确认信号，以避免两个装置之间的间隔。 对于每个设备，反馈电路可以区分确认信号，因此响应于不是确认信号凸轮的信号重新启动停止发送的设备。

公开(公告)号：US07671638B2

公开(公告)日：2010-03-02

申请号：US12146736

申请日：2008-06-26

Applicant: Marco Giandalia ,  Sergio Morini ,  Christian Locatelli

Inventor： Marco Giandalia ,  Sergio Morini ,  Christian Locatelli

IPC: H03B1/00

CPC classification number: H01L29/7835 ,  H01L27/0255 ,  H01L29/1087 ,  H03K17/162 ,  H03K17/6872 ,  H03K19/00361 ,  H03K19/017545 ,  H03K2217/0081

Abstract: A high-side driver in a driver circuit for driving a half-bridge stage having high- and low-side power switching devices series connected at a switched node, the high-side driver driving the high-side power switching device. The high-side driver including first and second complementary switched MOSFET series connected at a high-side node, driving the high-side power switching device, one of the MOSFETs having a parasitic bipolar transistor formed between the substrate, an N+ epitaxial region connected to the high-side driver supply voltage and the switched node, with the parasitic transistor having a base electrode formed by the N+ epitaxial region, an emitter electrode formed by the substrate and a collector electrode formed by the switched node, such that if a transient voltage that is negative with respect to the substrate is present at the high-side driver supply voltage, the parasitic transistor will conduct a short circuit current between the switched node and the substrate; a first circuit for controlling the conduction of the first and second MOSFETs to switch the high-side switching device ON and OFF; a diffusion in the N+ epitaxial region in which a terminal connected to the switched node is provided by the diffusion forming the collector of the parasitic transistor; and a second circuit coupled to the diffusion for sensing the high-side driver supply voltage at the epitaxial region and providing a signal to the first circuit to prevent turn-ON of the high-side power switching device.

Abstract translation: 用于驱动具有连接在开关节点处的高低侧功率开关器件的半桥级的驱动电路中的高侧驱动器，驱动高侧电源开关器件的高侧驱动器。 高侧驱动器包括连接在高侧节点处的第一和第二互补开关MOSFET串联，驱动高边功率开关器件，其中一个MOSFET具有形成在衬底之间的寄生双极晶体管，N +外延区连接到 高侧驱动器电源电压和开关节点，寄生晶体管具有由N +外延区域形成的基极，由衬底形成的发射极和由开关节点形成的集电极，使得如果瞬态电压 在高侧驱动器电源电压下存在相对于衬底的负极，寄生晶体管将在开关节点和衬底之间传导短路电流; 第一电路，用于控制第一和第二MOSFET的导通以切换高侧开关装置的ON和OFF; 通过扩散形成寄生晶体管的集电极，在N +外延区域中扩散连接到开关节点的端子; 以及耦合到所述扩散的第二电路，用于感测所述外延区域处的高侧驱动器电源电压，并向所述第一电路提供信号以防止所述高侧电力开关装置的接通。