公开(公告)号：US06677254B2

公开(公告)日：2004-01-13

申请号：US09911947

申请日：2001-07-23

Applicant: Pravin Narwankar ,  Mouloud Bakli ,  Ravi Rajagopalan ,  Randall S. Urdahl ,  Asher Sinensky ,  Shankarram Athreya

Inventor： Pravin Narwankar ,  Mouloud Bakli ,  Ravi Rajagopalan ,  Randall S. Urdahl ,  Asher Sinensky ,  Shankarram Athreya

IPC: H01L2131

CPC classification number: H01L28/40 ,  H01L21/3143 ,  H01L21/31604 ,  H01L28/56

Abstract: The formation of a barrier layer over a high k dielectric layer and deposition of a conducting layer over the barrier layer prevents intermigration between the species of the high k dielectric layer and the conducting layer and prevents oxygen scavenging of the high k dielectric layer. One example of a capacitor stack device provided includes a high k dielectric layer of Ta2O5, a barrier layer of TaON or TiON formed at least in part by a remote plasma process, and a top electrode of TiN. The processes may be conducted at about 300 to 700° C. and are thus useful for low thermal budget applications. Also provided are MIM capacitor constructions and methods in which an insulator layer is formed by remote plasma oxidation of a bottom electrode.

Abstract translation: 在高k电介质层上形成阻挡层并且在阻挡层上沉积导电层可防止高k电介质层与导电层之间的迁移，并防止高k介电层的氧清除。 提供的电容器堆叠装置的一个示例包括Ta 2 O 5的高k电介质层，至少部分由远程等离子体工艺形成的TaON或TiON的阻挡层和TiN的顶部电极。 该方法可以在约300-700℃下进行，因此可用于低热预算应用。 还提供了MIM电容器结构和其中通过底部电极的远程等离子体氧化形成绝缘体层的方法。

公开(公告)号：US20060223339A1

公开(公告)日：2006-10-05

申请号：US11421283

申请日：2006-05-31

Applicant: Craig Metzner ,  Shreyas Kher ,  Vidyut Gopal ,  Shixue Han ,  Shankarram Athreya

Inventor： Craig Metzner ,  Shreyas Kher ,  Vidyut Gopal ,  Shixue Han ,  Shankarram Athreya

IPC: H01L21/31

CPC classification number: H01L21/02181 ,  C23C16/405 ,  C23C16/452 ,  C23C16/45542 ,  C23C16/45553 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/28562 ,  H01L21/31604 ,  H01L21/318

Abstract: Methods of forming metal compounds such as metal oxides or metal nitrides by sequentially introducing and then reacting metal organic compounds with ozone one or with oxygen radicals or nitrogen radicals formed in a remote plasma chamber. The metal compounds have surprisingly and significantly improved uniformity when deposited by atomic layer deposition with cycle times of at least 10 seconds. The metal compounds also do not contain detectable carbon when the metal organic compound is vaporized at process conditions in the absence of solvents or excess ligands.

Abstract translation: 通过依次将金属有机化合物与臭氧一起或在远离等离子体室中形成的氧自由基或氮自由基反应而形成金属化合物如金属氧化物或金属氮化物的方法。 当通过原子层沉积沉积至少10秒的循环时间时，金属化合物具有惊人的和显着改善的均匀性。 当金属有机化合物在不存在溶剂或过量配体的过程条件下蒸发时，金属化合物也不含可检测的碳。

公开(公告)号：US20070059948A1

公开(公告)日：2007-03-15

申请号：US11421293

申请日：2006-05-31

Applicant: Craig Metzner ,  Shreyas Kher ,  Vidyut Gopal ,  Shixue Han ,  Shankarram Athreya

Inventor： Craig Metzner ,  Shreyas Kher ,  Vidyut Gopal ,  Shixue Han ,  Shankarram Athreya

IPC: C23C16/00 ,  H01L21/31

CPC classification number: H01L21/02181 ,  C23C16/405 ,  C23C16/452 ,  C23C16/45542 ,  C23C16/45553 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/28562 ,  H01L21/31604 ,  H01L21/318

Abstract: Embodiments of the invention provide methods for forming hafnium materials, such as oxides and nitrides, by sequentially exposing a substrate to hafnium precursors and active oxygen or nitrogen species (e.g., ozone, oxygen radicals, or nitrogen radicals). The deposited hafnium materials have significantly improved uniformity when deposited by these atomic layer deposition (ALD) processes. In one embodiment, an ALD chamber contains an expanding channel having a bottom surface that is sized and shaped to substantially cover a substrate positioned on a substrate pedestal. During an ALD process for forming hafnium materials, process gases form a vortex flow pattern while passing through the expanding channel and sweep across the substrate surface. The substrate is sequentially exposed to chemical precursors that are pulsed into the process chamber having the vortex flow.

Abstract translation: 本发明的实施方案通过将底物顺序地暴露于铪前体和活性氧或氮物质（例如臭氧，氧自由基或氮自由基）来提供用于形成铪材料如氧化物和氮化物的方法。 当通过这些原子层沉积（ALD）工艺沉积时，沉积的铪材料具有显着改善的均匀性。 在一个实施例中，ALD室包含具有底表面的扩张通道，该底表面的尺寸和形状基本上覆盖位于基板基座上的基板。 在用于形成铪材料的ALD工艺中，工艺气体在通过扩张通道并形成衬底表面时形成涡流模式。 将衬底依次暴露于脉冲进入具有涡流的处理室的化学前体。

公开(公告)号：US06426282B1

公开(公告)日：2002-07-30

申请号：US09565569

申请日：2000-05-04

Applicant: Dinesh Saigal ,  Shankarram Athreya ,  Kenny King-Tai Ngan ,  Lisa L. Yang

Inventor： Dinesh Saigal ,  Shankarram Athreya ,  Kenny King-Tai Ngan ,  Lisa L. Yang

IPC: H01L2144

CPC classification number: H01L24/02 ,  H01L21/6833 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13666 ,  H01L2224/13686 ,  H01L2224/1369 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/3025 ,  H01L2924/00014

Abstract: A method of forming solder bumps on a semiconductor wafer utilizing a low temperature biasable electrostatic chuck. In particular, the method comprises the steps of providing at least one bond pad on the semiconductor wafer, forming a barrier layer over the bond pad, and forming the solder bumps upon the at least one bond pad. By controlling the temperature and biasing of the electrostatic chuck, the barrier layer, such as nickel vanadium, exhibits a low tensile or compressive stress.

Abstract translation: 利用低温偏压静电卡盘在半导体晶片上形成焊料凸点的方法。 特别地，该方法包括以下步骤：在半导体晶片上提供至少一个接合焊盘，在接合焊盘上形成阻挡层，以及在至少一个接合焊盘上形成焊料凸块。 通过控制静电卡盘的温度和偏压，阻挡层（例如镍钒）表现出低的拉伸或压缩应力。